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Fri, 28 Mar 2025 08:06:16 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20250326143945.82142-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20250326143945.82142-12-prabhakar.mahadev-lad.rj@bp.renesas.com> <3d88eee6-1401-4ffc-85bb-3ea91f28d186@kernel.org> In-Reply-To: <3d88eee6-1401-4ffc-85bb-3ea91f28d186@kernel.org> From: "Lad, Prabhakar" Date: Fri, 28 Mar 2025 15:05:50 +0000 X-Gm-Features: AQ5f1Jo64DhVhvivaBJ7_luXnb-ReN0FMIj63tAndBnF_2sTF5NPerz6hjb5DLs Message-ID: Subject: Re: [PATCH 11/15] dt-bindings: pinctrl: renesas: Document RZ/V2N SoC To: Krzysztof Kozlowski Cc: Geert Uytterhoeven , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ulf Hansson , Linus Walleij , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Catalin Marinas , Will Deacon , Wolfram Sang , linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Biju Das , Fabrizio Castro , Lad Prabhakar Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Krzysztof, Thank you for the review. On Thu, Mar 27, 2025 at 7:48=E2=80=AFAM Krzysztof Kozlowski wrote: > > On 26/03/2025 15:39, Prabhakar wrote: > > +#define RZV2N_P3 3 > > +#define RZV2N_P4 4 > > +#define RZV2N_P5 5 > > +#define RZV2N_P6 6 > > +#define RZV2N_P7 7 > > +#define RZV2N_P8 8 > > +#define RZV2N_P9 9 > > +#define RZV2N_PA 10 > > +#define RZV2N_PB 11 > > Same comments as before - not useful to repeat the name. > > It is the third patch in this patchset, which receives exactly the same > comments as given before. > > I expect that given feedback somehow stays within group of contributions > or company in form of internal knowledge. Or just read other people's > patchset to learn from them and do not make the same mistakes. > For the RZ/V2H and RZ/G3E SoC similar changes were accepted, to keep consistency with these SoCs this header file was added. [0] https://lore.kernel.org/all/20241218192202.GA2184154-robh@kernel.org/ > > + > > +#define RZV2N_PORT_PINMUX(b, p, f) RZG2L_PORT_PINMUX(RZV2N_P##b, p, = f) > > +#define RZV2N_GPIO(port, pin) RZG2L_GPIO(RZV2N_P##port,= pin) > > Not a binding. If you claim otherwise, point me to the line of driver > code using this binding. > Note, since OF data of V2H was mostly reused in the pinctrl driver due to similarities there wasn't a need to include this header file in the driver code. My intention here was to use this header file in DTS/I to keep similarities. Maybe I'll create a r9a09g056_variable_pin_cfg{} so that this header file gets included in the driver. Cheers, Prabhakar