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From: Alexandre Courbot <gnurou@gmail.com>
To: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	GPIO Subsystem Mailing List <linux-gpio@vger.kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Mika Westerberg <mika.westerberg@intel.com>,
	Denis Turischev <denis.turischev@compulab.co.il>
Subject: Re: [PATCHv4 1/3] gpio: sch: Consolidate similar algorithms
Date: Thu, 4 Dec 2014 17:43:36 +0900	[thread overview]
Message-ID: <CAAVeFuLRbouvGXYUZ5nM-+X+2S3nyJdziHTz-yrZo49PHSp7XQ@mail.gmail.com> (raw)
In-Reply-To: <1416977280-27319-2-git-send-email-rebecca.swee.fun.chang@intel.com>

2014-11-26 13:47 GMT+09:00 Chang Rebecca Swee Fun
<rebecca.swee.fun.chang@intel.com>:
> Consolidating similar algorithms into common functions to make
> GPIO SCH simpler and manageable.
>
> Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
> ---
>  drivers/gpio/gpio-sch.c |   81 ++++++++++++++++-------------------------------
>  1 file changed, 28 insertions(+), 53 deletions(-)

Your v3 had this:

 drivers/gpio/gpio-sch.c |   95 ++++++++++++++++++++++++++---------------------
 1 file changed, 53 insertions(+), 42 deletions(-)

Just looking at these two lines we can already tell this v4 is going
to be *much* better. :)

>
> diff --git a/drivers/gpio/gpio-sch.c b/drivers/gpio/gpio-sch.c
> index 99720c8..7967f14 100644
> --- a/drivers/gpio/gpio-sch.c
> +++ b/drivers/gpio/gpio-sch.c
> @@ -63,75 +63,59 @@ static unsigned sch_gpio_bit(struct sch_gpio *sch, unsigned gpio)
>         return gpio % 8;
>  }
>
> -static void sch_gpio_enable(struct sch_gpio *sch, unsigned gpio)
> +static int sch_gpio_reg_get(struct gpio_chip *gc, unsigned gpio, unsigned reg)
>  {
> +       struct sch_gpio *sch = to_sch_gpio(gc);
>         unsigned short offset, bit;
> -       u8 enable;
> -
> -       spin_lock(&sch->lock);
> +       u8 curr_dirs;

This name sounds weird in this function. It has been copied from the
direction setting functions, but this function is much more generic.
So maybe come with a more generic name as well?

>
> -       offset = sch_gpio_offset(sch, gpio, GEN);
> +       offset = sch_gpio_offset(sch, gpio, reg);
>         bit = sch_gpio_bit(sch, gpio);
>
> -       enable = inb(sch->iobase + offset);
> -       if (!(enable & (1 << bit)))
> -               outb(enable | (1 << bit), sch->iobase + offset);
> +       curr_dirs = !!(inb(sch->iobase + offset) & BIT(bit));
>
> -       spin_unlock(&sch->lock);
> +       return curr_dirs;
>  }
>
> -static int sch_gpio_direction_in(struct gpio_chip *gc, unsigned  gpio_num)
> +static void sch_gpio_reg_set(struct gpio_chip *gc, unsigned gpio, unsigned reg,
> +                            int val)
>  {
>         struct sch_gpio *sch = to_sch_gpio(gc);
> -       u8 curr_dirs;
>         unsigned short offset, bit;
> +       u8 curr_dirs;

Same here.

Meh, I guess that's my only complain... This really makes the driver
easier to understand, so after fixing this minor issue and rebasing on
Linus' devel branch, feel free to add my

Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>

  parent reply	other threads:[~2014-12-04  8:43 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-26  4:47 [PATCHv4 0/3] Enable Quark X1000 support in gpio-sch Chang Rebecca Swee Fun
2014-11-26  4:47 ` [PATCHv4 1/3] gpio: sch: Consolidate similar algorithms Chang Rebecca Swee Fun
2014-11-28 10:54   ` Mika Westerberg
2014-11-28 13:54   ` Linus Walleij
2014-11-28 13:57     ` Linus Walleij
2014-12-04  8:43   ` Alexandre Courbot [this message]
2014-11-26  4:47 ` [PATCHv4 2/3] gpio: sch: Add support for Intel Quark X1000 SoC Chang Rebecca Swee Fun
2014-12-04  8:45   ` Alexandre Courbot
2014-11-26  4:48 ` [PATCHv4 3/3] gpio: sch: Enable IRQ support for Quark X1000 Chang Rebecca Swee Fun
2014-11-27 10:53   ` Andy Shevchenko
2014-11-28 11:05   ` Mika Westerberg
2014-11-28 14:02   ` Linus Walleij
2014-12-03  2:26     ` Chang, Rebecca Swee Fun
2014-12-04  8:47       ` Alexandre Courbot

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