* RE: [PATCH] pinctrl/amd: Remove the default de-bounce time
@ 2016-08-01 6:38 Agrawal, Nitesh-kumar
2016-08-04 8:51 ` Linus Walleij
0 siblings, 1 reply; 5+ messages in thread
From: Agrawal, Nitesh-kumar @ 2016-08-01 6:38 UTC (permalink / raw)
To: linus.walleij@linaro.org
Cc: Shah, Nehal-bakulchandra, Sen, Pankaj, S-k, Shyam-sundar,
Xue, Ken, SPG_Linux_Kernel, linux-gpio@vger.kernel.org
In the function amd_gpio_irq_enable and amd_gpio_direction_input, remove the code which is setting the default de-bounce time to 2.75ms.
The driver code shall use the same settings as specified in BIOS.
Any default assignment impacts TouchPad behaviour when the LevelTrig is set to EDGE FALLING.
Reviewed-by: Ken Xue <Ken.Xue@amd.com>
Signed-off-by: Nitesh Kumar Agrawal <Nitesh-kumar.Agrawal@amd.com>
---
drivers/pinctrl/pinctrl-amd.c | 20 +-------------------
1 file changed, 1 insertion(+), 19 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c index 634b4d3..828148d 100644
--- a/drivers/pinctrl/pinctrl-amd.c
+++ b/drivers/pinctrl/pinctrl-amd.c
@@ -43,16 +43,6 @@ static int amd_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
spin_lock_irqsave(&gpio_dev->lock, flags);
pin_reg = readl(gpio_dev->base + offset * 4);
- /*
- * Suppose BIOS or Bootloader sets specific debounce for the
- * GPIO. if not, set debounce to be 2.75ms and remove glitch.
- */
- if ((pin_reg & DB_TMR_OUT_MASK) == 0) {
- pin_reg |= 0xf;
- pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);
- pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
- pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
- }
pin_reg &= ~BIT(OUTPUT_ENABLE_OFF);
writel(pin_reg, gpio_dev->base + offset * 4); @@ -326,15 +316,7 @@ static void amd_gpio_irq_enable(struct irq_data *d)
spin_lock_irqsave(&gpio_dev->lock, flags);
pin_reg = readl(gpio_dev->base + (d->hwirq)*4);
- /*
- Suppose BIOS or Bootloader sets specific debounce for the
- GPIO. if not, set debounce to be 2.75ms.
- */
- if ((pin_reg & DB_TMR_OUT_MASK) == 0) {
- pin_reg |= 0xf;
- pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);
- pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
- }
+
pin_reg |= BIT(INTERRUPT_ENABLE_OFF);
pin_reg |= BIT(INTERRUPT_MASK_OFF);
writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
--
2.7.4
Any comments or feedback on the above patch
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] pinctrl/amd: Remove the default de-bounce time
2016-08-01 6:38 [PATCH] pinctrl/amd: Remove the default de-bounce time Agrawal, Nitesh-kumar
@ 2016-08-04 8:51 ` Linus Walleij
0 siblings, 0 replies; 5+ messages in thread
From: Linus Walleij @ 2016-08-04 8:51 UTC (permalink / raw)
To: Agrawal, Nitesh-kumar
Cc: Shah, Nehal-bakulchandra, Sen, Pankaj, S-k, Shyam-sundar,
Xue, Ken, SPG_Linux_Kernel, linux-gpio@vger.kernel.org
On Mon, Aug 1, 2016 at 8:38 AM, Agrawal, Nitesh-kumar
<Nitesh-kumar.Agrawal@amd.com> wrote:
> In the function amd_gpio_irq_enable and amd_gpio_direction_input, remove the code which is setting the default de-bounce time to 2.75ms.
>
> The driver code shall use the same settings as specified in BIOS.
> Any default assignment impacts TouchPad behaviour when the LevelTrig is set to EDGE FALLING.
>
> Reviewed-by: Ken Xue <Ken.Xue@amd.com>
> Signed-off-by: Nitesh Kumar Agrawal <Nitesh-kumar.Agrawal@amd.com>
Patch applied for fixes and tagged for stable.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [PATCH] pinctrl/amd: Remove the default de-bounce time
@ 2016-07-28 10:04 Agrawal, Nitesh-kumar
2016-07-28 13:37 ` Greg KH
0 siblings, 1 reply; 5+ messages in thread
From: Agrawal, Nitesh-kumar @ 2016-07-28 10:04 UTC (permalink / raw)
To: linus.walleij@linaro.org, linux-gpio@vger.kernel.org,
stable@vger.kernel.org, SPG_Linux_Kernel, Xue, Ken
Cc: Shah, Nehal-bakulchandra, Sen, Pankaj, S-k, Shyam-sundar
In the function amd_gpio_irq_enable and amd_gpio_direction_input, remove the code which is setting the default de-bounce time to 2.75ms.
The driver code shall use the same settings as specified in BIOS.
Any default assignment impacts TouchPad behaviour when the LevelTrig is set to EDGE FALLING.
Reviewed-by: Ken Xue <Ken.Xue@amd.com>
Signed-off-by: Nitesh Kumar Agrawal <Nitesh-kumar.Agrawal@amd.com>
---
drivers/pinctrl/pinctrl-amd.c | 20 +-------------------
1 file changed, 1 insertion(+), 19 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c index 634b4d3..828148d 100644
--- a/drivers/pinctrl/pinctrl-amd.c
+++ b/drivers/pinctrl/pinctrl-amd.c
@@ -43,16 +43,6 @@ static int amd_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
spin_lock_irqsave(&gpio_dev->lock, flags);
pin_reg = readl(gpio_dev->base + offset * 4);
- /*
- * Suppose BIOS or Bootloader sets specific debounce for the
- * GPIO. if not, set debounce to be 2.75ms and remove glitch.
- */
- if ((pin_reg & DB_TMR_OUT_MASK) == 0) {
- pin_reg |= 0xf;
- pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);
- pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
- pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
- }
pin_reg &= ~BIT(OUTPUT_ENABLE_OFF);
writel(pin_reg, gpio_dev->base + offset * 4); @@ -326,15 +316,7 @@ static void amd_gpio_irq_enable(struct irq_data *d)
spin_lock_irqsave(&gpio_dev->lock, flags);
pin_reg = readl(gpio_dev->base + (d->hwirq)*4);
- /*
- Suppose BIOS or Bootloader sets specific debounce for the
- GPIO. if not, set debounce to be 2.75ms.
- */
- if ((pin_reg & DB_TMR_OUT_MASK) == 0) {
- pin_reg |= 0xf;
- pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);
- pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
- }
+
pin_reg |= BIT(INTERRUPT_ENABLE_OFF);
pin_reg |= BIT(INTERRUPT_MASK_OFF);
writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
--
2.7.4
Any comments on the above patch
Thanks
Regards
Nitesh
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^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] pinctrl/amd: Remove the default de-bounce time
2016-07-28 10:04 Agrawal, Nitesh-kumar
@ 2016-07-28 13:37 ` Greg KH
0 siblings, 0 replies; 5+ messages in thread
From: Greg KH @ 2016-07-28 13:37 UTC (permalink / raw)
To: Agrawal, Nitesh-kumar
Cc: linus.walleij@linaro.org, linux-gpio@vger.kernel.org,
stable@vger.kernel.org, SPG_Linux_Kernel, Xue, Ken,
Shah, Nehal-bakulchandra, Sen, Pankaj, S-k, Shyam-sundar
On Thu, Jul 28, 2016 at 10:04:02AM +0000, Agrawal, Nitesh-kumar wrote:
> In the function amd_gpio_irq_enable and amd_gpio_direction_input, remove the code which is setting the default de-bounce time to 2.75ms.
>
> The driver code shall use the same settings as specified in BIOS.
> Any default assignment impacts TouchPad behaviour when the LevelTrig is set to EDGE FALLING.
>
> Reviewed-by: Ken Xue <Ken.Xue@amd.com>
> Signed-off-by: Nitesh Kumar Agrawal <Nitesh-kumar.Agrawal@amd.com>
> ---
> drivers/pinctrl/pinctrl-amd.c | 20 +-------------------
> 1 file changed, 1 insertion(+), 19 deletions(-)
<formletter>
This is not the correct way to submit patches for inclusion in the
stable kernel tree. Please read Documentation/stable_kernel_rules.txt
for how to do this properly.
</formletter>
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To unsubscribe from this list: send the line "unsubscribe linux-gpio" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH] pinctrl/amd: Remove the default de-bounce time
@ 2016-07-26 8:28 Agrawal, Nitesh-kumar
0 siblings, 0 replies; 5+ messages in thread
From: Agrawal, Nitesh-kumar @ 2016-07-26 8:28 UTC (permalink / raw)
To: linus.walleij@linaro.org, linux-gpio@vger.kernel.org,
stable@vger.kernel.org, SPG_Linux_Kernel, Xue, Ken
Cc: Shah, Nehal-bakulchandra, Sen, Pankaj, S-k, Shyam-sundar
In the function amd_gpio_irq_enable and amd_gpio_direction_input, remove the code which is setting the default de-bounce time to 2.75ms.
The driver code shall use the same settings as specified in BIOS.
Any default assignment impacts TouchPad behaviour when the LevelTrig is set to EDGE FALLING.
Reviewed-by: Ken Xue <Ken.Xue@amd.com>
Signed-off-by: Nitesh Kumar Agrawal <Nitesh-kumar.Agrawal@amd.com>
---
drivers/pinctrl/pinctrl-amd.c | 20 +-------------------
1 file changed, 1 insertion(+), 19 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c index 634b4d3..828148d 100644
--- a/drivers/pinctrl/pinctrl-amd.c
+++ b/drivers/pinctrl/pinctrl-amd.c
@@ -43,16 +43,6 @@ static int amd_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
spin_lock_irqsave(&gpio_dev->lock, flags);
pin_reg = readl(gpio_dev->base + offset * 4);
- /*
- * Suppose BIOS or Bootloader sets specific debounce for the
- * GPIO. if not, set debounce to be 2.75ms and remove glitch.
- */
- if ((pin_reg & DB_TMR_OUT_MASK) == 0) {
- pin_reg |= 0xf;
- pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);
- pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
- pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
- }
pin_reg &= ~BIT(OUTPUT_ENABLE_OFF);
writel(pin_reg, gpio_dev->base + offset * 4); @@ -326,15 +316,7 @@ static void amd_gpio_irq_enable(struct irq_data *d)
spin_lock_irqsave(&gpio_dev->lock, flags);
pin_reg = readl(gpio_dev->base + (d->hwirq)*4);
- /*
- Suppose BIOS or Bootloader sets specific debounce for the
- GPIO. if not, set debounce to be 2.75ms.
- */
- if ((pin_reg & DB_TMR_OUT_MASK) == 0) {
- pin_reg |= 0xf;
- pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);
- pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
- }
+
pin_reg |= BIT(INTERRUPT_ENABLE_OFF);
pin_reg |= BIT(INTERRUPT_MASK_OFF);
writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
--
2.7.4
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2016-08-04 8:52 UTC | newest]
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2016-08-01 6:38 [PATCH] pinctrl/amd: Remove the default de-bounce time Agrawal, Nitesh-kumar
2016-08-04 8:51 ` Linus Walleij
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2016-07-28 13:37 ` Greg KH
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