From mboxrd@z Thu Jan 1 00:00:00 1970 From: Linus Walleij Subject: Re: [PATCH 1/3] pinctrl: sunxi: Add pinctrl variants Date: Mon, 9 Jan 2017 15:42:32 +0100 Message-ID: References: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Maxime Ripard Cc: "linux-gpio@vger.kernel.org" , Chen-Yu Tsai , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Icenowy Zheng List-Id: linux-gpio@vger.kernel.org On Sun, Jan 8, 2017 at 10:31 PM, Maxime Ripard wrote: > Some SoCs are either supposed to be pin compatible (A10 and A20 for > example), or are just repackaged versions of the same die (A10s, A13, GR8). > > In those case, having a full blown pinctrl driver just introduces > duplication in both data size and maintainance effort. > > Add a variant option to both pins and functions to be able to limit the > pins and functions described only to a subset of the SoC we support with a > given driver. > > Signed-off-by: Maxime Ripard Patch applied. Yours, Linus Walleij