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From: Linus Walleij <linus.walleij@linaro.org>
To: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: "linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
	Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	Nadav Haklai <nadavh@marvell.com>, Victor Gu <xigu@marvell.com>,
	Omri Itach <omrii@marvell.com>, Marcin Wojtas <mw@semihalf.com>,
	Wilson Ding <dingwei@marvell.com>, Hua Jing <jinghua@marvell.com>,
	Terry Zhou <bjzhou@marvell.com>
Subject: Re: [PATCH 4/6] pinctrl: aramda-37xx: Add irqchip support
Date: Fri, 30 Dec 2016 09:58:06 +0100	[thread overview]
Message-ID: <CACRpkdbR-WRT0rJp2CuN6CkZF=J35JUgGHjW7beyaimipz0ehw@mail.gmail.com> (raw)
In-Reply-To: <20161222172501.16121-5-gregory.clement@free-electrons.com>

On Thu, Dec 22, 2016 at 6:24 PM, Gregory CLEMENT
<gregory.clement@free-electrons.com> wrote:

> The Armada 37xx SoCs can handle interrupt through GPIO. However it can
> only manage the edge ones.
>
> The way the interrupt are managed are classical so we can use the generic
> interrupt chip model.
>
> The only unusual "feature" is that many interrupts are connected to the
> parent interrupt controller. But we do not take advantage of this and use
> the chained irq with all of them.
>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

So this is very simple and should use GPIOLIB_IRQCHIP.

Begin with select GPIOLIB_IRQCHIP in your Kconfig and then look
at conversions such as commit 85ae9e512f437cd09bf61564bdba29ab88bab3e3
("pinctrl: bcm2835: switch to GPIOLIB_IRQCHIP")
for inspiration.

> @@ -64,6 +71,8 @@ struct armada_37xx_pinctrl {
>         struct armada_37xx_pin_data     *data;
>         struct device                   *dev;
>         struct gpio_chip                gpio_chip;
> +       struct irq_chip                 irq_chip;
> +       struct irq_domain               *domain;

You don't need a domain when using GPIOLIB_IRQCHIP

> +static int armada_37xx_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
> +{
> +       struct armada_37xx_pinctrl *info = gpiochip_get_data(chip);
> +
> +       return irq_create_mapping(info->domain, offset);
> +}

Nor this.

The irqchip code should be pretty much the same but you need to
dereference gpio_chip from chip data and pick the irqchip from
there.

Yours,
Linus Walleij

  reply	other threads:[~2016-12-30  8:58 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-22 17:24 [PATCH 0/6] Add support for pinctrl/gpio on Armada 37xx Gregory CLEMENT
2016-12-22 17:24 ` [PATCH 1/6] pinctrl: dt-bindings: Add documentation for Armada 37xx pin controllers Gregory CLEMENT
2016-12-30  8:35   ` Linus Walleij
2017-03-22 11:42     ` Gregory CLEMENT
2016-12-22 17:24 ` [PATCH 2/6] pinctrl: armada-37xx: Add pin controller support for Armada 37xx Gregory CLEMENT
2016-12-30  8:44   ` Linus Walleij
2017-03-22 11:47     ` Gregory CLEMENT
2016-12-22 17:24 ` [PATCH 3/6] pinctrl: armada-37xx: Add gpio support Gregory CLEMENT
2016-12-30  8:51   ` Linus Walleij
2017-03-22 11:54     ` Gregory CLEMENT
2017-03-23 10:28       ` Linus Walleij
2017-03-23 14:47         ` Gregory CLEMENT
2016-12-22 17:24 ` [PATCH 4/6] pinctrl: aramda-37xx: Add irqchip support Gregory CLEMENT
2016-12-30  8:58   ` Linus Walleij [this message]
2017-03-22 12:02     ` Gregory CLEMENT
2017-03-23 10:36       ` Linus Walleij
2017-03-23 14:41         ` Gregory CLEMENT
2016-12-22 17:25 ` [PATCH 5/6] ARM64: dts: marvell: Add pinctrl nodes for Armada 3700 Gregory CLEMENT
2016-12-22 17:25 ` [PATCH 6/6] ARM64: dts: marvell: armada37xx: add pinctrl definition Gregory CLEMENT
2016-12-30  9:00   ` Linus Walleij

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