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From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: Biju Das <biju.das.jz@bp.renesas.com>
Cc: "Linus Walleij" <linus.walleij@linaro.org>,
	"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
	"Geert Uytterhoeven" <geert+renesas@glider.be>,
	"Thierry Reding" <thierry.reding@gmail.com>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Prabhakar Mahadev Lad" <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	"linux-renesas-soc@vger.kernel.org"
	<linux-renesas-soc@vger.kernel.org>
Subject: Re: [PATCH v6 01/13] pinctrl: core: Add pinctrl_get_device()
Date: Thu, 9 Mar 2023 15:44:38 +0200	[thread overview]
Message-ID: <CAHp75VfDL74cEUQkxC1JuUB7SS1vYTPj_K7+VkQ-i-MKXad5Lw@mail.gmail.com> (raw)
In-Reply-To: <OS0PR01MB59224CECBB888ADC9214145286B59@OS0PR01MB5922.jpnprd01.prod.outlook.com>

On Thu, Mar 9, 2023 at 3:26 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > Subject: Re: [PATCH v6 01/13] pinctrl: core: Add pinctrl_get_device()
> > On Tue, Mar 7, 2023 at 10:13 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > > > Subject: Re: [PATCH v6 01/13] pinctrl: core: Add
> > > > pinctrl_get_device() Mon, Mar 06, 2023 at 09:00:02AM +0000, Biju Das
> > kirjoitti:

...

> > > > > Add pinctrl_get_device() to find a device handle associated with a
> > > > > pincontrol group(i.e. by matching function name and group name for
> > > > > a device). This device handle can then be used for finding match
> > > > > for the pin output disable device that protects device against
> > > > > short circuits on the pins.
> > > >
> > > > Not sure I understand the use case. Please, create a better commit
> > message.
> > >
> > > OK, Basically pinmux_enable_setting allows exclusive access of pin to a
> > device.
> > > It won't allow multiple devices to claim a pin.

This is a confusion you brought. You got us completely lost. Please,
try again from the clean sheet.

> > Which is correct. No? Show me the schematics of the real use case for that.
> >
> > The owner of the pin is the host side. I can't imagine how the same pin is
> > shared inside the SoC. Is it broken hardware design?
>
> We are discussing usage of
>
> echo "fname gname" and you asked a question whether multiple devices can
> claim a pin at the same time
>
> and my answer is no.

> as setting->data.mux will be unique for a pin and will be claimed by
> device during commit state.
>
> Am I missing anything here??

Yes. The same fname/gname can be in many *pin control* (provider) devices.

So, it does not uniquely define the pin control device.

...

> > > > Also it is missing the explanation why there will be no collisions
> > > > when looking by the same pair of function and group name from different
> > device.
> > >
> > > setting->data.mux will be unique for a pin. So there won't be a
> > > setting->collision when
> > > looking by the same pair of function and group name from different device.
> > >
> > > > (Always imagine that you have 2+ same IP blocks on the platform
> > > > before doing any pin control core work. This will help you to design
> > > > it properly. )
> >
> > Not sure how the pair function_name group_name makes the device unique.
>
> Do you agree Device handle + function_name +  group_name make it unique.

Yes.

> For pin outdisable we are making use of this 3 combination.
> See the details.
>
>
> This patch series adds support for controlling output disable function using
> sysfs in a generic way as described below.
>
> |    A     |    |     B      |    |     C     |    |     D        |  | E |
> |user space|--->|pinctrl core|<-->|SoC pinctrl|<-->|Output disable|--|PWM|
> |          |    |            |    |           |    |              |  |   |
>
> A executes command to configure a pin group for pin output disable operation
>   echo "fname gname conf conf_val" > configure
>
> B parses the command and identifies the binding device associated with that
>   pin group
>
> C matches the binding device against the device registered by D for
>   configuration operation
>
> D matches the pin group and configure the pins for Output disable operation
>
> Both D and E are linked together by dt(i.e. PWM channel linked with Output
>  disable Port)

Sounds like an overengineered hack to achieve something that I can't
read between the lines. Why is this so complicated interface and flow
are needed to begin with?


-- 
With Best Regards,
Andy Shevchenko

  reply	other threads:[~2023-03-09 13:45 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-06  9:00 [PATCH v6 00/13] Add pinctrl sysfs and RZ/G2L POEG support Biju Das
2023-03-06  9:00 ` [PATCH v6 01/13] pinctrl: core: Add pinctrl_get_device() Biju Das
2023-03-06 23:33   ` andy.shevchenko
2023-03-07  8:13     ` Biju Das
2023-03-09 12:54       ` Andy Shevchenko
2023-03-09 13:26         ` Biju Das
2023-03-09 13:44           ` Andy Shevchenko [this message]
2023-03-09 14:19             ` Biju Das
2023-03-13 20:42               ` Biju Das
2023-03-13 22:05               ` Linus Walleij
2023-03-14  8:27                 ` Biju Das
2023-03-14  8:42                   ` Linus Walleij
2023-03-28  7:08                     ` Biju Das
2023-03-14  9:33                   ` Geert Uytterhoeven
2023-03-14 11:33                     ` Biju Das
2023-03-15  8:00                       ` Geert Uytterhoeven
2023-03-09 13:05       ` Linus Walleij
2023-03-09 13:18         ` Biju Das
2023-03-06  9:00 ` [PATCH v6 02/13] pinctrl: Add poutdisops variable to struct pinctrl_desc Biju Das
2023-03-06  9:00 ` [PATCH v6 03/13] pinctrl: Add sysfs support Biju Das
2023-03-06 23:38   ` andy.shevchenko
2023-03-07  8:54     ` Biju Das
2023-03-07 13:41   ` Linus Walleij
2023-03-07 14:43     ` Biju Das
2023-03-07 15:15       ` Greg KH
2023-03-28  7:07         ` Biju Das
2023-03-07 14:46     ` Greg KH
2023-03-06  9:00 ` [PATCH v6 04/13] pinctrl: renesas: rzg2l: Add pin output disable support Biju Das
2023-03-06  9:00 ` [PATCH v6 06/13] drivers: pinctrl: renesas: Add RZ/G2L POEG driver support Biju Das
2023-03-06 23:35   ` andy.shevchenko
2023-03-07  8:53     ` Biju Das
2023-03-07  9:58       ` Andy Shevchenko
2023-03-07 10:10         ` Biju Das
2023-03-07 12:30           ` Andy Shevchenko
2023-03-07 12:39             ` Biju Das
2023-03-06  9:00 ` [DO NOT APPLY PATCH v6 07/13] pwm: rzg2l-gpt: Add support for output disable request from gpt Biju Das
2023-03-06  9:00 ` [DO NOT APPLY PATCH v6 08/13] pinctrl: renesas: rzg2l-poeg: Add support for GPT Output-Disable Request Biju Das
2023-03-06  9:00 ` [DO NOT APPLY PATCH v6 09/13] pwm: rzg2l-gpt: Add support for output disable when both output low Biju Das
2023-03-06  9:00 ` [DO NOT APPLY PATCH v6 10/13] pinctrl: renesas: rzg2l-poeg: output-disable request from GPT when both outputs are low Biju Das
2023-03-06 23:39   ` andy.shevchenko
2023-03-07  8:57     ` Biju Das
2023-03-06  9:00 ` [DO NOT APPLY PATCH v6 11/13] pwm: rzg2l-gpt: Add support for output disable on dead time error Biju Das
2023-03-06  9:00 ` [DO NOT APPLY PATCH v6 12/13] pinctrl: renesas: rzg2l-poeg: output-disable request from GPT " Biju Das
2023-03-06  9:00 ` [DO NOT APPLY PATCH v6 13/13] tools/poeg: Add test app for poeg Biju Das

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