From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: "周琰杰 (Zhou Yanjie)" <zhouyanjie@wanyeetech.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Paul Cercueil <paul@crapouillou.net>,
linux-mips@vger.kernel.org,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
devicetree <devicetree@vger.kernel.org>,
"H. Nikolaus Schaller" <hns@goldelico.com>,
paul@boddie.org.uk, dongsheng.qiu@ingenic.com,
aric.pzqi@ingenic.com, sernia.zhou@foxmail.com
Subject: Re: [PATCH v2 6/6] pinctrl: Ingenic: Add support for new Ingenic SoCs.
Date: Fri, 12 Mar 2021 14:50:34 +0200 [thread overview]
Message-ID: <CAHp75VfMS-sfuLEyGEkc_VLKDaOc8gD+eOSxACEpDxXdvdEH5g@mail.gmail.com> (raw)
In-Reply-To: <1615476112-113101-7-git-send-email-zhouyanjie@wanyeetech.com>
On Thu, Mar 11, 2021 at 5:23 PM 周琰杰 (Zhou Yanjie)
<zhouyanjie@wanyeetech.com> wrote:
>
> Add support for probing the pinctrl-ingenic driver on the JZ4730 SoC,
> the JZ4750 SoC, the JZ4755 SoC, the JZ4775 SoC and the X2000 SoC from
> Ingenic.
>
> The driver of JZ4730 is derived from Paul Boddie. It is worth noting
> that the JZ4730 is special in having two control registers (upper/lower),
> so add code to handle the jz4730 specific register offsets and some
> register pairs have 2 bits for each GPIO pin.
> Tested-by: H. Nikolaus Schaller <hns@goldelico.com> # on Letux400/JZ4730
> Signed-off-by: Paul Boddie <paul@boddie.org.uk> # for JZ4730
> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> # for JZ4730
> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Shouldn't it have the Co-developed-by tag(s)?
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2021-03-12 12:51 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-11 15:21 [PATCH v2 0/6] Fix bugs and add support for new Ingenic SoCs 周琰杰 (Zhou Yanjie)
2021-03-11 15:21 ` [PATCH v2 1/6] pinctrl: Ingenic: Add missing pins to the JZ4770 MAC MII group 周琰杰 (Zhou Yanjie)
2021-03-12 13:05 ` Paul Cercueil
2021-03-13 8:07 ` Zhou Yanjie
2021-03-11 15:21 ` [PATCH v2 2/6] pinctrl: Ingenic: Add support for read the pin configuration of X1830 周琰杰 (Zhou Yanjie)
2021-03-12 13:31 ` Paul Cercueil
2021-03-13 8:07 ` Zhou Yanjie
2021-03-11 15:21 ` [PATCH v2 3/6] pinctrl: Ingenic: Adjust the sequence of X1830 SSI pin groups 周琰杰 (Zhou Yanjie)
2021-03-12 13:32 ` Paul Cercueil
2021-03-11 15:21 ` [PATCH v2 4/6] pinctrl: Ingenic: Reformat the code 周琰杰 (Zhou Yanjie)
2021-03-12 13:33 ` Paul Cercueil
2021-03-11 15:21 ` [PATCH v2 5/6] dt-bindings: pinctrl: Add bindings for new Ingenic SoCs 周琰杰 (Zhou Yanjie)
2021-03-11 15:21 ` [PATCH v2 6/6] pinctrl: Ingenic: Add support " 周琰杰 (Zhou Yanjie)
2021-03-12 12:50 ` Andy Shevchenko [this message]
2021-03-12 13:42 ` Paul Cercueil
2021-03-13 8:07 ` Zhou Yanjie
2021-03-12 12:51 ` [PATCH v2 0/6] Fix bugs and add " Andy Shevchenko
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