From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Biju Das <biju.das.jz@bp.renesas.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
Chris Paterson <Chris.Paterson2@renesas.com>,
Biju Das <biju.das@bp.renesas.com>,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH 6/6] pinctrl: renesas: r8a7791: Optimize pinctrl image size for R8A774[3|4]
Date: Thu, 22 Oct 2020 14:07:12 +0200 [thread overview]
Message-ID: <CAMuHMdU-zAq6AYhqhKZbLyjaQv6L-qSty6GtkJWOuvZiK9qhHw@mail.gmail.com> (raw)
In-Reply-To: <20201019124258.4574-7-biju.das.jz@bp.renesas.com>
On Mon, Oct 19, 2020 at 2:43 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> This driver supports both RZ/G1[M|N] and R-Car M2-W/M2-N(R8A779[1|3])
> SoC's. Optimize pinctrl image size for RZ/G1[M|N], when R-Car M2-W/M2-N
> (R8A779[1|3]) SoC's are disabled in the shmobile_defconfig.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-pinctrl-for-v5.11, with comments added to
the #endifs where appropriate.
> --- a/drivers/pinctrl/renesas/pfc-r8a7791.c
> +++ b/drivers/pinctrl/renesas/pfc-r8a7791.c
> @@ -1700,6 +1700,7 @@ static const struct sh_pfc_pin pinmux_pins[] = {
> PINMUX_GPIO_GP_ALL(),
> };
>
> +#if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793)
> /* - ADI -------------------------------------------------------------------- */
> static const unsigned int adi_common_pins[] = {
> /* ADIDATA, ADICS/SAMP, ADICLK */
> @@ -1765,7 +1766,7 @@ static const unsigned int adi_chsel2_b_mux[] = {
> /* ADICHS B 2 */
> ADICHS2_B_MARK,
> };
> -
> +#endif
> /* - Audio Clock ------------------------------------------------------------ */
> static const unsigned int audio_clk_a_pins[] = {
> /* CLK */
> @@ -2553,6 +2554,7 @@ static const unsigned int intc_irq3_pins[] = {
> static const unsigned int intc_irq3_mux[] = {
> IRQ3_MARK,
> };
> +#if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793)
BTW, if we get more of these automotive-only pin groups, we may consider
moving them together, to reduce the number of #ifdefs.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
prev parent reply other threads:[~2020-10-22 12:07 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-19 12:42 [PATCH 0/6] Optimize pinctrl image size for RZ/G SoC's Biju Das
2020-10-19 12:42 ` [PATCH 1/6] pinctrl: renesas: r8a77951: Optimize pinctrl image size for R8A774E1 Biju Das
2020-10-22 12:00 ` Geert Uytterhoeven
2020-10-22 12:37 ` Biju Das
2020-10-19 12:42 ` [PATCH 2/6] pinctrl: renesas: r8a7796: Optimize pinctrl image size for R8A774A1 Biju Das
2020-10-19 12:51 ` Biju Das
2020-10-19 12:42 ` [PATCH 3/6] pinctrl: renesas: r8a77965: Optimize pinctrl image size for R8A774B1 Biju Das
2020-10-22 12:03 ` Geert Uytterhoeven
2020-10-19 12:42 ` [PATCH 4/6] pinctrl: renesas: r8a77990: Optimize pinctrl image size for R8A774C0 Biju Das
2020-10-22 12:04 ` Geert Uytterhoeven
2020-10-22 12:05 ` Geert Uytterhoeven
2020-10-22 12:39 ` Biju Das
2020-10-19 12:42 ` [PATCH 5/6] pinctrl: renesas: r8a7790: Optimize pinctrl image size for R8A7742 Biju Das
2020-10-22 12:05 ` Geert Uytterhoeven
2020-10-19 12:42 ` [PATCH 6/6] pinctrl: renesas: r8a7791: Optimize pinctrl image size for R8A774[3|4] Biju Das
2020-10-22 12:07 ` Geert Uytterhoeven [this message]
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