From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Jacopo Mondi <jacopo+renesas@jmondi.org>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Linus Walleij <linus.walleij@linaro.org>,
Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>
Subject: Re: [RFC 1/5] pinctrl: rz-pfc: Add Renesas RZ pinctrl core module
Date: Thu, 26 Jan 2017 20:43:06 +0100 [thread overview]
Message-ID: <CAMuHMdUmOAW5kPacMskVT_7R+T4qMmbPiaZV2z51sn1EELG4SQ@mail.gmail.com> (raw)
In-Reply-To: <1485367787-8109-2-git-send-email-jacopo+renesas@jmondi.org>
Hi Jacopo,
On Wed, Jan 25, 2017 at 7:09 PM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> Add core module for per-pin Renesas RZ series pin controller.
> The core module allows SoC driver to register their pins and SoC
> specific operations and interfaces with pinctrl and pinmux core on their
> behalf.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
I believe nothing besides the DT property "renesas-rz,pins" and the value
of the RZ_PIN_ARGS_COUNT macro is really specific to Renesas or RZ(A)?
So this could become something really generic, and part of core pinctrl?
> --- /dev/null
> +++ b/drivers/pinctrl/rz-pfc/pinctrl-rz.c
> @@ -0,0 +1,447 @@
> +#define RZ_PIN_ARGS_COUNT 3
This should be a parameter in the SoC-specific subdriver.
> +/**
> + * rz_pinctrl_pos_to_index() - Retrieve the index of pin at position [bank:pin]
> + *
> + * This can be improved, as it walks all the pins reported by the SoC driver
> + *
> + * @return: pin number between [0 - npins]; -1 if not found
> + */
> +static int rz_pinctrl_pos_to_index(struct rz_pinctrl_dev *rz_pinctrl,
> + unsigned int bank, unsigned int pin)
> +{
> + struct rz_pinctrl_info *info;
> + struct rz_pin_desc *rz_pin;
const
> + int i, npins;
unsigned int
> +/* ----------------------------------------------------------------------------
> + * pinctrl operations
> + */
> +static void rz_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
const ... pctldev
> + unsigned int pin)
> +{
> + struct rz_pinctrl_dev *rz_pinctrl;
> + struct rz_pinctrl_info *info;
const
> +static int rz_dt_node_to_map(struct pinctrl_dev *pctldev,
> + struct device_node *np_config,
> + struct pinctrl_map **map, unsigned int *num_maps)
> +{
> + fngrps = devm_kzalloc(rz_pinctrl->dev, sizeof(*fngrps), GFP_KERNEL);
> + if (unlikely(!fngrps)) {
Please don't use unlikely.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2017-01-26 19:55 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-25 18:09 [RFC 0/5] Renesas RZ series pinctrl driver Jacopo Mondi
2017-01-25 18:09 ` [RFC 1/5] pinctrl: rz-pfc: Add Renesas RZ pinctrl core module Jacopo Mondi
2017-01-26 2:58 ` Chris Brandt
2017-01-26 9:08 ` jacopo mondi
2017-01-26 14:19 ` Chris Brandt
2017-01-26 19:43 ` Geert Uytterhoeven [this message]
2017-01-30 19:19 ` Chris Brandt
2017-01-31 9:00 ` jacopo mondi
2017-01-31 13:48 ` Chris Brandt
2017-02-01 12:47 ` Laurent Pinchart
2017-02-01 15:21 ` Laurent Pinchart
2017-02-06 18:15 ` jacopo mondi
2017-02-06 18:28 ` Tony Lindgren
2017-02-07 10:27 ` jacopo mondi
2017-01-25 18:09 ` [RFC 2/5] pinctrl: rz-pfc: Add Renesas RZ/A1 pinctrl driver Jacopo Mondi
2017-01-26 19:49 ` Geert Uytterhoeven
2017-01-30 19:19 ` Chris Brandt
2017-01-31 10:39 ` Laurent Pinchart
2017-01-31 14:11 ` Chris Brandt
2017-02-01 15:25 ` Laurent Pinchart
2017-01-25 18:09 ` [RFC 3/5] arm: dts: dt-bindings: Add Renesas RZ pinctrl header Jacopo Mondi
2017-01-26 19:52 ` Geert Uytterhoeven
2017-01-30 18:30 ` Laurent Pinchart
2017-01-31 9:12 ` jacopo mondi
2017-01-31 9:31 ` Geert Uytterhoeven
2017-01-31 14:00 ` Chris Brandt
2017-01-25 18:09 ` [RFC 4/5] arm: dts: r7s1000: Add pincontroller node Jacopo Mondi
2017-01-26 9:49 ` Sergei Shtylyov
2017-01-26 19:54 ` Geert Uytterhoeven
2017-01-31 10:24 ` jacopo mondi
2017-01-31 10:34 ` Geert Uytterhoeven
2017-01-30 18:29 ` Laurent Pinchart
2017-01-30 19:39 ` Chris Brandt
2017-01-31 10:35 ` Laurent Pinchart
2017-01-31 14:08 ` Chris Brandt
2017-01-25 18:09 ` [RFC 5/5] arm: dts: genmai: Add SCIF2 pin group Jacopo Mondi
2017-01-26 9:51 ` Sergei Shtylyov
2017-01-30 18:17 ` Laurent Pinchart
2017-01-30 18:55 ` Geert Uytterhoeven
2017-01-26 2:57 ` [RFC 0/5] Renesas RZ series pinctrl driver Chris Brandt
2017-01-26 19:56 ` Geert Uytterhoeven
2017-01-27 16:47 ` [RFC fixes 0/2] FIX: " Jacopo Mondi
2017-01-27 16:47 ` [RFC fixes 1/2] arm: dts: genmai: Configure RIIC2 pins Jacopo Mondi
2017-01-30 18:49 ` Laurent Pinchart
2017-01-27 16:47 ` [RFC fixes 2/2] pinctrl: rz-pfc: Fix RZ/A1 pin function configuration Jacopo Mondi
2017-01-27 21:09 ` [RFC fixes 0/2] FIX: Renesas RZ series pinctrl driver Chris Brandt
2017-01-30 15:47 ` jacopo mondi
2017-01-30 16:29 ` Chris Brandt
2017-01-30 13:51 ` [RFC 0/5] " Linus Walleij
2017-01-30 15:53 ` Tony Lindgren
2017-01-30 16:18 ` jacopo mondi
2017-01-30 16:08 ` Geert Uytterhoeven
2017-01-30 18:59 ` Laurent Pinchart
2017-01-30 19:49 ` Chris Brandt
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