From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Andrey Gusakov <andrey.gusakov@cogentembedded.com>,
Vladimir Barinov <vladimir.barinov@cogentembedded.com>,
LUU HOAI <hoai.luu.ub@renesas.com>
Subject: Re: [PATCH] pinctrl: renesas: r8a779[56]x: add MediaLB pins
Date: Thu, 7 Oct 2021 18:48:52 +0200 [thread overview]
Message-ID: <CAMuHMdUvNM8Tu-+Ed0vjB2-_JUQe7ojUPbzJM=Vy1m_j31sNSg@mail.gmail.com> (raw)
In-Reply-To: <20210929211350.4226-1-nikita.yoush@cogentembedded.com>
Hi Nikita,
On Wed, Sep 29, 2021 at 11:14 PM Nikita Yushchenko
<nikita.yoush@cogentembedded.com> wrote:
> From: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
>
> This adds pins, groups, and functions for MediaLB device on Renesas
> H3 and M3.
>
> Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
> Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
> Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com>
> Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Thanks for your patch!
> --- a/drivers/pinctrl/renesas/pfc-r8a77950.c
> +++ b/drivers/pinctrl/renesas/pfc-r8a77950.c
> @@ -2369,6 +2369,14 @@ static const unsigned int intc_ex_irq5_mux[] = {
> IRQ5_MARK,
> };
>
> +/* - MLB+ ------------------------------------------------------------------- */
> +static const unsigned int mlb_3pin_pins[] = {
> + RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
> +};
> +static const unsigned int mlb_3pin_mux[] = {
> + MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
> +};
> +
> /* - MSIOF0 ----------------------------------------------------------------- */
> static const unsigned int msiof0_clk_pins[] = {
> /* SCK */
> @@ -3987,6 +3995,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
> SH_PFC_PIN_GROUP(intc_ex_irq3),
> SH_PFC_PIN_GROUP(intc_ex_irq4),
> SH_PFC_PIN_GROUP(intc_ex_irq5),
> + SH_PFC_PIN_GROUP(mlb_3pin),
> SH_PFC_PIN_GROUP(msiof0_clk),
> SH_PFC_PIN_GROUP(msiof0_sync),
> SH_PFC_PIN_GROUP(msiof0_ss1),
> @@ -4380,6 +4389,10 @@ static const char * const intc_ex_groups[] = {
> "intc_ex_irq5",
> };
>
> +static const char * const mlb_3pin_groups[] = {
> + "mlb_3pin",
> +};
> +
> static const char * const msiof0_groups[] = {
> "msiof0_clk",
> "msiof0_sync",
> @@ -4709,6 +4722,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
> SH_PFC_FUNCTION(i2c5),
> SH_PFC_FUNCTION(i2c6),
> SH_PFC_FUNCTION(intc_ex),
> + SH_PFC_FUNCTION(mlb_3pin),
> SH_PFC_FUNCTION(msiof0),
> SH_PFC_FUNCTION(msiof1),
> SH_PFC_FUNCTION(msiof2),
This part looks fine to me.
> diff --git a/drivers/pinctrl/renesas/pfc-r8a77951.c b/drivers/pinctrl/renesas/pfc-r8a77951.c
> index 84c0ea5d59c1..4e4e39640df4 100644
> --- a/drivers/pinctrl/renesas/pfc-r8a77951.c
> +++ b/drivers/pinctrl/renesas/pfc-r8a77951.c
> @@ -2453,6 +2453,14 @@ static const unsigned int intc_ex_irq5_mux[] = {
> IRQ5_MARK,
> };
>
> +/* - MLB+ ------------------------------------------------------------------- */
> +static const unsigned int mlb_3pin_pins[] = {
> + RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
> +};
> +static const unsigned int mlb_3pin_mux[] = {
> + MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
> +};
> +
> /* - MSIOF0 ----------------------------------------------------------------- */
> static const unsigned int msiof0_clk_pins[] = {
> /* SCK */
> @@ -4233,7 +4241,7 @@ static const unsigned int vin5_clk_mux[] = {
> };
>
> static const struct {
> - struct sh_pfc_pin_group common[328];
> + struct sh_pfc_pin_group common[329];
As MLB is not available on RZ/G2 SoCs, only on R-Car Gen3 SoCs, it should
be added to the automotive sections instead of the common sections.
This applies to pfc-r8a7796.c and pfc-r8a77965.c, too.
> --- a/drivers/pinctrl/renesas/pfc-r8a7796.c
> +++ b/drivers/pinctrl/renesas/pfc-r8a7796.c
> @@ -2458,6 +2458,14 @@ static const unsigned int intc_ex_irq5_mux[] = {
> IRQ5_MARK,
> };
>
> +/* - MLB+ ------------------------------------------------------------------- */
> +static const unsigned int mlb_3pin_pins[] = {
> + RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
> +};
> +static const unsigned int mlb_3pin_mux[] = {
> + MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
> +};
> +
> /* - MSIOF0 ----------------------------------------------------------------- */
> static const unsigned int msiof0_clk_pins[] = {
> /* SCK */
> @@ -4301,6 +4309,7 @@ static const struct {
> SH_PFC_PIN_GROUP(intc_ex_irq3),
> SH_PFC_PIN_GROUP(intc_ex_irq4),
> SH_PFC_PIN_GROUP(intc_ex_irq5),
> + SH_PFC_PIN_GROUP(mlb_3pin),
error: excess elements in array initializer [-Werror]
> SH_PFC_PIN_GROUP(msiof0_clk),
> SH_PFC_PIN_GROUP(msiof0_sync),
> SH_PFC_PIN_GROUP(msiof0_ss1),
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2021-10-07 16:49 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-29 21:13 [PATCH] pinctrl: renesas: r8a779[56]x: add MediaLB pins Nikita Yushchenko
2021-10-07 16:48 ` Geert Uytterhoeven [this message]
2021-10-07 20:02 ` [PATCH v2] " Nikita Yushchenko
2021-10-08 12:48 ` Geert Uytterhoeven
2021-10-14 19:26 ` Nikita Yushchenko
2021-10-14 19:39 ` Geert Uytterhoeven
2021-10-15 7:57 ` Geert Uytterhoeven
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