From: Geert Uytterhoeven <geert@linux-m68k.org>
To: "Niklas Söderlund" <niklas.soderlund+renesas@ragnatech.se>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Linus Walleij <linus.walleij@linaro.org>,
Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>
Subject: Re: [PATCHv2 2/4] pinctrl: sh-pfc: r8a7795: Support none GPIO pins with configurable drive-strength
Date: Mon, 7 Nov 2016 12:18:23 +0100 [thread overview]
Message-ID: <CAMuHMdVVO_mfbmQnB4wM6VQmJRTbKma7fc16HHJn-8AgW8YitA@mail.gmail.com> (raw)
In-Reply-To: <20161103161530.11763-3-niklas.soderlund+renesas@ragnatech.se>
Hi Niklas,
On Thu, Nov 3, 2016 at 5:15 PM, Niklas Söderlund
<niklas.soderlund+renesas@ragnatech.se> wrote:
> There are pins on the r8a7795 which are not part of a GPIO bank nor
> can be muxed between different functions. They do however allow for the
> drive-strength to be configured. Add those pins to the list of pins and
> to the drive-strength configuration registers.
>
> The pins can now be referred to in DT by their physical location and the
s/their physical location/function names/
> drive-strength modified.
and their drive-strengths
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2016-11-07 11:18 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-03 16:15 [PATCHv2 0/4] pinctrl: sh-pfc: r8a7795: Support none GPIO pins with configurable drive-strength Niklas Söderlund
2016-11-03 16:15 ` [PATCHv2 1/4] pinctrl: sh-pfc: Support named pins with custom configuration Niklas Söderlund
2016-11-03 16:15 ` [PATCHv2 2/4] pinctrl: sh-pfc: r8a7795: Support none GPIO pins with configurable drive-strength Niklas Söderlund
2016-11-07 11:18 ` Geert Uytterhoeven [this message]
2016-11-03 16:15 ` [PATCHv2 3/4] pinctrl: sh-pfc: r8a7795: Add group for AVB MDIO and MII pins Niklas Söderlund
2016-11-03 16:15 ` [PATCHv2 4/4] pinctrl: sh-pfc: r8a7795: Add group for QSPI0 and QSPI1 pins Niklas Söderlund
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAMuHMdVVO_mfbmQnB4wM6VQmJRTbKma7fc16HHJn-8AgW8YitA@mail.gmail.com \
--to=geert@linux-m68k.org \
--cc=geert+renesas@glider.be \
--cc=laurent.pinchart@ideasonboard.com \
--cc=linus.walleij@linaro.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=niklas.soderlund+renesas@ragnatech.se \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).