From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Cc: "linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
Linus Walleij <linus.walleij@linaro.org>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Simon Horman <horms@verge.net.au>,
Magnus Damm <magnus.damm@gmail.com>,
Linux-Renesas <linux-renesas-soc@vger.kernel.org>
Subject: Re: [PATCH] pinctrl: sh-pfc: r8a7796: Rename RTS{0,1,3,4}# pin function definitions
Date: Thu, 23 Nov 2017 11:40:34 +0100 [thread overview]
Message-ID: <CAMuHMdXYMH3h_FGVv4Ysw0HiTH=2J1w9Unv6bVfTHiCaxwtwgg@mail.gmail.com> (raw)
In-Reply-To: <1510844361-24114-1-git-send-email-ykaneko0929@gmail.com>
On Thu, Nov 16, 2017 at 3:59 PM, Yoshihiro Kaneko <ykaneko0929@gmail.com> wrote:
> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
>
> This patch renames the pin function macro definitions of the GPSR5 and
> IPSR{0,3,5,6,12} registers value for the RTS{0,1,3,4}# pin.
>
> This is a correction because GPSR and IPSR register specification for
> R8A7796 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.54E.
>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in sh-pfc-for-v4.16.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
prev parent reply other threads:[~2017-11-23 10:40 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-16 14:59 [PATCH] pinctrl: sh-pfc: r8a7796: Rename RTS{0,1,3,4}# pin function definitions Yoshihiro Kaneko
2017-11-23 10:40 ` Geert Uytterhoeven [this message]
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