From: Emil Renner Berthing <kernel@esmil.dk>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: linux-riscv <linux-riscv@lists.infradead.org>,
devicetree <devicetree@vger.kernel.org>,
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Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 09/16] reset: starfive-jh7100: Add StarFive JH7100 reset driver
Date: Fri, 22 Oct 2021 17:59:34 +0200 [thread overview]
Message-ID: <CANBLGcyOiOCeSg0ZHxHjOcpHT9HQ0X3_8Ovff4u2qOnB7BWOsw@mail.gmail.com> (raw)
In-Reply-To: <YXLenBb21jTZlGu0@smile.fi.intel.com>
On Fri, 22 Oct 2021 at 17:55, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
> On Fri, Oct 22, 2021 at 05:36:21PM +0200, Emil Renner Berthing wrote:
> > On Fri, 22 Oct 2021 at 17:25, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
> > > On Fri, Oct 22, 2021 at 5:56 PM Emil Renner Berthing <kernel@esmil.dk> wrote:
> > > > On Fri, 22 Oct 2021 at 16:50, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
> > > > > On Fri, Oct 22, 2021 at 5:25 PM Emil Renner Berthing <kernel@esmil.dk> wrote:
>
> ...
>
> > > > > AFAICS they are sequential 4 32-bit registers.
> > > >
> > > > That's right, but we're on a 64bit machine, so DECLARE_BITMAP will
> > > > give us an unsigned long array that doesn't match that.
> > >
> > > I didn't get it, sorry.
> > > You will have a bitmap array which you will split to 32-bit values.
> > > What you will probably need is to move xgpio_get_value32() and void
> > > xgpio_set_value32() to the one of bitmap related headers (look for
> > > bitmap_get_value8() and friends).
> > >
> > > > > So bitmap is exactly what is suitable here, you are right!
> > > > > See gpio-xilinx and gpio-pca953x on how to use bitmaps in the GPIO drivers.
> > > >
> > > > None of them has a pre-initialized const DECLARE_BITMAP, so they don't
> > > > have to deal with the 4 vs. 2 commas problem.
> > >
> > > I believe it's well possible to refactor this to look much better with
> > > bitmaps (as it represents the hardware very well).
> >
> > Right, but how exactly? This works on on 64bit, but not with 32bit COMPILE_TEST:
> >
> > static const DECLARE_BITMAP(jh7100_reset_asserted, JH7100_RSTN_END) = {
> > /* STATUS0 register */
> > BIT_MASK(JH7100_RST_U74) |
> > BIT_MASK(JH7100_RST_VP6_DRESET) |
> > BIT_MASK(JH7100_RST_VP6_BRESET) |
> > /* STATUS1 register */
> > BIT_MASK(JH7100_RST_HIFI4_DRESET) |
> > BIT_MASK(JH7100_RST_HIFI4_BRESET),
> > /* STATUS2 register */
> > BIT_MASK(JH7100_RST_E24) |
> > /* STATUS3 register */
> > 0,
> > };
>
> BITMAP_FROM_U64() ?
So you think this is better?
static const DECLARE_BITMAP(jh7100_reset_asserted, JH7100_RSTN_END) = {
BITMAP_FROM_U64(
/* STATUS0 register */
BIT_MASK(JH7100_RST_U74) |
BIT_MASK(JH7100_RST_VP6_DRESET) |
BIT_MASK(JH7100_RST_VP6_BRESET) |
/* STATUS1 register */
BIT_MASK(JH7100_RST_HIFI4_DRESET) |
BIT_MASK(JH7100_RST_HIFI4_BRESET)
),
BITMAP_FROM_U64(
/* STATUS2 register */
BIT_MASK(JH7100_RST_E24) |
/* STATUS3 register */
0
),
};
> > > > > > Also is there a macro for handling that we'd then need 4 commas on
> > > > > > 32bit COMPILE_TEST and 2 commas on 64bit?
> > > > > > If you have some other way in mind you'll have to be a lot more explicit again.
> > > > > >
> > > > > > The point of the jh7100_reset_asserted array is that it exactly
> > > > > > mirrors the values of the status registers when the lines are
> > > > > > asserted.
>
> --
> With Best Regards,
> Andy Shevchenko
>
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2021-10-22 15:59 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-21 17:42 [PATCH v2 00/16] Basic StarFive JH7100 RISC-V SoC support Emil Renner Berthing
2021-10-21 17:42 ` [PATCH v2 01/16] RISC-V: Add StarFive SoC Kconfig option Emil Renner Berthing
2021-10-22 8:50 ` Andy Shevchenko
2021-10-22 9:40 ` Emil Renner Berthing
2021-10-22 12:40 ` Andy Shevchenko
2021-10-21 17:42 ` [PATCH v2 02/16] dt-bindings: timer: Add StarFive JH7100 clint Emil Renner Berthing
2021-10-21 17:42 ` [PATCH v2 03/16] dt-bindings: interrupt-controller: Add StarFive JH7100 plic Emil Renner Berthing
2021-10-29 1:37 ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 04/16] dt-bindings: clock: starfive: Add JH7100 clock definitions Emil Renner Berthing
2021-10-29 1:42 ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 05/16] dt-bindings: clock: starfive: Add JH7100 bindings Emil Renner Berthing
2021-10-29 1:42 ` Rob Herring
2021-10-29 13:05 ` Emil Renner Berthing
2021-10-21 17:42 ` [PATCH v2 06/16] clk: starfive: Add JH7100 clock generator driver Emil Renner Berthing
2021-10-22 12:33 ` Andy Shevchenko
2021-10-22 12:44 ` Geert Uytterhoeven
2021-10-22 13:13 ` Emil Renner Berthing
2021-10-22 13:35 ` Andy Shevchenko
2021-10-26 20:19 ` Stephen Boyd
2021-10-26 22:35 ` Emil Renner Berthing
2021-10-27 0:54 ` Stephen Boyd
2021-10-27 9:30 ` Andy Shevchenko
2021-10-27 10:24 ` Emil Renner Berthing
2021-10-27 10:32 ` Andy Shevchenko
2021-10-27 11:22 ` Heiko Stübner
2021-10-21 17:42 ` [PATCH v2 07/16] dt-bindings: reset: Add StarFive JH7100 reset definitions Emil Renner Berthing
2021-10-29 1:42 ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 08/16] dt-bindings: reset: Add Starfive JH7100 reset bindings Emil Renner Berthing
2021-10-29 1:43 ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 09/16] reset: starfive-jh7100: Add StarFive JH7100 reset driver Emil Renner Berthing
2021-10-22 12:55 ` Andy Shevchenko
2021-10-22 13:34 ` Emil Renner Berthing
2021-10-22 13:38 ` Andy Shevchenko
2021-10-22 13:50 ` Emil Renner Berthing
2021-10-22 13:56 ` Andy Shevchenko
2021-10-22 14:25 ` Emil Renner Berthing
2021-10-22 14:49 ` Andy Shevchenko
2021-10-22 14:50 ` Andy Shevchenko
2021-10-22 14:56 ` Emil Renner Berthing
2021-10-22 15:24 ` Andy Shevchenko
2021-10-22 15:36 ` Emil Renner Berthing
2021-10-22 15:54 ` Andy Shevchenko
2021-10-22 15:59 ` Emil Renner Berthing [this message]
2021-10-22 13:06 ` Andreas Schwab
2021-10-22 13:41 ` Emil Renner Berthing
2021-10-21 17:42 ` [PATCH v2 10/16] dt-bindings: pinctrl: Add StarFive pinctrl definitions Emil Renner Berthing
2021-10-29 1:44 ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 11/16] dt-bindings: pinctrl: Add StarFive JH7100 bindings Emil Renner Berthing
2021-10-24 23:11 ` Linus Walleij
2021-10-25 0:35 ` Emil Renner Berthing
2021-10-29 1:50 ` Rob Herring
2021-10-29 13:00 ` Emil Renner Berthing
2021-10-29 14:44 ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 12/16] pinctrl: starfive: Add pinctrl driver for StarFive SoCs Emil Renner Berthing
2021-10-21 19:01 ` Drew Fustini
2021-10-21 19:50 ` Emil Renner Berthing
2021-10-22 2:06 ` Drew Fustini
2021-10-22 13:31 ` Andy Shevchenko
2021-10-23 18:45 ` Emil Renner Berthing
2021-10-23 20:28 ` Andy Shevchenko
2021-10-23 21:02 ` Emil Renner Berthing
2021-10-24 9:29 ` Emil Renner Berthing
2021-10-25 10:15 ` Andy Shevchenko
2021-10-25 10:24 ` Emil Renner Berthing
2021-10-25 10:51 ` Andy Shevchenko
2021-10-28 20:17 ` kernel test robot
2021-10-21 17:42 ` [PATCH v2 13/16] dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts Emil Renner Berthing
2021-10-29 1:50 ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 14/16] serial: 8250_dw: Add skip_clk_set_rate quirk Emil Renner Berthing
2021-10-21 17:42 ` [PATCH v2 15/16] RISC-V: Add initial StarFive JH7100 device tree Emil Renner Berthing
2021-10-21 17:42 ` [PATCH v2 16/16] RISC-V: Add BeagleV Starlight Beta " Emil Renner Berthing
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