From: Sam Protsenko <semen.protsenko@linaro.org>
To: Peter Griffin <peter.griffin@linaro.org>
Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
mturquette@baylibre.com, conor+dt@kernel.org, sboyd@kernel.org,
tomasz.figa@gmail.com, s.nawrocki@samsung.com,
linus.walleij@linaro.org, wim@linux-watchdog.org,
linux@roeck-us.net, catalin.marinas@arm.com, will@kernel.org,
arnd@arndb.de, olof@lixom.net, gregkh@linuxfoundation.org,
jirislaby@kernel.org, cw00.choi@samsung.com,
alim.akhtar@samsung.com, tudor.ambarus@linaro.org,
andre.draszik@linaro.org, saravanak@google.com,
willmcvicker@google.com, soc@kernel.org,
devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org,
kernel-team@android.com, linux-serial@vger.kernel.org
Subject: Re: [PATCH v7 06/16] dt-bindings: clock: google,gs101: fix incorrect numbering and DGB suffix
Date: Mon, 11 Dec 2023 16:38:11 -0600 [thread overview]
Message-ID: <CAPLW+4=ZCyyQpzt-QRVeLeORdir99e311WxoY+q1DP9GzU7s4A@mail.gmail.com> (raw)
In-Reply-To: <20231211162331.435900-7-peter.griffin@linaro.org>
On Mon, Dec 11, 2023 at 10:24 AM Peter Griffin <peter.griffin@linaro.org> wrote:
>
> 166 was skipped by mistake and two clocks:
> * CLK_MOUT_CMU_HSI0_USBDPDGB
> * CLK_GOUT_HSI0_USBDPDGB
>
> Have an incorrect DGB ending instead of DBG.
>
> This is an ABI break, but as the patch was only applied yesterday this
> header has never been in an actual release so it seems better to fix
> this early than ignore it.
>
> Fixes: 0a910f160638 ("dt-bindings: clock: Add Google gs101 clock management unit bindings")
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
> ---
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
> include/dt-bindings/clock/google,gs101.h | 118 +++++++++++------------
> 1 file changed, 59 insertions(+), 59 deletions(-)
>
> diff --git a/include/dt-bindings/clock/google,gs101.h b/include/dt-bindings/clock/google,gs101.h
> index 5d2c2d907a7b..9761c0b24e66 100644
> --- a/include/dt-bindings/clock/google,gs101.h
> +++ b/include/dt-bindings/clock/google,gs101.h
> @@ -59,7 +59,7 @@
> #define CLK_MOUT_CMU_HSI0_BUS 45
> #define CLK_MOUT_CMU_HSI0_DPGTC 46
> #define CLK_MOUT_CMU_HSI0_USB31DRD 47
> -#define CLK_MOUT_CMU_HSI0_USBDPDGB 48
> +#define CLK_MOUT_CMU_HSI0_USBDPDBG 48
> #define CLK_MOUT_CMU_HSI1_BUS 49
> #define CLK_MOUT_CMU_HSI1_PCIE 50
> #define CLK_MOUT_CMU_HSI2_BUS 51
> @@ -181,64 +181,64 @@
> #define CLK_GOUT_BUS2_BUS 163
> #define CLK_GOUT_CIS_CLK0 164
> #define CLK_GOUT_CIS_CLK1 165
> -#define CLK_GOUT_CIS_CLK2 167
> -#define CLK_GOUT_CIS_CLK3 168
> -#define CLK_GOUT_CIS_CLK4 169
> -#define CLK_GOUT_CIS_CLK5 170
> -#define CLK_GOUT_CIS_CLK6 171
> -#define CLK_GOUT_CIS_CLK7 172
> -#define CLK_GOUT_CMU_BOOST 173
> -#define CLK_GOUT_CORE_BUS 174
> -#define CLK_GOUT_CPUCL0_DBG 175
> -#define CLK_GOUT_CPUCL0_SWITCH 176
> -#define CLK_GOUT_CPUCL1_SWITCH 177
> -#define CLK_GOUT_CPUCL2_SWITCH 178
> -#define CLK_GOUT_CSIS_BUS 179
> -#define CLK_GOUT_DISP_BUS 180
> -#define CLK_GOUT_DNS_BUS 181
> -#define CLK_GOUT_DPU_BUS 182
> -#define CLK_GOUT_EH_BUS 183
> -#define CLK_GOUT_G2D_G2D 184
> -#define CLK_GOUT_G2D_MSCL 185
> -#define CLK_GOUT_G3AA_G3AA 186
> -#define CLK_GOUT_G3D_BUSD 187
> -#define CLK_GOUT_G3D_GLB 188
> -#define CLK_GOUT_G3D_SWITCH 189
> -#define CLK_GOUT_GDC_GDC0 190
> -#define CLK_GOUT_GDC_GDC1 191
> -#define CLK_GOUT_GDC_SCSC 192
> -#define CLK_GOUT_CMU_HPM 193
> -#define CLK_GOUT_HSI0_BUS 194
> -#define CLK_GOUT_HSI0_DPGTC 195
> -#define CLK_GOUT_HSI0_USB31DRD 196
> -#define CLK_GOUT_HSI0_USBDPDGB 197
> -#define CLK_GOUT_HSI1_BUS 198
> -#define CLK_GOUT_HSI1_PCIE 199
> -#define CLK_GOUT_HSI2_BUS 200
> -#define CLK_GOUT_HSI2_MMC_CARD 201
> -#define CLK_GOUT_HSI2_PCIE 202
> -#define CLK_GOUT_HSI2_UFS_EMBD 203
> -#define CLK_GOUT_IPP_BUS 204
> -#define CLK_GOUT_ITP_BUS 205
> -#define CLK_GOUT_MCSC_ITSC 206
> -#define CLK_GOUT_MCSC_MCSC 207
> -#define CLK_GOUT_MFC_MFC 208
> -#define CLK_GOUT_MIF_BUSP 209
> -#define CLK_GOUT_MISC_BUS 210
> -#define CLK_GOUT_MISC_SSS 211
> -#define CLK_GOUT_PDP_BUS 212
> -#define CLK_GOUT_PDP_VRA 213
> -#define CLK_GOUT_G3AA 214
> -#define CLK_GOUT_PERIC0_BUS 215
> -#define CLK_GOUT_PERIC0_IP 216
> -#define CLK_GOUT_PERIC1_BUS 217
> -#define CLK_GOUT_PERIC1_IP 218
> -#define CLK_GOUT_TNR_BUS 219
> -#define CLK_GOUT_TOP_CMUREF 220
> -#define CLK_GOUT_TPU_BUS 221
> -#define CLK_GOUT_TPU_TPU 222
> -#define CLK_GOUT_TPU_TPUCTL 223
> -#define CLK_GOUT_TPU_UART 224
> +#define CLK_GOUT_CIS_CLK2 166
> +#define CLK_GOUT_CIS_CLK3 167
> +#define CLK_GOUT_CIS_CLK4 168
> +#define CLK_GOUT_CIS_CLK5 169
> +#define CLK_GOUT_CIS_CLK6 170
> +#define CLK_GOUT_CIS_CLK7 171
> +#define CLK_GOUT_CMU_BOOST 172
> +#define CLK_GOUT_CORE_BUS 173
> +#define CLK_GOUT_CPUCL0_DBG 174
> +#define CLK_GOUT_CPUCL0_SWITCH 175
> +#define CLK_GOUT_CPUCL1_SWITCH 176
> +#define CLK_GOUT_CPUCL2_SWITCH 177
> +#define CLK_GOUT_CSIS_BUS 178
> +#define CLK_GOUT_DISP_BUS 179
> +#define CLK_GOUT_DNS_BUS 180
> +#define CLK_GOUT_DPU_BUS 181
> +#define CLK_GOUT_EH_BUS 182
> +#define CLK_GOUT_G2D_G2D 183
> +#define CLK_GOUT_G2D_MSCL 184
> +#define CLK_GOUT_G3AA_G3AA 185
> +#define CLK_GOUT_G3D_BUSD 186
> +#define CLK_GOUT_G3D_GLB 187
> +#define CLK_GOUT_G3D_SWITCH 188
> +#define CLK_GOUT_GDC_GDC0 189
> +#define CLK_GOUT_GDC_GDC1 190
> +#define CLK_GOUT_GDC_SCSC 191
> +#define CLK_GOUT_CMU_HPM 192
> +#define CLK_GOUT_HSI0_BUS 193
> +#define CLK_GOUT_HSI0_DPGTC 194
> +#define CLK_GOUT_HSI0_USB31DRD 195
> +#define CLK_GOUT_HSI0_USBDPDBG 196
> +#define CLK_GOUT_HSI1_BUS 197
> +#define CLK_GOUT_HSI1_PCIE 198
> +#define CLK_GOUT_HSI2_BUS 199
> +#define CLK_GOUT_HSI2_MMC_CARD 200
> +#define CLK_GOUT_HSI2_PCIE 201
> +#define CLK_GOUT_HSI2_UFS_EMBD 202
> +#define CLK_GOUT_IPP_BUS 203
> +#define CLK_GOUT_ITP_BUS 204
> +#define CLK_GOUT_MCSC_ITSC 205
> +#define CLK_GOUT_MCSC_MCSC 206
> +#define CLK_GOUT_MFC_MFC 207
> +#define CLK_GOUT_MIF_BUSP 208
> +#define CLK_GOUT_MISC_BUS 209
> +#define CLK_GOUT_MISC_SSS 210
> +#define CLK_GOUT_PDP_BUS 211
> +#define CLK_GOUT_PDP_VRA 212
> +#define CLK_GOUT_G3AA 213
> +#define CLK_GOUT_PERIC0_BUS 214
> +#define CLK_GOUT_PERIC0_IP 215
> +#define CLK_GOUT_PERIC1_BUS 216
> +#define CLK_GOUT_PERIC1_IP 217
> +#define CLK_GOUT_TNR_BUS 218
> +#define CLK_GOUT_TOP_CMUREF 219
> +#define CLK_GOUT_TPU_BUS 220
> +#define CLK_GOUT_TPU_TPU 221
> +#define CLK_GOUT_TPU_TPUCTL 222
> +#define CLK_GOUT_TPU_UART 223
>
> /* CMU_APM */
> #define CLK_MOUT_APM_FUNC 1
> --
> 2.43.0.472.g3155946c3a-goog
>
next prev parent reply other threads:[~2023-12-11 22:38 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-11 16:23 [PATCH v7 00/16] Add minimal Tensor/GS101 SoC support and Oriole/Pixel6 board Peter Griffin
2023-12-11 16:23 ` [PATCH v7 01/16] dt-bindings: watchdog: Document Google gs101 watchdog bindings Peter Griffin
2023-12-12 19:39 ` (subset) " Krzysztof Kozlowski
2023-12-11 16:23 ` [PATCH v7 02/16] dt-bindings: arm: google: Add bindings for Google ARM platforms Peter Griffin
2023-12-13 14:32 ` Rob Herring
2023-12-13 14:34 ` Peter Griffin
2023-12-13 19:16 ` (subset) " Krzysztof Kozlowski
2023-12-11 16:23 ` [PATCH v7 03/16] dt-bindings: serial: samsung: Add google-gs101-uart compatible Peter Griffin
2023-12-12 19:39 ` (subset) " Krzysztof Kozlowski
2023-12-11 16:23 ` [PATCH v7 04/16] dt-bindings: serial: samsung: Make samsung,uart-fifosize a required property Peter Griffin
2023-12-12 19:39 ` (subset) " Krzysztof Kozlowski
2023-12-11 16:23 ` [PATCH v7 05/16] dt-bindings: soc: samsung: usi: add google,gs101-usi compatible Peter Griffin
2023-12-12 19:39 ` (subset) " Krzysztof Kozlowski
2023-12-11 16:23 ` [PATCH v7 06/16] dt-bindings: clock: google,gs101: fix incorrect numbering and DGB suffix Peter Griffin
2023-12-11 16:36 ` André Draszik
2023-12-11 22:38 ` Sam Protsenko [this message]
2023-12-11 23:57 ` Chanwoo Choi
2023-12-12 19:39 ` (subset) " Krzysztof Kozlowski
2023-12-11 16:23 ` [PATCH v7 07/16] clk: samsung: clk-pll: Add support for pll_{0516,0517,518} Peter Griffin
2023-12-12 19:39 ` (subset) " Krzysztof Kozlowski
2023-12-11 16:23 ` [PATCH v7 08/16] clk: samsung: clk-gs101: Add cmu_top, cmu_misc and cmu_apm support Peter Griffin
2023-12-11 16:42 ` Rob Herring
2023-12-11 19:46 ` Peter Griffin
2023-12-12 19:38 ` Krzysztof Kozlowski
2023-12-12 19:43 ` Peter Griffin
2023-12-12 19:39 ` (subset) " Krzysztof Kozlowski
2023-12-11 16:23 ` [PATCH v7 09/16] pinctrl: samsung: Add gs101 SoC pinctrl configuration Peter Griffin
2023-12-11 21:02 ` Linus Walleij
2023-12-12 19:17 ` (subset) " Krzysztof Kozlowski
2023-12-13 16:24 ` Alim Akhtar
2023-12-11 16:23 ` [PATCH v7 10/16] watchdog: s3c2410_wdt: Add support for WTCON register DBGACK_MASK bit Peter Griffin
2023-12-13 16:32 ` Alim Akhtar
2023-12-13 19:16 ` (subset) " Krzysztof Kozlowski
2023-12-11 16:23 ` [PATCH v7 11/16] watchdog: s3c2410_wdt: Update QUIRK macros to use BIT macro Peter Griffin
2023-12-13 16:34 ` Alim Akhtar
2023-12-13 19:13 ` Peter Griffin
2023-12-13 19:19 ` Krzysztof Kozlowski
2023-12-13 19:16 ` (subset) " Krzysztof Kozlowski
2023-12-11 16:23 ` [PATCH v7 12/16] watchdog: s3c2410_wdt: Add support for Google gs101 SoC Peter Griffin
2023-12-12 21:18 ` Guenter Roeck
2023-12-13 16:42 ` Alim Akhtar
2023-12-13 19:14 ` Krzysztof Kozlowski
2023-12-13 19:16 ` (subset) " Krzysztof Kozlowski
2023-12-11 16:23 ` [PATCH v7 13/16] tty: serial: samsung: Add gs101 compatible and common fifoszdt_serial_drv_data Peter Griffin
2023-12-12 19:39 ` (subset) " Krzysztof Kozlowski
2023-12-13 16:44 ` Alim Akhtar
2023-12-11 16:23 ` [PATCH v7 14/16] arm64: dts: exynos: google: Add initial Google gs101 SoC support Peter Griffin
2023-12-13 19:16 ` (subset) " Krzysztof Kozlowski
2023-12-11 16:23 ` [PATCH v7 15/16] arm64: dts: exynos: google: Add initial Oriole/pixel 6 board support Peter Griffin
2023-12-13 16:59 ` Alim Akhtar
2023-12-13 19:16 ` (subset) " Krzysztof Kozlowski
2023-12-11 16:23 ` [PATCH v7 16/16] MAINTAINERS: add entry for Google Tensor SoC Peter Griffin
2023-12-13 17:00 ` Alim Akhtar
2023-12-13 19:16 ` (subset) " Krzysztof Kozlowski
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