Re: [PATCH v3 07/12] arm64: dts: qcom: sm6115: add LPASS devices

["Alexey Klimov" <alexey.klimov@linaro.org>]

On Thu May 22, 2025 at 6:52 PM BST, Krzysztof Kozlowski wrote:
> On 22/05/2025 19:40, Alexey Klimov wrote:
>> The rxmacro, txmacro, vamacro, soundwire nodes, lpass clock controllers
>> are required to support audio playback and audio capture on sm6115 and
>> its derivatives.
>> 
>> Cc: Konrad Dybcio <konradybcio@kernel.org>
>> Cc: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>
> Just keep one CC.

Question is which one now. Konrad, is it fine to keep your oss.qualcomm.com
email here?

>> Cc: Srinivas Kandagatla <srini@kernel.org>
>> Co-developed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>
> Missing SoB.

IIRC I took Konrad's changes but at this point I don't remember how much was changed.
So I need to switch to Konrad's owned completely or somehow indicate using tags
that it is initial Konrad's work.

Konrad, what's your preference here?

>> Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
>> ---
>>  arch/arm64/boot/dts/qcom/sm6115.dtsi | 132 +++++++++++++++++++++++++++++++++++
>>  1 file changed, 132 insertions(+)
>> 
>> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
>> index c8865779173eca65f9e94535b5339f590d4b1410..045887ae215b0965ffc098fd31fd18ac1ad90b7b 100644
>> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
>> @@ -2689,6 +2689,138 @@ funnel_apss1_in: endpoint {
>>  			};
>>  		};
>
>
>
> ...
>
>> +		swr0: soundwire@a740000 {
>> +			compatible = "qcom,soundwire-v1.6.0";
>> +			reg = <0x0 0x0a740000 0x0 0x2000>;
>> +			interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
>> +			clocks = <&txmacro>;
>> +			clock-names = "iface";
>> +
>> +			resets = <&lpasscc 0>;
>> +			reset-names = "swr_audio_cgcr";
>> +
>> +			label = "VA_TX";
>> +			qcom,din-ports = <3>;
>> +			qcom,dout-ports = <0>;
>> +
>> +			qcom,ports-sinterval-low =	/bits/ 8 <0x03 0x03 0x03>;
>> +			qcom,ports-offset1 =		/bits/ 8 <0x01 0x02 0x01>;
>> +			qcom,ports-offset2 =		/bits/ 8 <0x00 0x00 0x00>;
>> +			qcom,ports-hstart =		/bits/ 8 <0xff 0xff 0xff>;
>> +			qcom,ports-hstop =		/bits/ 8 <0xff 0xff 0xff>;
>> +			qcom,ports-word-length =	/bits/ 8 <0xff 0xff 0xff>;
>> +			qcom,ports-block-pack-mode =	/bits/ 8 <0xff 0xff 0xff>;
>> +			qcom,ports-block-group-count =	/bits/ 8 <0xff 0xff 0xff>;
>> +			qcom,ports-lane-control =	/bits/ 8 <0x00 0x00 0x00>;
>> +
>> +			#sound-dai-cells = <1>;
>> +			#address-cells = <2>;
>> +			#size-cells = <0>;
>
> Why this not is not disabled? That's a bus. Each bus node makes no sense
> on its own without the actual devices, thus it is always disabled in the
> SoC file. Just take a look at other DTSI.

Because I didn't know that. Ok, I'll add disable status to these.

>> +		};
>> +
>> +		lpasscc: clock-controller@a7ec000 {
>> +			compatible = "qcom,sm6115-lpasscc";
>> +			reg = <0x0 0x0a7ec000 0x0 0x1000>;
>> +			#reset-cells = <1>;
>> +		};
>> +
>>  		remoteproc_adsp: remoteproc@a400000 {
>
> Looks like not ordered by unit address.

Ok, I need to sort it then and check other parts to see if they are sorted or not.