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[144.178.202.139]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8dbf2ecc68sm137096266b.64.2026.01.28.06.53.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 28 Jan 2026 06:53:33 -0800 (PST) Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Wed, 28 Jan 2026 15:53:33 +0100 Message-Id: To: "Rob Herring (Arm)" , "Luca Weiss" Cc: "Konrad Dybcio" , , "Conor Dooley" , , , <~postmarketos/upstreaming@lists.sr.ht>, , "Linus Walleij" , , "Krzysztof Kozlowski" , "Bjorn Andersson" Subject: Re: [PATCH 1/5] dt-bindings: pinctrl: qcom: Add SM6350 LPI pinctrl From: "Luca Weiss" X-Mailer: aerc 0.21.0-0-g5549850facc2 References: <20260128-sm6350-lpi-tlmm-v1-0-36583f2a2a2a@fairphone.com> <20260128-sm6350-lpi-tlmm-v1-1-36583f2a2a2a@fairphone.com> <176960748074.1497503.9897313421386306393.robh@kernel.org> In-Reply-To: <176960748074.1497503.9897313421386306393.robh@kernel.org> On Wed Jan 28, 2026 at 2:38 PM CET, Rob Herring (Arm) wrote: > > On Wed, 28 Jan 2026 13:26:49 +0100, Luca Weiss wrote: >> Add bindings for pin controller in Low Power Audio SubSystem (LPASS). >>=20 >> Signed-off-by: Luca Weiss >> --- >> .../pinctrl/qcom,sm6350-lpass-lpi-pinctrl.yaml | 124 ++++++++++++++= +++++++ >> 1 file changed, 124 insertions(+) >>=20 > > My bot found errors running 'make dt_binding_check' on your patch: > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/p= inctrl/qcom,sm6350-lpass-lpi-pinctrl.example.dtb: pinctrl@33c0000 (qcom,sm6= 350-lpass-lpi-pinctrl): Unevaluated properties are not allowed ('i2s1-activ= e-pins' was unexpected) > from schema $id: http://devicetree.org/schemas/pinctrl/qcom,sm6350-lpass= -lpi-pinctrl.yaml I fixed the dtsi addition but forgot about the schema. Will include this diff in v2: diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-lpass-lp= i-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-lpas= s-lpi-pinctrl.yaml index 2fa2484e7bc7..4903b2d37d89 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-lpass-lpi-pinct= rl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-lpass-lpi-pinct= rl.yaml @@ -96,8 +96,8 @@ examples: clock-names =3D "core", "audio"; =20 - i2s1_active: i2s1-active-pins { - clk { + i2s1_active: i2s1-active-state { + clk-pins { pins =3D "gpio6"; function =3D "i2s1_clk"; drive-strength =3D <8>; @@ -105,7 +105,7 @@ examples: output-high; }; =20 - ws { + ws-pins { pins =3D "gpio7"; function =3D "i2s1_ws"; drive-strength =3D <8>; @@ -113,7 +113,7 @@ examples: output-high; }; =20 - data { + data-pins { pins =3D "gpio8", "gpio9"; function =3D "i2s1_data"; drive-strength =3D <8>; Regards Luca