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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id o20sm3560130oor.14.2021.02.22.08.43.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:43:57 -0800 (PST) Date: Mon, 22 Feb 2021 10:43:55 -0600 From: Bjorn Andersson To: Rajendra Nayak Cc: agross@kernel.org, linus.walleij@linaro.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Maulik Shah Subject: Re: [PATCH] pinctrl: qcom: sc7280: Add GPIO wakeup interrupt map Message-ID: References: <1613105974-28181-1-git-send-email-rnayak@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1613105974-28181-1-git-send-email-rnayak@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Thu 11 Feb 22:59 CST 2021, Rajendra Nayak wrote: > From: Maulik Shah > > GPIOs that can be configured as wakeup sources, have their > interrupt lines routed to PDC interrupt controller. > > Provide the interrupt map of the GPIO to its wakeup capable > interrupt parent. > Acked-by: Bjorn Andersson Regards, Bjorn > Signed-off-by: Maulik Shah > Signed-off-by: Rajendra Nayak > --- > drivers/pinctrl/qcom/pinctrl-sc7280.c | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/drivers/pinctrl/qcom/pinctrl-sc7280.c b/drivers/pinctrl/qcom/pinctrl-sc7280.c > index 8daccd5..99c416e 100644 > --- a/drivers/pinctrl/qcom/pinctrl-sc7280.c > +++ b/drivers/pinctrl/qcom/pinctrl-sc7280.c > @@ -1449,6 +1449,28 @@ static const struct msm_pingroup sc7280_groups[] = { > [182] = SDC_QDSD_PINGROUP(sdc2_data, 0x1b4000, 9, 0), > }; > > +static const struct msm_gpio_wakeirq_map sc7280_pdc_map[] = { > + { 0, 134 }, { 3, 131 }, { 4, 121 }, { 7, 103 }, { 8, 155 }, > + { 11, 93 }, { 12, 78 }, { 15, 79 }, { 16, 80 }, { 18, 81 }, > + { 19, 107 }, { 20, 82 }, { 21, 83 }, { 23, 99 }, { 24, 86 }, > + { 25, 95 }, { 27, 158 }, { 28, 159 }, { 31, 90 }, { 32, 144 }, > + { 34, 77 }, { 35, 92 }, { 36, 157 }, { 39, 73 }, { 40, 97 }, > + { 41, 98 }, { 43, 85 }, { 44, 100 }, { 45, 101 }, { 47, 102 }, > + { 48, 74 }, { 51, 112 }, { 52, 156 }, { 54, 117 }, { 55, 84 }, > + { 56, 108 }, { 59, 110 }, { 60, 111 }, { 61, 123 }, { 63, 104 }, > + { 68, 127 }, { 72, 150 }, { 75, 133 }, { 77, 125 }, { 78, 105 }, > + { 79, 106 }, { 80, 118 }, { 81, 119 }, { 82, 162 }, { 83, 122 }, > + { 86, 75 }, { 88, 154 }, { 89, 124 }, { 90, 149 }, { 91, 76 }, > + { 93, 128 }, { 95, 160 }, { 101, 126 }, { 102, 96 }, { 103, 116 }, > + { 104, 114 }, { 112, 72 }, { 116, 135 }, { 117, 163 }, { 119, 137 }, > + { 121, 138 }, { 123, 139 }, { 125, 140 }, { 127, 141 }, { 128, 165 }, > + { 129, 143 }, { 130, 94 }, { 131, 145 }, { 133, 146 }, { 136, 147 }, > + { 140, 148 }, { 141, 115 }, { 142, 113 }, { 145, 130 }, { 148, 132 }, > + { 150, 87 }, { 151, 88 }, { 153, 89 }, { 155, 164 }, { 156, 129 }, > + { 157, 161 }, { 158, 120 }, { 161, 136 }, { 163, 142 }, { 172, 166 }, > + { 174, 167 }, > +}; > + > static const struct msm_pinctrl_soc_data sc7280_pinctrl = { > .pins = sc7280_pins, > .npins = ARRAY_SIZE(sc7280_pins), > @@ -1457,6 +1479,8 @@ static const struct msm_pinctrl_soc_data sc7280_pinctrl = { > .groups = sc7280_groups, > .ngroups = ARRAY_SIZE(sc7280_groups), > .ngpios = 176, > + .wakeirq_map = sc7280_pdc_map, > + .nwakeirq_map = ARRAY_SIZE(sc7280_pdc_map), > }; > > static int sc7280_pinctrl_probe(struct platform_device *pdev) > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation >