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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id v66sm2608317otb.16.2021.03.08.19.42.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Mar 2021 19:42:45 -0800 (PST) Date: Mon, 8 Mar 2021 21:42:43 -0600 From: Bjorn Andersson To: Shawn Guo Cc: Linus Walleij , Andy Shevchenko , linux-gpio@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: Re: [PATCH v3 1/2] pinctrl: qcom: sc8180x: drop the use of tiles Message-ID: References: <20210304060520.24975-1-shawn.guo@linaro.org> <20210304060520.24975-2-shawn.guo@linaro.org> <20210309025604.GQ17424@dragon> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210309025604.GQ17424@dragon> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Mon 08 Mar 20:56 CST 2021, Shawn Guo wrote: > On Mon, Mar 08, 2021 at 07:08:00PM -0600, Bjorn Andersson wrote: > > On Thu 04 Mar 00:05 CST 2021, Shawn Guo wrote: > > > > > To support both ACPI and DT, it makes more sense to not use tiles for > > > pinctrl-sc8180x driver, as ACPI table describes TLMM block with one > > > single memory resource. Since DTS of SC8180X hasn't landed, there is > > > still chance to align DT description with ACPI. > > > > > > > I don't like the idea that we make up addresses to put in the DT to fit > > what was put in the DSDT. It is 3 different memory regions, with things > > in-between that Linux shouldn't touch. > > This is not a new idea but something pinctrl-sdm845 has been doing for > years. And IMHO, it's not a bad idea but a reasonable compromise. > SDM845 was the first platform where the previous contiguous TLMM block was split up in tiles, at the time we didn't see a need to split it up. But then we hit QCS404 (iirc) where one of the tiles was way off and concluded that we needed the DT binding to actually represent the hardware - so the tiles concept was introduced. Unfortunately introducing the tiles back into sdm845 would cause issues with existing DT, so that has not happened. > > Isn't it possible to during ACPI probe take reg 0 and register the 3 > > named regions instead? > > It is possible. But let's see what it takes. We will need to have some > quirk handling in the ACPI core to detect TLMM device on Flex 5G > machine, and then override the memory resource registration for that > device. Myself is not even convinced this is a good solution, not > mentioning whether ACPI maintainers will accept it. > I don't think this quirk should belong in the core. Can't you massage the resources once you're in the probe function in pinctrl-sc8180x.c? Or the platform resources can't be modified when we reach that point? Regards, Bjorn