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* [PATCH 0/8] Initial LG G Watch R support
@ 2021-09-11 23:26 Luca Weiss
  2021-09-11 23:26 ` [PATCH 1/8] pinctrl: qcom: msm8226: fill in more functions Luca Weiss
  0 siblings, 1 reply; 4+ messages in thread
From: Luca Weiss @ 2021-09-11 23:26 UTC (permalink / raw)
  To: linux-arm-msm
  Cc: ~postmarketos/upstreaming, bartosz.dudziak, Luca Weiss,
	Daniel Palmer, Hao Fang, Krzysztof Kozlowski, Linus Walleij,
	Max Merchel, Oleksij Rempel, Rob Herring, Sam Ravnborg, Shawn Guo,
	Stephen Boyd, devicetree, linux-arm-kernel, linux-gpio,
	linux-kernel, linux-mmc

Add support for more msm8226 hardware and the LG G Watch R smartwatch which
is based on apq8026.

Luca Weiss (8):
  pinctrl: qcom: msm8226: fill in more functions
  dt-bindings: mmc: sdhci-msm: Add compatible string for msm8226
  dt-bindings: firmware: scm: Add compatible for msm8226
  ARM: dts: qcom: msm8226: Add more SoC bits
  ARM: dts: qcom: Add pm8226 PMIC
  dt-bindings: vendor-prefixes: add LG Electronics
  dt-bindings: arm: qcom: Document APQ8026 SoC binding
  ARM: dts: qcom: Add support for LG G Watch R

 .../devicetree/bindings/arm/qcom.yaml         |   6 +
 .../devicetree/bindings/firmware/qcom,scm.txt |   1 +
 .../devicetree/bindings/mmc/sdhci-msm.txt     |   1 +
 .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
 arch/arm/boot/dts/Makefile                    |   1 +
 arch/arm/boot/dts/qcom-apq8026-lge-lenok.dts  | 237 ++++++++++++++++
 arch/arm/boot/dts/qcom-msm8226.dtsi           | 263 +++++++++++++++++-
 arch/arm/boot/dts/qcom-pm8226.dtsi            |  27 ++
 drivers/pinctrl/qcom/pinctrl-msm8226.c        |  74 +++--
 9 files changed, 582 insertions(+), 30 deletions(-)
 create mode 100644 arch/arm/boot/dts/qcom-apq8026-lge-lenok.dts
 create mode 100644 arch/arm/boot/dts/qcom-pm8226.dtsi

-- 
2.33.0


^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH 1/8] pinctrl: qcom: msm8226: fill in more functions
  2021-09-11 23:26 [PATCH 0/8] Initial LG G Watch R support Luca Weiss
@ 2021-09-11 23:26 ` Luca Weiss
  2021-09-13 17:45   ` Bjorn Andersson
  2021-09-17 22:31   ` Linus Walleij
  0 siblings, 2 replies; 4+ messages in thread
From: Luca Weiss @ 2021-09-11 23:26 UTC (permalink / raw)
  To: linux-arm-msm
  Cc: ~postmarketos/upstreaming, bartosz.dudziak, Luca Weiss,
	Bjorn Andersson, Andy Gross, Linus Walleij, linux-gpio,
	linux-kernel

Add the functions for QUP4 (spi, uart, uim & i2c), sdc3 and audio_pcm as
derived from the downstream gpiomux configuration.

Also sort the functions alphabetically, while we're at it.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
 drivers/pinctrl/qcom/pinctrl-msm8226.c | 74 ++++++++++++++++++--------
 1 file changed, 52 insertions(+), 22 deletions(-)

diff --git a/drivers/pinctrl/qcom/pinctrl-msm8226.c b/drivers/pinctrl/qcom/pinctrl-msm8226.c
index 98779e62e951..fca0645e8008 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm8226.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm8226.c
@@ -338,26 +338,32 @@ static const unsigned int sdc2_data_pins[] = { 122 };
  * the pingroup table below.
  */
 enum msm8226_functions {
-	MSM_MUX_gpio,
-	MSM_MUX_cci_i2c0,
+	MSM_MUX_audio_pcm,
 	MSM_MUX_blsp_i2c1,
 	MSM_MUX_blsp_i2c2,
 	MSM_MUX_blsp_i2c3,
+	MSM_MUX_blsp_i2c4,
 	MSM_MUX_blsp_i2c5,
 	MSM_MUX_blsp_spi1,
 	MSM_MUX_blsp_spi2,
 	MSM_MUX_blsp_spi3,
+	MSM_MUX_blsp_spi4,
 	MSM_MUX_blsp_spi5,
 	MSM_MUX_blsp_uart1,
 	MSM_MUX_blsp_uart2,
 	MSM_MUX_blsp_uart3,
+	MSM_MUX_blsp_uart4,
 	MSM_MUX_blsp_uart5,
 	MSM_MUX_blsp_uim1,
 	MSM_MUX_blsp_uim2,
 	MSM_MUX_blsp_uim3,
+	MSM_MUX_blsp_uim4,
 	MSM_MUX_blsp_uim5,
 	MSM_MUX_cam_mclk0,
 	MSM_MUX_cam_mclk1,
+	MSM_MUX_cci_i2c0,
+	MSM_MUX_gpio,
+	MSM_MUX_sdc3,
 	MSM_MUX_wlan,
 	MSM_MUX_NA,
 };
@@ -382,6 +388,10 @@ static const char * const gpio_groups[] = {
 	"gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
 };
 
+static const char * const audio_pcm_groups[] = {
+	"gpio63", "gpio64", "gpio65", "gpio66"
+};
+
 static const char * const blsp_uart1_groups[] = {
 	"gpio0", "gpio1", "gpio2", "gpio3"
 };
@@ -412,6 +422,16 @@ static const char * const blsp_spi3_groups[] = {
 	"gpio8", "gpio9", "gpio10", "gpio11"
 };
 
+static const char * const blsp_uart4_groups[] = {
+	"gpio12", "gpio13", "gpio14", "gpio15"
+};
+
+static const char * const blsp_uim4_groups[] = { "gpio12", "gpio13" };
+static const char * const blsp_i2c4_groups[] = { "gpio14", "gpio15" };
+static const char * const blsp_spi4_groups[] = {
+	"gpio12", "gpio13", "gpio14", "gpio15"
+};
+
 static const char * const blsp_uart5_groups[] = {
 	"gpio16", "gpio17", "gpio18", "gpio19"
 };
@@ -427,31 +447,41 @@ static const char * const cci_i2c0_groups[] = { "gpio29", "gpio30" };
 static const char * const cam_mclk0_groups[] = { "gpio26" };
 static const char * const cam_mclk1_groups[] = { "gpio27" };
 
+static const char * const sdc3_groups[] = {
+	"gpio39", "gpio40", "gpio41", "gpio42", "gpio43", "gpio44"
+};
+
 static const char * const wlan_groups[] = {
 	"gpio40", "gpio41", "gpio42", "gpio43", "gpio44"
 };
 
 static const struct msm_function msm8226_functions[] = {
-	FUNCTION(gpio),
-	FUNCTION(cci_i2c0),
-	FUNCTION(blsp_uim1),
-	FUNCTION(blsp_uim2),
-	FUNCTION(blsp_uim3),
-	FUNCTION(blsp_uim5),
+	FUNCTION(audio_pcm),
 	FUNCTION(blsp_i2c1),
 	FUNCTION(blsp_i2c2),
 	FUNCTION(blsp_i2c3),
+	FUNCTION(blsp_i2c4),
 	FUNCTION(blsp_i2c5),
 	FUNCTION(blsp_spi1),
 	FUNCTION(blsp_spi2),
 	FUNCTION(blsp_spi3),
+	FUNCTION(blsp_spi4),
 	FUNCTION(blsp_spi5),
 	FUNCTION(blsp_uart1),
 	FUNCTION(blsp_uart2),
 	FUNCTION(blsp_uart3),
+	FUNCTION(blsp_uart4),
 	FUNCTION(blsp_uart5),
+	FUNCTION(blsp_uim1),
+	FUNCTION(blsp_uim2),
+	FUNCTION(blsp_uim3),
+	FUNCTION(blsp_uim4),
+	FUNCTION(blsp_uim5),
 	FUNCTION(cam_mclk0),
 	FUNCTION(cam_mclk1),
+	FUNCTION(cci_i2c0),
+	FUNCTION(gpio),
+	FUNCTION(sdc3),
 	FUNCTION(wlan),
 };
 
@@ -468,10 +498,10 @@ static const struct msm_pingroup msm8226_groups[] = {
 	PINGROUP(9,   blsp_spi3, blsp_uart3, blsp_uim3, NA, NA, NA, NA),
 	PINGROUP(10,  blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA),
 	PINGROUP(11,  blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA),
-	PINGROUP(12,  NA, NA, NA, NA, NA, NA, NA),
-	PINGROUP(13,  NA, NA, NA, NA, NA, NA, NA),
-	PINGROUP(14,  NA, NA, NA, NA, NA, NA, NA),
-	PINGROUP(15,  NA, NA, NA, NA, NA, NA, NA),
+	PINGROUP(12,  blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA, NA),
+	PINGROUP(13,  blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA, NA),
+	PINGROUP(14,  blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA, NA),
+	PINGROUP(15,  blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA, NA),
 	PINGROUP(16,  blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA),
 	PINGROUP(17,  blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA),
 	PINGROUP(18,  blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA),
@@ -495,12 +525,12 @@ static const struct msm_pingroup msm8226_groups[] = {
 	PINGROUP(36,  NA, NA, NA, NA, NA, NA, NA),
 	PINGROUP(37,  NA, NA, NA, NA, NA, NA, NA),
 	PINGROUP(38,  NA, NA, NA, NA, NA, NA, NA),
-	PINGROUP(39,  NA, NA, NA, NA, NA, NA, NA),
-	PINGROUP(40,  wlan, NA, NA, NA, NA, NA, NA),
-	PINGROUP(41,  wlan, NA, NA, NA, NA, NA, NA),
-	PINGROUP(42,  wlan, NA, NA, NA, NA, NA, NA),
-	PINGROUP(43,  wlan, NA, NA, NA, NA, NA, NA),
-	PINGROUP(44,  wlan, NA, NA, NA, NA, NA, NA),
+	PINGROUP(39,  NA, sdc3, NA, NA, NA, NA, NA),
+	PINGROUP(40,  wlan, sdc3, NA, NA, NA, NA, NA),
+	PINGROUP(41,  wlan, sdc3, NA, NA, NA, NA, NA),
+	PINGROUP(42,  wlan, sdc3, NA, NA, NA, NA, NA),
+	PINGROUP(43,  wlan, sdc3, NA, NA, NA, NA, NA),
+	PINGROUP(44,  wlan, sdc3, NA, NA, NA, NA, NA),
 	PINGROUP(45,  NA, NA, NA, NA, NA, NA, NA),
 	PINGROUP(46,  NA, NA, NA, NA, NA, NA, NA),
 	PINGROUP(47,  NA, NA, NA, NA, NA, NA, NA),
@@ -519,10 +549,10 @@ static const struct msm_pingroup msm8226_groups[] = {
 	PINGROUP(60,  NA, NA, NA, NA, NA, NA, NA),
 	PINGROUP(61,  NA, NA, NA, NA, NA, NA, NA),
 	PINGROUP(62,  NA, NA, NA, NA, NA, NA, NA),
-	PINGROUP(63,  NA, NA, NA, NA, NA, NA, NA),
-	PINGROUP(64,  NA, NA, NA, NA, NA, NA, NA),
-	PINGROUP(65,  NA, NA, NA, NA, NA, NA, NA),
-	PINGROUP(66,  NA, NA, NA, NA, NA, NA, NA),
+	PINGROUP(63,  audio_pcm, NA, NA, NA, NA, NA, NA),
+	PINGROUP(64,  audio_pcm, NA, NA, NA, NA, NA, NA),
+	PINGROUP(65,  audio_pcm, NA, NA, NA, NA, NA, NA),
+	PINGROUP(66,  audio_pcm, NA, NA, NA, NA, NA, NA),
 	PINGROUP(67,  NA, NA, NA, NA, NA, NA, NA),
 	PINGROUP(68,  NA, NA, NA, NA, NA, NA, NA),
 	PINGROUP(69,  NA, NA, NA, NA, NA, NA, NA),
-- 
2.33.0


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH 1/8] pinctrl: qcom: msm8226: fill in more functions
  2021-09-11 23:26 ` [PATCH 1/8] pinctrl: qcom: msm8226: fill in more functions Luca Weiss
@ 2021-09-13 17:45   ` Bjorn Andersson
  2021-09-17 22:31   ` Linus Walleij
  1 sibling, 0 replies; 4+ messages in thread
From: Bjorn Andersson @ 2021-09-13 17:45 UTC (permalink / raw)
  To: Luca Weiss
  Cc: linux-arm-msm, ~postmarketos/upstreaming, bartosz.dudziak,
	Andy Gross, Linus Walleij, linux-gpio, linux-kernel

On Sat 11 Sep 18:26 CDT 2021, Luca Weiss wrote:

> Add the functions for QUP4 (spi, uart, uim & i2c), sdc3 and audio_pcm as
> derived from the downstream gpiomux configuration.
> 
> Also sort the functions alphabetically, while we're at it.
> 
> Signed-off-by: Luca Weiss <luca@z3ntu.xyz>

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Regards,
Bjorn

> ---
>  drivers/pinctrl/qcom/pinctrl-msm8226.c | 74 ++++++++++++++++++--------
>  1 file changed, 52 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/pinctrl/qcom/pinctrl-msm8226.c b/drivers/pinctrl/qcom/pinctrl-msm8226.c
> index 98779e62e951..fca0645e8008 100644
> --- a/drivers/pinctrl/qcom/pinctrl-msm8226.c
> +++ b/drivers/pinctrl/qcom/pinctrl-msm8226.c
> @@ -338,26 +338,32 @@ static const unsigned int sdc2_data_pins[] = { 122 };
>   * the pingroup table below.
>   */
>  enum msm8226_functions {
> -	MSM_MUX_gpio,
> -	MSM_MUX_cci_i2c0,
> +	MSM_MUX_audio_pcm,
>  	MSM_MUX_blsp_i2c1,
>  	MSM_MUX_blsp_i2c2,
>  	MSM_MUX_blsp_i2c3,
> +	MSM_MUX_blsp_i2c4,
>  	MSM_MUX_blsp_i2c5,
>  	MSM_MUX_blsp_spi1,
>  	MSM_MUX_blsp_spi2,
>  	MSM_MUX_blsp_spi3,
> +	MSM_MUX_blsp_spi4,
>  	MSM_MUX_blsp_spi5,
>  	MSM_MUX_blsp_uart1,
>  	MSM_MUX_blsp_uart2,
>  	MSM_MUX_blsp_uart3,
> +	MSM_MUX_blsp_uart4,
>  	MSM_MUX_blsp_uart5,
>  	MSM_MUX_blsp_uim1,
>  	MSM_MUX_blsp_uim2,
>  	MSM_MUX_blsp_uim3,
> +	MSM_MUX_blsp_uim4,
>  	MSM_MUX_blsp_uim5,
>  	MSM_MUX_cam_mclk0,
>  	MSM_MUX_cam_mclk1,
> +	MSM_MUX_cci_i2c0,
> +	MSM_MUX_gpio,
> +	MSM_MUX_sdc3,
>  	MSM_MUX_wlan,
>  	MSM_MUX_NA,
>  };
> @@ -382,6 +388,10 @@ static const char * const gpio_groups[] = {
>  	"gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
>  };
>  
> +static const char * const audio_pcm_groups[] = {
> +	"gpio63", "gpio64", "gpio65", "gpio66"
> +};
> +
>  static const char * const blsp_uart1_groups[] = {
>  	"gpio0", "gpio1", "gpio2", "gpio3"
>  };
> @@ -412,6 +422,16 @@ static const char * const blsp_spi3_groups[] = {
>  	"gpio8", "gpio9", "gpio10", "gpio11"
>  };
>  
> +static const char * const blsp_uart4_groups[] = {
> +	"gpio12", "gpio13", "gpio14", "gpio15"
> +};
> +
> +static const char * const blsp_uim4_groups[] = { "gpio12", "gpio13" };
> +static const char * const blsp_i2c4_groups[] = { "gpio14", "gpio15" };
> +static const char * const blsp_spi4_groups[] = {
> +	"gpio12", "gpio13", "gpio14", "gpio15"
> +};
> +
>  static const char * const blsp_uart5_groups[] = {
>  	"gpio16", "gpio17", "gpio18", "gpio19"
>  };
> @@ -427,31 +447,41 @@ static const char * const cci_i2c0_groups[] = { "gpio29", "gpio30" };
>  static const char * const cam_mclk0_groups[] = { "gpio26" };
>  static const char * const cam_mclk1_groups[] = { "gpio27" };
>  
> +static const char * const sdc3_groups[] = {
> +	"gpio39", "gpio40", "gpio41", "gpio42", "gpio43", "gpio44"
> +};
> +
>  static const char * const wlan_groups[] = {
>  	"gpio40", "gpio41", "gpio42", "gpio43", "gpio44"
>  };
>  
>  static const struct msm_function msm8226_functions[] = {
> -	FUNCTION(gpio),
> -	FUNCTION(cci_i2c0),
> -	FUNCTION(blsp_uim1),
> -	FUNCTION(blsp_uim2),
> -	FUNCTION(blsp_uim3),
> -	FUNCTION(blsp_uim5),
> +	FUNCTION(audio_pcm),
>  	FUNCTION(blsp_i2c1),
>  	FUNCTION(blsp_i2c2),
>  	FUNCTION(blsp_i2c3),
> +	FUNCTION(blsp_i2c4),
>  	FUNCTION(blsp_i2c5),
>  	FUNCTION(blsp_spi1),
>  	FUNCTION(blsp_spi2),
>  	FUNCTION(blsp_spi3),
> +	FUNCTION(blsp_spi4),
>  	FUNCTION(blsp_spi5),
>  	FUNCTION(blsp_uart1),
>  	FUNCTION(blsp_uart2),
>  	FUNCTION(blsp_uart3),
> +	FUNCTION(blsp_uart4),
>  	FUNCTION(blsp_uart5),
> +	FUNCTION(blsp_uim1),
> +	FUNCTION(blsp_uim2),
> +	FUNCTION(blsp_uim3),
> +	FUNCTION(blsp_uim4),
> +	FUNCTION(blsp_uim5),
>  	FUNCTION(cam_mclk0),
>  	FUNCTION(cam_mclk1),
> +	FUNCTION(cci_i2c0),
> +	FUNCTION(gpio),
> +	FUNCTION(sdc3),
>  	FUNCTION(wlan),
>  };
>  
> @@ -468,10 +498,10 @@ static const struct msm_pingroup msm8226_groups[] = {
>  	PINGROUP(9,   blsp_spi3, blsp_uart3, blsp_uim3, NA, NA, NA, NA),
>  	PINGROUP(10,  blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA),
>  	PINGROUP(11,  blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA),
> -	PINGROUP(12,  NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(13,  NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(14,  NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(15,  NA, NA, NA, NA, NA, NA, NA),
> +	PINGROUP(12,  blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA, NA),
> +	PINGROUP(13,  blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA, NA),
> +	PINGROUP(14,  blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA, NA),
> +	PINGROUP(15,  blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA, NA),
>  	PINGROUP(16,  blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA),
>  	PINGROUP(17,  blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA),
>  	PINGROUP(18,  blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA),
> @@ -495,12 +525,12 @@ static const struct msm_pingroup msm8226_groups[] = {
>  	PINGROUP(36,  NA, NA, NA, NA, NA, NA, NA),
>  	PINGROUP(37,  NA, NA, NA, NA, NA, NA, NA),
>  	PINGROUP(38,  NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(39,  NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(40,  wlan, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(41,  wlan, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(42,  wlan, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(43,  wlan, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(44,  wlan, NA, NA, NA, NA, NA, NA),
> +	PINGROUP(39,  NA, sdc3, NA, NA, NA, NA, NA),
> +	PINGROUP(40,  wlan, sdc3, NA, NA, NA, NA, NA),
> +	PINGROUP(41,  wlan, sdc3, NA, NA, NA, NA, NA),
> +	PINGROUP(42,  wlan, sdc3, NA, NA, NA, NA, NA),
> +	PINGROUP(43,  wlan, sdc3, NA, NA, NA, NA, NA),
> +	PINGROUP(44,  wlan, sdc3, NA, NA, NA, NA, NA),
>  	PINGROUP(45,  NA, NA, NA, NA, NA, NA, NA),
>  	PINGROUP(46,  NA, NA, NA, NA, NA, NA, NA),
>  	PINGROUP(47,  NA, NA, NA, NA, NA, NA, NA),
> @@ -519,10 +549,10 @@ static const struct msm_pingroup msm8226_groups[] = {
>  	PINGROUP(60,  NA, NA, NA, NA, NA, NA, NA),
>  	PINGROUP(61,  NA, NA, NA, NA, NA, NA, NA),
>  	PINGROUP(62,  NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(63,  NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(64,  NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(65,  NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(66,  NA, NA, NA, NA, NA, NA, NA),
> +	PINGROUP(63,  audio_pcm, NA, NA, NA, NA, NA, NA),
> +	PINGROUP(64,  audio_pcm, NA, NA, NA, NA, NA, NA),
> +	PINGROUP(65,  audio_pcm, NA, NA, NA, NA, NA, NA),
> +	PINGROUP(66,  audio_pcm, NA, NA, NA, NA, NA, NA),
>  	PINGROUP(67,  NA, NA, NA, NA, NA, NA, NA),
>  	PINGROUP(68,  NA, NA, NA, NA, NA, NA, NA),
>  	PINGROUP(69,  NA, NA, NA, NA, NA, NA, NA),
> -- 
> 2.33.0
> 

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH 1/8] pinctrl: qcom: msm8226: fill in more functions
  2021-09-11 23:26 ` [PATCH 1/8] pinctrl: qcom: msm8226: fill in more functions Luca Weiss
  2021-09-13 17:45   ` Bjorn Andersson
@ 2021-09-17 22:31   ` Linus Walleij
  1 sibling, 0 replies; 4+ messages in thread
From: Linus Walleij @ 2021-09-17 22:31 UTC (permalink / raw)
  To: Luca Weiss
  Cc: MSM,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS <devicetree@vger.kernel.org>, Hans de Goede <hdegoede@redhat.com>, Andy Shevchenko <andy.shevchenko@gmail.com>,,
	Bartosz Dudziak, Bjorn Andersson, Andy Gross,
	open list:GPIO SUBSYSTEM, linux-kernel

On Sun, Sep 12, 2021 at 1:28 AM Luca Weiss <luca@z3ntu.xyz> wrote:

> Add the functions for QUP4 (spi, uart, uim & i2c), sdc3 and audio_pcm as
> derived from the downstream gpiomux configuration.
>
> Also sort the functions alphabetically, while we're at it.
>
> Signed-off-by: Luca Weiss <luca@z3ntu.xyz>

This patch applied to the pinctrl tree for v5.16.

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2021-09-17 22:32 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2021-09-11 23:26 [PATCH 0/8] Initial LG G Watch R support Luca Weiss
2021-09-11 23:26 ` [PATCH 1/8] pinctrl: qcom: msm8226: fill in more functions Luca Weiss
2021-09-13 17:45   ` Bjorn Andersson
2021-09-17 22:31   ` Linus Walleij

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