[PATCH] pinctrl: tegra: Set SFIO mode to Mux Register

[PATCH] pinctrl: tegra: Set SFIO mode to Mux Register

[Prathamesh Shete]

If the device has the 'sfsel' bit field, pin should be
muxed to set to SFIO mode to be used for pinmux operation.

Signed-off-by: EJ Hsu <ejh@nvidia.com>
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
---
 drivers/pinctrl/tegra/pinctrl-tegra.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c
index 50bd26a30ac0..30341c43da59 100644
--- a/drivers/pinctrl/tegra/pinctrl-tegra.c
+++ b/drivers/pinctrl/tegra/pinctrl-tegra.c
@@ -270,6 +270,9 @@ static int tegra_pinctrl_set_mux(struct pinctrl_dev *pctldev,
 	val = pmx_readl(pmx, g->mux_bank, g->mux_reg);
 	val &= ~(0x3 << g->mux_bit);
 	val |= i << g->mux_bit;
+	/* Set the SFIO/GPIO selection to SFIO when under pinmux control*/
+	if (pmx->soc->sfsel_in_mux)
+		val |= (1 << g->sfsel_bit);
 	pmx_writel(pmx, val, g->mux_bank, g->mux_reg);
 
 	return 0;
-- 
2.17.1

Re: [PATCH] pinctrl: tegra: Set SFIO mode to Mux Register

[Thierry Reding]

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On Fri, Mar 11, 2022 at 10:00:15AM +0530, Prathamesh Shete wrote:
> If the device has the 'sfsel' bit field, pin should be
> muxed to set to SFIO mode to be used for pinmux operation.
> 
> Signed-off-by: EJ Hsu <ejh@nvidia.com>
> Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
> ---
>  drivers/pinctrl/tegra/pinctrl-tegra.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c
> index 50bd26a30ac0..30341c43da59 100644
> --- a/drivers/pinctrl/tegra/pinctrl-tegra.c
> +++ b/drivers/pinctrl/tegra/pinctrl-tegra.c
> @@ -270,6 +270,9 @@ static int tegra_pinctrl_set_mux(struct pinctrl_dev *pctldev,
>  	val = pmx_readl(pmx, g->mux_bank, g->mux_reg);
>  	val &= ~(0x3 << g->mux_bit);
>  	val |= i << g->mux_bit;
> +	/* Set the SFIO/GPIO selection to SFIO when under pinmux control*/
> +	if (pmx->soc->sfsel_in_mux)
> +		val |= (1 << g->sfsel_bit);
>  	pmx_writel(pmx, val, g->mux_bank, g->mux_reg);
>  
>  	return 0;

So this is basically what tegra_pinctrl_gpio_disable_free() does. I'm
wondering if we need to do both, though. Are ->gpio_disable_free() and
->set_mux() always called in tandem? I suspect they are not because
otherwise this wouldn't be needed.

On the other hand, if ->set_mux() can be called in a code path without
->gpio_disable_free() then this may be necessary to get the pin out of
SF mode. But that doesn't necessarily mean that the reverse is true.
If it isn't possible for ->gpio_disable_free() to be called in a code
path that doesn't have ->set_mux() then this patch would make the former
implementation redundant.

That said, upon inspecting the pinmux core, I don't see a 1:1
correlation between the two, so this seems fine.

It might be worth stating in the commit message what the practical
implications are of this. That is, you're explaining what you do in the
commit message and assert that this is what should be done. But it'd be
more useful to say *why* this is necessary. Specifically if this fixes a
bug, then say what kind of bug this would fix.

Thierry

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Re: [PATCH] pinctrl: tegra: Set SFIO mode to Mux Register

[Linus Walleij]

On Wed, Mar 23, 2022 at 1:31 PM Thierry Reding <thierry.reding@gmail.com> wrote:

> So this is basically what tegra_pinctrl_gpio_disable_free() does. I'm
> wondering if we need to do both, though. Are ->gpio_disable_free() and
> ->set_mux() always called in tandem? I suspect they are not because
> otherwise this wouldn't be needed.
>
> On the other hand, if ->set_mux() can be called in a code path without
> ->gpio_disable_free() then this may be necessary to get the pin out of
> SF mode. But that doesn't necessarily mean that the reverse is true.
> If it isn't possible for ->gpio_disable_free() to be called in a code
> path that doesn't have ->set_mux() then this patch would make the former
> implementation redundant.
>
> That said, upon inspecting the pinmux core, I don't see a 1:1
> correlation between the two, so this seems fine.

Yups that's how it works. .gpio_*() callbacks are just a shortcut
for enabling/disabling pins into GPIO mode, some drivers
don't even use it and rely on users to set
up the pin mux with explicit muxing instead. So these APIs
are orthogonal.

I'll wait for a version of the patch with your explicit reviewed-by
though.

Yours,
Linus Walleij