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Mon, 31 Mar 2025 06:16:10 -0700 (PDT) Received: from JSANTO12-L01.ad.analog.com ([189.121.203.94]) by smtp.gmail.com with ESMTPSA id af79cd13be357-7c5f765f94fsm498470285a.20.2025.03.31.06.16.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Mar 2025 06:16:10 -0700 (PDT) Date: Mon, 31 Mar 2025 10:16:05 -0300 From: Jonathan Santos To: Marcelo Schmitt Cc: Jonathan Santos , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, lars@metafoo.de, Michael.Hennerich@analog.com, marcelo.schmitt@analog.com, jic23@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linus.walleij@linaro.org, brgl@bgdev.pl, lgirdwood@gmail.com, broonie@kernel.org, dlechner@baylibre.com Subject: Re: [PATCH v4 02/17] iio: adc: ad7768-1: set MOSI idle state to prevent accidental reset Message-ID: Reply-To: Z8rhWLz32fdySDyN@debian-bullseye-live-builder-amd64 References: Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On 03/07, Marcelo Schmitt wrote: > On 03/06, Jonathan Santos wrote: > > Datasheet recommends Setting the MOSI idle state to high in order to > > prevent accidental reset of the device when SCLK is free running. > > This happens when the controller clocks out a 1 followed by 63 zeros > > while the CS is held low. > > > > Check if SPI controller supports SPI_MOSI_IDLE_HIGH flag and set it. > > > > Fixes: a5f8c7da3dbe ("iio: adc: Add AD7768-1 ADC basic support") > > Signed-off-by: Jonathan Santos > > --- > > LGTM > > Reviewed-by: Marcelo Schmitt > > > v4 Changes: > > * None. > > > > v3 Changes: > > * Patch moved closer to the start of the patch set. > > > > v2 Changes: > > * Only setup SPI_MOSI_IDLE_HIGH flag if the controller supports it, otherwise the driver > > continues the same. I realized that using bits_per_word does not avoid the problem that > > MOSI idle state is trying to solve. If the controller drives the MOSI low between bytes > > during a transfer, nothing happens. > > When you say nothing happens if the controller drives MOSI low between data > bytes you mean the data is still good in that case? Just trying to understand > the device behavior. Yes, it means that it does not affect the buffered reads and data is still OK. > > Thanks, > Marcelo > > > --- > > drivers/iio/adc/ad7768-1.c | 15 +++++++++++++++ > > 1 file changed, 15 insertions(+) > > > > diff --git a/drivers/iio/adc/ad7768-1.c b/drivers/iio/adc/ad7768-1.c > > index c3cf04311c40..2e2d50ccb744 100644 > > --- a/drivers/iio/adc/ad7768-1.c > > +++ b/drivers/iio/adc/ad7768-1.c > > @@ -574,6 +574,21 @@ static int ad7768_probe(struct spi_device *spi) > > return -ENOMEM; > > > > st = iio_priv(indio_dev); > > + /* > > + * Datasheet recommends SDI line to be kept high when data is not being > > + * clocked out of the controller and the spi clock is free running, > > + * to prevent accidental reset. > > + * Since many controllers do not support the SPI_MOSI_IDLE_HIGH flag > > + * yet, only request the MOSI idle state to enable if the controller > > + * supports it. > > + */ > > + if (spi->controller->mode_bits & SPI_MOSI_IDLE_HIGH) { > > + spi->mode |= SPI_MOSI_IDLE_HIGH; > > + ret = spi_setup(spi); > > + if (ret < 0) > > + return ret; > > + } > > + > > st->spi = spi; > > > > st->vref = devm_regulator_get(&spi->dev, "vref"); > > -- > > 2.34.1 > >