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[14.201.140.18]) by smtp.gmail.com with ESMTPSA id y12-20020a170902ed4c00b001c62c9d7289sm1539610plb.104.2023.09.26.03.41.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Sep 2023 03:41:07 -0700 (PDT) Date: Tue, 26 Sep 2023 18:41:00 +0800 From: Kent Gibson To: Andy Shevchenko Cc: Linus Walleij , Bartosz Golaszewski , Yury Norov , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Shubhrajyoti Datta , Srinivas Neeli , Michal Simek , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Marek =?iso-8859-1?Q?Beh=FAn?= Subject: Re: [PATCH v1 4/5] gpio: xilinx: Replace bitmap_bitremap() calls Message-ID: References: <20230926052007.3917389-1-andriy.shevchenko@linux.intel.com> <20230926052007.3917389-5-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230926052007.3917389-5-andriy.shevchenko@linux.intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Tue, Sep 26, 2023 at 08:20:06AM +0300, Andy Shevchenko wrote: > We have sparse and dence masks of the line mappings based on dense > the view point (Linux numbering or hardware numbering). Since > the Linux side uses sequential bits for the mask, we can simply > convert a Linux number to the hardware one and vise versa by vice > counting set bits in the respective mask. Hence replace > bitmap_bitremap() calls by simpler equivalents. > > With this done the dence mask is not needed and thus dropped. > And dense again. Cheers, Kent. > Signed-off-by: Andy Shevchenko > --- > drivers/gpio/gpio-xilinx.c | 9 ++------- > 1 file changed, 2 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c > index f103c30cc74f..14ca3097563a 100644 > --- a/drivers/gpio/gpio-xilinx.c > +++ b/drivers/gpio/gpio-xilinx.c > @@ -46,7 +46,6 @@ > * @gc: GPIO chip > * @regs: register block > * @hw_map: GPIO pin mapping on hardware side > - * @sw_map: GPIO pin mapping on software side > * @state: GPIO write state shadow register > * @last_irq_read: GPIO read state register from last interrupt > * @dir: GPIO direction shadow register > @@ -62,7 +61,6 @@ struct xgpio_instance { > struct gpio_chip gc; > void __iomem *regs; > DECLARE_BITMAP(hw_map, 64); > - DECLARE_BITMAP(sw_map, 64); > DECLARE_BITMAP(state, 64); > DECLARE_BITMAP(last_irq_read, 64); > DECLARE_BITMAP(dir, 64); > @@ -76,12 +74,12 @@ struct xgpio_instance { > > static inline int xgpio_from_bit(struct xgpio_instance *chip, int bit) > { > - return bitmap_bitremap(bit, chip->hw_map, chip->sw_map, 64); > + return bitmap_weight(chip->hw_map, bit + 1); > } > > static inline int xgpio_to_bit(struct xgpio_instance *chip, int gpio) > { > - return bitmap_bitremap(gpio, chip->sw_map, chip->hw_map, 64); > + return find_nth_bit(chip->hw_map, 64, gpio); > } > > static inline u32 xgpio_get_value32(const unsigned long *map, int bit) > @@ -619,9 +617,6 @@ static int xgpio_probe(struct platform_device *pdev) > if (width[1] > 32) > return -EINVAL; > > - /* Setup software pin mapping */ > - bitmap_set(chip->sw_map, 0, width[0] + width[1]); > - > /* Setup hardware pin mapping */ > bitmap_set(chip->hw_map, 0, width[0]); > bitmap_set(chip->hw_map, 32, width[1]); > -- > 2.40.0.1.gaa8946217a0b >