From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F9CFCDB483 for ; Wed, 11 Oct 2023 21:50:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233383AbjJKVuD (ORCPT ); Wed, 11 Oct 2023 17:50:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49144 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233339AbjJKVuC (ORCPT ); Wed, 11 Oct 2023 17:50:02 -0400 Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [IPv6:2607:f8b0:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B4CD5B6 for ; Wed, 11 Oct 2023 14:50:00 -0700 (PDT) Received: by mail-pl1-x630.google.com with SMTP id d9443c01a7336-1c9b70b9671so26415ad.1 for ; Wed, 11 Oct 2023 14:50:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1697061000; x=1697665800; darn=vger.kernel.org; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=q+FQ1PxZIQRp4/KHDCbz/0g2JaoZfFRjVNf3hF2mjkQ=; b=ul1WWaWOJ+gnTXtvAkY5RLmrblUI8YFTMS2GmJksSwA/uyBmmoqbrafWq7vKHStIrb SY6rmHShMLSUqgpL0+53rbxOGRaLYnf8zdMZi4VIpYXz4mEmQ5qi4XpGtHtoqMtgErBp qM3TWMUtMkbpeWOz8kWSKKyP9j3XPzl7r5L5nF3XFL5eZpy6i6qIRuiNren0IQSbrNj2 qnfYf7Gwcz+usKOiAMgDrbBK0wSEjPUGQd6nDJpq306sdzx7gyMUAvjqcKtWqwcgV2QT tiQ18mhBmpLjYw+CwxE65QjklwBuNpKCZGdMkba4qK9SkCIdiqzT9u7zvYfz6oXjOs4O S4YA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697061000; x=1697665800; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=q+FQ1PxZIQRp4/KHDCbz/0g2JaoZfFRjVNf3hF2mjkQ=; b=epbBaG9TrntxGlFimKLE7jmE2EMwW2va5BCMkTGZ40UD9dfQ7nquzyJ+47agZ9fkqX 5xxTn4hLh9yCE1KMQBjipARTtBlK8qRKgqR8950yi/cJgOHVCsamIuoVEghIgqC3uCfr Zli7PrRuthclbrHU63I34vLBfa5i+I+z6Ee7MbaTqdy7Bo2YdnBS3vqwP8LchQNWAzJ6 O8eSB5p0V+wXr+u3vitao/Ydc7Oa5TW73FT63JH3foccnfHwZmckkZDyUDsnlzRtrmeS KM11lru2MoS0P3zrSVAi989Q9S271bCf1G6rbwXyxz4kqtnEQrfpqhthAq5ViXkHgZFN 7AnQ== X-Gm-Message-State: AOJu0Yz16U9laSmSm7BzqWU3FpvWGliVlTFxCHeY2EEIFoOi/jguHdxP nOzCtPUaiUwds+lCy4v6sT1XvA== X-Google-Smtp-Source: AGHT+IGinPY/tFf+0f9GFuGm3RTh5SBeTN/3JrvMbT+Y6qmoNqGKpXr39lWagJzgXj1qx6Vq8mefbw== X-Received: by 2002:a17:902:654f:b0:1c9:b5cf:6a78 with SMTP id d15-20020a170902654f00b001c9b5cf6a78mr307222pln.27.1697060999931; Wed, 11 Oct 2023 14:49:59 -0700 (PDT) Received: from google.com (13.65.82.34.bc.googleusercontent.com. [34.82.65.13]) by smtp.gmail.com with ESMTPSA id m6-20020a170902db0600b001c5fe217fb9sm302800plx.267.2023.10.11.14.49.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Oct 2023 14:49:59 -0700 (PDT) Date: Wed, 11 Oct 2023 14:49:56 -0700 From: William McVicker To: Peter Griffin Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, conor+dt@kernel.org, sboyd@kernel.org, tomasz.figa@gmail.com, s.nawrocki@samsung.com, linus.walleij@linaro.org, wim@linux-watchdog.org, linux@roeck-us.net, catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de, olof@lixom.net, gregkh@linuxfoundation.org, cw00.choi@samsung.com, tudor.ambarus@linaro.org, andre.draszik@linaro.org, semen.protsenko@linaro.org, saravanak@google.com, soc@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org, kernel-team@android.com, linux-serial@vger.kernel.org Subject: Re: [PATCH v3 09/20] clk: samsung: clk-pll: Add support for pll_{0516,0517,518} Message-ID: References: <20231011184823.443959-1-peter.griffin@linaro.org> <20231011184823.443959-10-peter.griffin@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231011184823.443959-10-peter.griffin@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On 10/11/2023, Peter Griffin wrote: > These plls are found in the Tensor gs101 SoC found in the Pixel 6. > > pll0516x: Integer PLL with high frequency > pll0517x: Integer PLL with middle frequency > pll0518x: Integer PLL with low frequency > > PLL0516x > FOUT = (MDIV * 2 * FIN)/PDIV * 2^SDIV) > > PLL0517x and PLL0518x > FOUT = (MDIV * FIN)/PDIV*2^SDIV) > > The PLLs are similar enough to pll_0822x that the same code can handle > both. The main difference is the change in the fout formula for the > high frequency 0516 pll. > > Locktime for 516,517 & 518 is 150 the same as the pll_0822x lock factor. > MDIV, SDIV PDIV masks and bit shifts are also the same as 0822x. > > When defining the PLL the "con" parameter should be set to CON3 > register, like this > > PLL(pll_0517x, CLK_FOUT_SHARED0_PLL, "fout_shared0_pll", "oscclk", > PLL_LOCKTIME_PLL_SHARED0, PLL_CON3_PLL_SHARED0, > NULL), > > Signed-off-by: Peter Griffin Tested-by: Will McVicker Thanks, Will > --- > drivers/clk/samsung/clk-pll.c | 9 ++++++++- > drivers/clk/samsung/clk-pll.h | 3 +++ > 2 files changed, 11 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c > index 74934c6182ce..4ef9fea2a425 100644 > --- a/drivers/clk/samsung/clk-pll.c > +++ b/drivers/clk/samsung/clk-pll.c > @@ -442,7 +442,11 @@ static unsigned long samsung_pll0822x_recalc_rate(struct clk_hw *hw, > pdiv = (pll_con3 >> PLL0822X_PDIV_SHIFT) & PLL0822X_PDIV_MASK; > sdiv = (pll_con3 >> PLL0822X_SDIV_SHIFT) & PLL0822X_SDIV_MASK; > > - fvco *= mdiv; > + if (pll->type == pll_0516x) > + fvco = fvco * 2 * mdiv; > + else > + fvco *= mdiv; > + > do_div(fvco, (pdiv << sdiv)); > > return (unsigned long)fvco; > @@ -1316,6 +1320,9 @@ static void __init _samsung_clk_register_pll(struct samsung_clk_provider *ctx, > case pll_1417x: > case pll_0818x: > case pll_0822x: > + case pll_0516x: > + case pll_0517x: > + case pll_0518x: > pll->enable_offs = PLL0822X_ENABLE_SHIFT; > pll->lock_offs = PLL0822X_LOCK_STAT_SHIFT; > if (!pll->rate_table) > diff --git a/drivers/clk/samsung/clk-pll.h b/drivers/clk/samsung/clk-pll.h > index 0725d485c6ee..ffd3d52c0dec 100644 > --- a/drivers/clk/samsung/clk-pll.h > +++ b/drivers/clk/samsung/clk-pll.h > @@ -38,6 +38,9 @@ enum samsung_pll_type { > pll_0822x, > pll_0831x, > pll_142xx, > + pll_0516x, > + pll_0517x, > + pll_0518x, > }; > > #define PLL_RATE(_fin, _m, _p, _s, _k, _ks) \ > -- > 2.42.0.655.g421f12c284-goog >