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[93.44.188.26]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ce7fdcsm883504566b.176.2025.04.14.02.01.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Apr 2025 02:01:36 -0700 (PDT) From: Andrea della Porta X-Google-Original-From: Andrea della Porta Date: Mon, 14 Apr 2025 11:02:58 +0200 To: Andrea della Porta Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Broadcom internal kernel review list , Lorenzo Pieralisi , Krzysztof Wilczynski , Manivannan Sadhasivam , Bjorn Helgaas , Linus Walleij , Catalin Marinas , Will Deacon , Bartosz Golaszewski , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Saravana Kannan , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-gpio@vger.kernel.org, Masahiro Yamada , Stefan Wahren , Herve Codina , Luca Ceresoli , Thomas Petazzoni , Andrew Lunn , Phil Elwell , Dave Stevenson , kernel-list@raspberrypi.com Subject: Re: [PATCH v8 00/13] Add support for RaspberryPi RP1 PCI device using a DT overlay Message-ID: References: Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Hi, On 22:52 Wed 19 Mar , Andrea della Porta wrote: > RP1 is an MFD chipset that acts as a south-bridge PCIe endpoint sporting > a pletora of subdevices (i.e. Ethernet, USB host controller, I2C, PWM, > etc.) whose registers are all reachable starting from an offset from the > BAR address. The main point here is that while the RP1 as an endpoint > itself is discoverable via usual PCI enumeraiton, the devices it contains > are not discoverable and must be declared e.g. via the devicetree. > ... since there has been no feedback for a while, a gentle reminder about this patchset. Several patches have at least one Reviewed-by tag, with the exception of: - PATCH 5, 8: those are, respectively, the driver for RP1 clock and misc core which have no major rework since the inception. - PATCH 9, 10: those are new patches, where the most relevant change is a rearrangement of the dts include hierarchy to be flexible enough to support both the dtb overlay approach and the monolithic dtb. - PATCH 13: just enables OF_OVERLAY config option. Some metric data have been added to help evaluating the impact. Many thanks, Andrea