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From: Vinod Koul <vkoul@kernel.org>
To: Thomas Richard <thomas.richard@bootlin.com>
Cc: "Linus Walleij" <linus.walleij@linaro.org>,
	"Bartosz Golaszewski" <brgl@bgdev.pl>,
	"Andy Shevchenko" <andy@kernel.org>,
	"Tony Lindgren" <tony@atomide.com>,
	"Haojian Zhuang" <haojian.zhuang@linaro.org>,
	"Vignesh R" <vigneshr@ti.com>,
	"Aaro Koskinen" <aaro.koskinen@iki.fi>,
	"Janusz Krzysztofik" <jmkrzyszt@gmail.com>,
	"Andi Shyti" <andi.shyti@kernel.org>,
	"Peter Rosin" <peda@axentia.se>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Tom Joseph" <tjoseph@cadence.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org,
	linux-i2c@vger.kernel.org, linux-phy@lists.infradead.org,
	linux-pci@vger.kernel.org, gregory.clement@bootlin.com,
	theo.lebrun@bootlin.com, thomas.petazzoni@bootlin.com,
	u-kumar1@ti.com
Subject: Re: [PATCH 05/14] phy: ti: phy-j721e-wiz: make wiz_clock_init callable multiple times
Date: Tue, 23 Jan 2024 12:48:31 +0530	[thread overview]
Message-ID: <Za9oR8BpoufCRNIw@matsya> (raw)
In-Reply-To: <20240102-j7200-pcie-s2r-v1-5-84e55da52400@bootlin.com>

On 15-01-24, 17:14, Thomas Richard wrote:
> For suspend and resume support, wiz_clock_init needs to be called
> multiple times.
> Add a parameter to wiz_clock_init to be able to skip clocks
> registration.
> 
> Based on the work of Théo Lebrun <theo.lebrun@bootlin.com>
> 
> Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
> ---
>  drivers/phy/ti/phy-j721e-wiz.c | 60 +++++++++++++++++++++++++-----------------
>  1 file changed, 36 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
> index fc3cd98c60ff..09f7edf16562 100644
> --- a/drivers/phy/ti/phy-j721e-wiz.c
> +++ b/drivers/phy/ti/phy-j721e-wiz.c
> @@ -1076,7 +1076,7 @@ static int wiz_clock_register(struct wiz *wiz)
>  	return ret;
>  }
>  
> -static int wiz_clock_init(struct wiz *wiz, struct device_node *node)
> +static int wiz_clock_init(struct wiz *wiz, struct device_node *node, bool probe)
>  {
>  	const struct wiz_clk_mux_sel *clk_mux_sel = wiz->clk_mux_sel;
>  	struct device *dev = wiz->dev;
> @@ -1087,14 +1087,36 @@ static int wiz_clock_init(struct wiz *wiz, struct device_node *node)
>  	int ret;
>  	int i;
>  
> -	clk = devm_clk_get(dev, "core_ref_clk");
> -	if (IS_ERR(clk)) {
> -		dev_err(dev, "core_ref_clk clock not found\n");
> -		ret = PTR_ERR(clk);
> -		return ret;
> +	if (probe) {
> +		clk = devm_clk_get(dev, "core_ref_clk");
> +		if (IS_ERR(clk)) {
> +			dev_err(dev, "core_ref_clk clock not found\n");
> +			ret = PTR_ERR(clk);
> +			return ret;
> +		}
> +		wiz->input_clks[WIZ_CORE_REFCLK] = clk;
> +
> +		if (wiz->data->pma_cmn_refclk1_int_mode) {
> +			clk = devm_clk_get(dev, "core_ref1_clk");
> +			if (IS_ERR(clk)) {
> +				dev_err(dev, "core_ref1_clk clock not found\n");
> +				ret = PTR_ERR(clk);
> +				return ret;
> +			}
> +			wiz->input_clks[WIZ_CORE_REFCLK1] = clk;
> +		}
> +
> +		clk = devm_clk_get(dev, "ext_ref_clk");
> +		if (IS_ERR(clk)) {
> +			dev_err(dev, "ext_ref_clk clock not found\n");
> +			ret = PTR_ERR(clk);
> +			return ret;
> +		}
> +		wiz->input_clks[WIZ_EXT_REFCLK] = clk;
>  	}
> -	wiz->input_clks[WIZ_CORE_REFCLK] = clk;
>  
> +
> +	clk = wiz->input_clks[WIZ_CORE_REFCLK];
>  	rate = clk_get_rate(clk);
>  	if (rate >= 100000000)
>  		regmap_field_write(wiz->pma_cmn_refclk_int_mode, 0x1);
> @@ -1121,14 +1143,7 @@ static int wiz_clock_init(struct wiz *wiz, struct device_node *node)
>  	}
>  
>  	if (wiz->data->pma_cmn_refclk1_int_mode) {
> -		clk = devm_clk_get(dev, "core_ref1_clk");
> -		if (IS_ERR(clk)) {
> -			dev_err(dev, "core_ref1_clk clock not found\n");
> -			ret = PTR_ERR(clk);
> -			return ret;
> -		}
> -		wiz->input_clks[WIZ_CORE_REFCLK1] = clk;
> -
> +		clk = wiz->input_clks[WIZ_CORE_REFCLK1];
>  		rate = clk_get_rate(clk);
>  		if (rate >= 100000000)
>  			regmap_field_write(wiz->pma_cmn_refclk1_int_mode, 0x1);
> @@ -1136,20 +1151,17 @@ static int wiz_clock_init(struct wiz *wiz, struct device_node *node)
>  			regmap_field_write(wiz->pma_cmn_refclk1_int_mode, 0x3);
>  	}
>  
> -	clk = devm_clk_get(dev, "ext_ref_clk");
> -	if (IS_ERR(clk)) {
> -		dev_err(dev, "ext_ref_clk clock not found\n");
> -		ret = PTR_ERR(clk);
> -		return ret;
> -	}
> -	wiz->input_clks[WIZ_EXT_REFCLK] = clk;
> -
> +	clk = wiz->input_clks[WIZ_EXT_REFCLK];
>  	rate = clk_get_rate(clk);
>  	if (rate >= 100000000)
>  		regmap_field_write(wiz->pma_cmn_refclk_mode, 0x0);
>  	else
>  		regmap_field_write(wiz->pma_cmn_refclk_mode, 0x2);
>  
> +	/* What follows is about registering clocks. */
> +	if (!probe)
> +		return 0;
> +
>  	switch (wiz->type) {
>  	case AM64_WIZ_10G:
>  	case J7200_WIZ_10G:
> @@ -1592,7 +1604,7 @@ static int wiz_probe(struct platform_device *pdev)
>  		goto err_get_sync;
>  	}
>  
> -	ret = wiz_clock_init(wiz, node);
> +	ret = wiz_clock_init(wiz, node, true);

You are calling it one once? So what am I missing

-- 
~Vinod

  reply	other threads:[~2024-01-23  7:18 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-15 16:14 [PATCH 00/14] Add suspend to ram support for PCIe on J7200 Thomas Richard
2024-01-15 16:14 ` [PATCH 01/14] gpio: pca953x: move suspend/resume to suspend_noirq/resume_noirq Thomas Richard
2024-01-15 19:56   ` Andy Shevchenko
2024-01-19 15:50     ` Thomas Richard
2024-01-16  7:43   ` Tony Lindgren
2024-01-19 17:01     ` Thomas Richard
2024-01-28  0:12       ` Linus Walleij
2024-02-08 16:19         ` Thomas Richard
2024-02-08 16:53           ` Bartosz Golaszewski
2024-02-08 21:29           ` Linus Walleij
2024-02-09  7:44             ` Thomas Richard
2024-02-09 10:50               ` Linus Walleij
2024-01-15 16:14 ` [PATCH 02/14] pinctrl: pinctrl-single: " Thomas Richard
2024-01-15 20:02   ` Andy Shevchenko
2024-01-19 16:08     ` Thomas Richard
2024-01-19 16:11       ` Andy Shevchenko
2024-01-22 14:33         ` Thomas Richard
2024-01-23 12:44           ` Andy Shevchenko
2024-01-31  8:05   ` Linus Walleij
2024-01-15 16:14 ` [PATCH 03/14] i2c: omap: wakeup the controller during suspend callback Thomas Richard
2024-01-15 20:03   ` Andy Shevchenko
2024-01-15 16:14 ` [PATCH 04/14] mux: mmio: Add resume support Thomas Richard
2024-01-15 20:05   ` Andy Shevchenko
2024-01-15 22:31   ` Peter Rosin
2024-01-19 16:25     ` Thomas Richard
2024-01-15 16:14 ` [PATCH 05/14] phy: ti: phy-j721e-wiz: make wiz_clock_init callable multiple times Thomas Richard
2024-01-23  7:18   ` Vinod Koul [this message]
2024-01-23  8:20     ` Thomas Richard
2024-01-23 14:02       ` Vinod Koul
2024-01-15 16:14 ` [PATCH 06/14] phy: ti: phy-j721e-wiz: add resume support Thomas Richard
2024-01-15 16:14 ` [PATCH 07/14] phy: cadence-torrent: extract calls to clk_get from cdns_torrent_clk Thomas Richard
2024-01-15 16:14 ` [PATCH 08/14] phy: cadence-torrent: register resets even if the phy is already configured Thomas Richard
2024-01-15 16:14 ` [PATCH 09/14] phy: cadence-torrent: move already_configured to struct cdns_torrent_phy Thomas Richard
2024-01-15 16:14 ` [PATCH 10/14] phy: cadence-torrent: remove noop_ops phy operations Thomas Richard
2024-01-15 16:14 ` [PATCH 11/14] phy: cadence-torrent: add suspend and resume support Thomas Richard
2024-01-16 18:22   ` Bjorn Helgaas
2024-01-22 14:24     ` Thomas Richard
2024-01-17 15:12   ` Philipp Zabel
2024-01-22 14:28     ` Thomas Richard
2024-01-15 16:14 ` [PATCH 12/14] PCI: cadence: add resume support to cdns_pcie_host_setup() Thomas Richard
2024-01-15 16:14 ` [PATCH 13/14] PCI: j721e: move reset GPIO to device struct Thomas Richard
2024-01-15 20:08   ` Andy Shevchenko
2024-01-16 18:19   ` Bjorn Helgaas
2024-01-15 16:14 ` [PATCH 14/14] PCI: j721e: add suspend and resume support Thomas Richard
2024-01-15 20:13   ` Andy Shevchenko
2024-01-22 15:30     ` Thomas Richard
2024-01-22 21:36       ` Andy Shevchenko
2024-01-24 14:09         ` Thomas Richard

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