Re: [PATCH 07/11] pinctrl: rp1: Implement RaspberryPi RP1 gpio support

Andrea della Porta
2024-08-28T15:24:35Z

Hi Linus,

On 10:59 Mon 26 Aug , Linus Walleij wrote:
> Hi Andrea,
>
> thanks for your patch!

Thanks for your review!

>
> On Tue, Aug 20, 2024 at 4:36 PM Andrea della Porta
> <andrea.porta@suse.com> wrote:
>
> > The RP1 is an MFD supporting a gpio controller and /pinmux/pinctrl.
> > Add minimum support for the gpio only portion. The driver is in
> > pinctrl folder since upcoming patches will add the pinmux/pinctrl
> > support where the gpio part can be seen as an addition.
> >
> > Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
> (...)
>
> > +#include <linux/bitmap.h>
> > +#include <linux/bitops.h>
> (...)
>
> > +static void rp1_pad_update(struct rp1_pin_info *pin, u32 clr, u32 set)
> > +{
> > + u32 padctrl = readl(pin->pad);
> > +
> > + padctrl &= ~clr;
> > + padctrl |= set;
> > +
> > + writel(padctrl, pin->pad);
> > +}
>
> Looks a bit like a reimplementation of regmap-mmio? If you want to do
> this why not use regmap-mmio?

Agreed. I can leverage regmail_field to get rid of the reimplemented code
for the pin->pad register region. Do you think it could be worth using
regmap-mmio also on pin->gpio, pin->inte, pin->ints and pin->rio even
though they are not doing any special field manipulation as the pin->pad
case?

>
> > +static void rp1_set_dir(struct rp1_pin_info *pin, bool is_input)
> > +{
> > + int offset = is_input ? RP1_CLR_OFFSET : RP1_SET_OFFSET;
> > +
> > + writel(1 << pin->offset, pin->rio + RP1_RIO_OE + offset);
>
> If you include bitops.h what about:
>
> writel(BIT(pin->offset), pin->rio + RP1_RIO_OE + offset);

Ack.

>
> > +static int rp1_get_value(struct rp1_pin_info *pin)
> > +{
> > + return !!(readl(pin->rio + RP1_RIO_IN) & (1 << pin->offset));
> > +}
>
> Also here

Ack.

>
> > +
> > +static void rp1_set_value(struct rp1_pin_info *pin, int value)
> > +{
> > + /* Assume the pin is already an output */
> > + writel(1 << pin->offset,
> > + pin->rio + RP1_RIO_OUT + (value ? RP1_SET_OFFSET : RP1_CLR_OFFSET));
> > +}
>
> And here

Ack.

>
> > +static int rp1_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
> > + unsigned long config)
> > +{
> > + struct rp1_pin_info *pin = rp1_get_pin(chip, offset);
> > + unsigned long configs[] = { config };
> > +
> > + return rp1_pinconf_set(pin, offset, configs,
> > + ARRAY_SIZE(configs));
> > +}
>
> Nice that you implement this!

Thanks :)

>
> > +static void rp1_gpio_irq_config(struct rp1_pin_info *pin, bool enable)
> > +{
> > + writel(1 << pin->offset,
> > + pin->inte + (enable ? RP1_SET_OFFSET : RP1_CLR_OFFSET));
>
> BIT()

Ack.

Many thanks,
Andrea

>
> Yours,
> Linus Walleij