From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
To: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>,
agross@kernel.org, bjorn.andersson@linaro.org,
lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org,
quic_plai@quicinc.com, bgoswami@codeaurora.org, perex@perex.cz,
tiwai@suse.com, rohitkr@codeaurora.org,
linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
swboyd@chromium.org, judyhsiao@chromium.org,
Linus Walleij <linus.walleij@linaro.org>,
linux-gpio@vger.kernel.org
Cc: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Subject: Re: [PATCH v6 7/7] pinctrl: qcom: Update clock voting as optional
Date: Wed, 16 Feb 2022 14:20:03 +0000 [thread overview]
Message-ID: <a209336a-9108-f1ac-ee6d-a838df115c6d@linaro.org> (raw)
In-Reply-To: <1644851994-22732-8-git-send-email-quic_srivasam@quicinc.com>
On 14/02/2022 15:19, Srinivasa Rao Mandadapu wrote:
> Update bulk clock voting to optional voting as ADSP bypass platform doesn't
> need macro and decodec clocks, these are maintained as power domains and
> operated from lpass audio core cc.
>
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> ---
> drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 16 +++++++++-------
> drivers/pinctrl/qcom/pinctrl-lpass-lpi.h | 1 +
> drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c | 1 +
> 3 files changed, 11 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> index 8a82fd9..103f0a6c 100644
> --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> @@ -407,13 +407,15 @@ int lpi_pinctrl_probe(struct platform_device *pdev)
> return dev_err_probe(dev, PTR_ERR(pctrl->slew_base),
> "Slew resource not provided\n");
>
> - ret = devm_clk_bulk_get(dev, MAX_LPI_NUM_CLKS, pctrl->clks);
> - if (ret)
> - return dev_err_probe(dev, ret, "Can't get clocks\n");
> -
> - ret = clk_bulk_prepare_enable(MAX_LPI_NUM_CLKS, pctrl->clks);
> - if (ret)
> - return dev_err_probe(dev, ret, "Can't enable clocks\n");
> + if (!data->is_clk_optional) {
> + ret = devm_clk_bulk_get(dev, MAX_LPI_NUM_CLKS, pctrl->clks);
> + if (ret)
> + return dev_err_probe(dev, ret, "Can't get clocks\n");
> +
> + ret = clk_bulk_prepare_enable(MAX_LPI_NUM_CLKS, pctrl->clks);
> + if (ret)
> + return dev_err_probe(dev, ret, "Can't enable clocks\n");
> + }
>
> pctrl->desc.pctlops = &lpi_gpio_pinctrl_ops;
> pctrl->desc.pmxops = &lpi_gpio_pinmux_ops;
> diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h
> index a511d72..c1079bf 100644
> --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h
> +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h
> @@ -77,6 +77,7 @@ struct lpi_pinctrl_variant_data {
> int ngroups;
> const struct lpi_function *functions;
> int nfunctions;
> + int is_clk_optional;
> };
>
> int lpi_pinctrl_probe(struct platform_device *pdev);
> diff --git a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c
> index 5bf30d97..4277e31 100644
> --- a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c
> +++ b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c
> @@ -143,6 +143,7 @@ static const struct lpi_pinctrl_variant_data sc7280_lpi_data = {
> .ngroups = ARRAY_SIZE(sc7280_groups),
> .functions = sc7280_functions,
> .nfunctions = ARRAY_SIZE(sc7280_functions),
> + .is_clk_optional = 1,
This is forcefully set assuming that sc7280 is always used in ADSP
bypass mode. Which is not correct.
Can't you use devm_clk_bulk_get_optional instead?
--srini
> };
>
> static const struct of_device_id lpi_pinctrl_of_match[] = {
next prev parent reply other threads:[~2022-02-16 14:20 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-14 15:19 [PATCH v6 0/7] Add pin control support for lpass sc7280 Srinivasa Rao Mandadapu
2022-02-14 15:19 ` [PATCH v6 1/7] dt-bindings: pinctrl: qcom: Update lpass lpi file name to SoC specific Srinivasa Rao Mandadapu
2022-02-17 23:03 ` Rob Herring
2022-02-19 2:32 ` Stephen Boyd
2022-02-14 15:19 ` [PATCH v6 2/7] dt-bindings: pinctrl: qcom: Add sc7280 lpass lpi pinctrl bindings Srinivasa Rao Mandadapu
2022-02-19 2:34 ` Stephen Boyd
2022-02-14 15:19 ` [PATCH v6 3/7] pinctrl: qcom: Update macro name to LPI specific Srinivasa Rao Mandadapu
2022-02-19 2:36 ` Stephen Boyd
2022-02-19 18:20 ` Srinivasa Rao Mandadapu (Temp)
2022-02-14 15:19 ` [PATCH v6 4/7] pinctrl: qcom: Update lpi pin group structure Srinivasa Rao Mandadapu
2022-02-19 2:38 ` Stephen Boyd
2022-02-19 18:24 ` Srinivasa Rao Mandadapu (Temp)
2022-02-14 15:19 ` [PATCH v6 5/7] pinctrl: qcom: Extract chip specific LPASS LPI code Srinivasa Rao Mandadapu
2022-02-16 14:20 ` Srinivas Kandagatla
2022-02-19 2:42 ` Stephen Boyd
2022-02-19 18:30 ` Srinivasa Rao Mandadapu (Temp)
2022-02-19 2:43 ` Stephen Boyd
2022-02-19 18:32 ` Srinivasa Rao Mandadapu (Temp)
2022-02-23 7:00 ` Srinivasa Rao Mandadapu
2022-02-14 15:19 ` [PATCH v6 6/7] pinctrl: qcom: Add SC7280 lpass pin configuration Srinivasa Rao Mandadapu
2022-02-16 14:19 ` Srinivas Kandagatla
2022-02-19 2:43 ` Stephen Boyd
2022-02-19 18:34 ` Srinivasa Rao Mandadapu (Temp)
2022-02-14 15:19 ` [PATCH v6 7/7] pinctrl: qcom: Update clock voting as optional Srinivasa Rao Mandadapu
2022-02-16 14:20 ` Srinivas Kandagatla [this message]
2022-02-16 14:41 ` Srinivasa Rao Mandadapu
2022-02-16 15:38 ` Srinivas Kandagatla
2022-02-19 2:46 ` Stephen Boyd
2022-02-19 18:36 ` Srinivasa Rao Mandadapu (Temp)
2022-02-16 14:20 ` [PATCH v6 0/7] Add pin control support for lpass sc7280 Srinivas Kandagatla
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