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b=z6dfiqnEBqtrR8wFBdK5rdB7hxyoMOuuJkRjAsXlvkyw77oa/+x5Ku5qBPJ9nLCpCGHxZCoBk0kiieqzeK2PPkpgzA/eZCq+S9ygKPhsYs7019WU1j9LYJl2MH1upUCyLDb8lmdmgBLjGg0ySImoJKA5/YLI9CuD/92zofy8nBU= Authentication-Results: mx.microsoft.com 1; dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com; Received: from PH8PR12MB999319.namprd12.prod.outlook.com (2603:10b6:510:40f::24) by CYYPR12MB8730.namprd12.prod.outlook.com (2603:10b6:930:c1::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.451.26; Sat, 3 Oct 2026 16:14:51 +0000 Received: from PH8PR12MB999319.namprd12.prod.outlook.com ([fe80::582a:6d15:9b75:5235]) by PH8PR12MB999319.namprd12.prod.outlook.com ([fe80::582a:6d15:9b75:5235%4]) with mapi id 15.21.0472.016; Sat, 3 Oct 2026 16:14:51 +0000 Message-ID: Date: Sat, 3 Oct 2026 21:44:46 +0530 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] pinctrl: amd: Clear S4 wake bits when firmware has _AEI To: Mario Limonciello , Basavaraj.Natikar@amd.com, linusw@kernel.org Cc: Olzhas Marat , stable@vger.kernel.org, linux-gpio@vger.kernel.org References: <20261002143040.37200-1-mario.limonciello@amd.com> Content-Language: en-US From: Shyam Sundar S K In-Reply-To: <20261002143040.37200-1-mario.limonciello@amd.com> Content-Type: text/plain; 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The system that motivated that change does > not expose ACPI GPIO events through _AEI. This is definitely better than reverting or carrying per-board DMI quirks. One corner case I can think of before this hits "stable:" on a system that defines _AEI (say for a touchpad or buttons) but routes an onboard NIC through a raw GPIO pin not listed in _AEI, this clears that pin's S4 bit at probe. That could kill WoL from S4/S5 unless firmware re-arms it during sleep transition. Low risk since nobody has reported that setup, but worth tracking if any WoL regressions pop up. A small point on the comment: > > On a Chuwi CoreBook Plus, firmware exposes _AEI but also leaves the S4/S5 > wake bit set for GPIO 24. This causes the machine to power back on > immediately after shutdown even though Wake-on-LAN is not enabled. > > GPIO register dumps show that the only relevant difference is bit 15 on > GPIO 24. Clearing that bit makes the machine remain off. However, GPIO 24 > is not itself listed in _AEI, so clearing only the pins described there > would not fix the problem. > > Use the presence of _AEI to distinguish the platform's GPIO event model. > Continue clearing S0i3/S3 bits on every system. Clear S4 bits when firmware > exposes _AEI, indicating that the platform uses OS-managed ACPI GPIO > events, but preserve S4 bits when _AEI is absent for firmware-programmed > sources such as PCIe PME that bypass the GPIO IRQ wake API. > > Fixes: ffe8a0c6b552 ("pinctrl-amd: Don't clear S4 wake bits at probe") > Reported-by: Olzhas Marat > Closes: https://bugzilla.kernel.org/show_bug.cgi?id=222041 > Cc: stable@vger.kernel.org > Tested-by: Olzhas Marat > Signed-off-by: Mario Limonciello > --- > drivers/pinctrl/pinctrl-amd.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c > index 15a398bb3be23..dca01c5d2231b 100644 > --- a/drivers/pinctrl/pinctrl-amd.c > +++ b/drivers/pinctrl/pinctrl-amd.c > @@ -880,12 +880,25 @@ static const struct pinconf_ops amd_pinconf_ops = { > static void amd_gpio_irq_init(struct amd_gpio *gpio_dev) > { > const struct pinctrl_desc *desc = gpio_dev->pctrl->desc; > + acpi_handle handle = ACPI_HANDLE(&gpio_dev->pdev->dev); > unsigned long flags; > u32 pin_reg, mask; > int i; > > mask = BIT(WAKE_CNTRL_OFF_S0I3) | BIT(WAKE_CNTRL_OFF_S3); > > + /* > + * _AEI indicates that the platform uses OS-managed ACPI GPIO events. > + * Without it, preserve S4 wake bits for firmware-programmed sources > + * such as PCIe PME that bypass the GPIO IRQ wake API. > + */ On the Olzhas's Chuwi machine, pin 24 isn't in _AEI either, yet it's the pin causing the issue. So _AEI isn't distinguishing which pins the OS manages - it's more of a platform-level signal that happens to tell the two boards apart. Also, You could drop the outer "if (handle)" check though, since acpi_has_method() safely returns false on a NULL handle: Either way: Reviewed-by: Shyam Sundar S K Thanks, Shyam > + if (handle) { > +#ifdef CONFIG_ACPI > + if (acpi_has_method(handle, "_AEI")) > + mask |= BIT(WAKE_CNTRL_OFF_S4); > +#endif > + } > + > for (i = 0; i < desc->npins; i++) { > int pin = desc->pins[i].number; > const struct pin_desc *pd = pin_desc_get(gpio_dev->pctrl, pin);