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X-CSE-ConnectionGUID: t1q41aS1QCmMBhx6d5423Q== X-CSE-MsgGUID: RRwTkQzsQuCFFp9dm4iJBA== X-IronPort-AV: E=McAfee;i="6800,10657,11833"; a="83691894" X-IronPort-AV: E=Sophos;i="6.25,141,1779174000"; d="scan'208";a="83691894" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa108.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jul 2026 05:03:30 -0700 X-CSE-ConnectionGUID: Z5gHly9sRw2vu6h0i+KEEA== X-CSE-MsgGUID: bnX2nW+fQHaFou/Pzptp6Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,141,1779174000"; d="scan'208";a="254474062" Received: from conormcd-mobl2.ger.corp.intel.com (HELO localhost) ([10.245.244.65]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jul 2026 05:03:24 -0700 Date: Wed, 1 Jul 2026 15:03:22 +0300 From: Andy Shevchenko To: Michael Walle Cc: Andy Shevchenko , Linus Walleij , Bartosz Golaszewski , "robh@kernel.org" , "krzk+dt@kernel.org" , "conor+dt@kernel.org" , "afaerber@suse.com" , "wbg@kernel.org" , "mathieu.dubois-briand@bootlin.com" , "lars@metafoo.de" , "Michael.Hennerich@analog.com" , "jic23@kernel.org" , "nuno.sa@analog.com" , "andy@kernel.org" , "dlechner@baylibre.com" , =?utf-8?B?VFlfQ2hhbmdb5by15a2Q6YC4XQ==?= , "linux-gpio@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-realtek-soc@lists.infradead.org" , "linux-iio@vger.kernel.org" , =?utf-8?B?Q1lfSHVhbmdb6buD6Ymm5pmPXQ==?= , Stanley =?utf-8?B?Q2hhbmdb5piM6IKy5b63XQ==?= , James Tai =?utf-8?B?W+aItOW/l+WzsF0=?= , Yu-Chun Lin =?utf-8?B?W+ael+elkOWQm10=?= Subject: Re: [PATCH v3 2/7] gpio: regmap: add gpio_regmap_get_gpiochip() accessor Message-ID: References: Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo On Wed, Jul 01, 2026 at 01:42:55PM +0200, Michael Walle wrote: > On Wed Jul 1, 2026 at 1:38 PM CEST, Andy Shevchenko wrote: > > On Wed, Jul 01, 2026 at 01:55:11PM +0300, Andy Shevchenko wrote: > >> On Wed, Jul 01, 2026 at 01:01:10PM +0300, Andy Shevchenko wrote: > >> > On Wed, Jul 1, 2026 at 11:44 AM Michael Walle wrote: > >> > > On Fri Jun 19, 2026 at 11:08 PM CEST, Linus Walleij wrote: > >> > > > On Mon, Jun 8, 2026 at 4:41 PM Michael Walle wrote: > >> > > > > >> > > >> >>> Without an accessor like gpio_regmap_get_gpiochip(), we cannot retrieve the > >> > > >> >>> gpio_chip instantiated inside gpio-regmap.c to fulfill these requirements in our > >> > > >> >>> map() function. > >> > > >> > >> > > >> Why is gpiochip_irq_reqres() called in the first place? Isn't that > >> > > >> only called if the irq handling is set up via gc->irq.chip and not > >> > > >> via gpiochip_irqchip_add_domain() like in gpio-regmap? > >> > > > > >> > > > Not really, the gpiochip_irq_reqres() is called to mark that a > >> > > > GPIO line is used for IRQ, so the gpiolib cannot turn this > >> > > > GPIO into an output line, gpiod_direction_out() will fail > >> > > > on lines used for IRQ. So it's a failsafe. > >> > > > > >> > > > You can live without it of course, but then you don't get > >> > > > this failsafe. > >> > > > >> > > Thanks for the explanation! So did I make a mistake years ago by > >> > > adding the gpiochip_irqchip_add_domain(), see commit 6a45b0e2589f > >> > > ("gpiolib: Introduce gpiochip_irqchip_add_domain()") > >> > > > >> > > As Yu-Chun found, gpiochip_irq_reqres() expect the irq chip data > >> > > to be a gpio_chip, which isn't the case (in general) for an > >> > > externally allocated domain, is it? > >> > > >> > So the whole issue comes from the fact that the IRQ chip is not marked > >> > as immutable. For immutable IRQ chips (which all GPIO provides should > >> > have) there is no such issue to begin with, id est there is no > >> > gpiochip_irq_reqres() callback assigned (and respective _relres). > >> > >> Ah, for immutable chips we put either custom ones or > >> GPIOCHIP_IRQ_RESOURCE_HELPERS which actually refers to those callbacks. > >> > >> So, if the domain is external, it should also provide irq_request_resources > >> and release callbacks. In the custom case we can wrap gpiochip_reqres_irq() > >> and gpiochip_relres_irq() respectively. > >> > >> But we need to have a struct gpio_chip pointer for them. And note, the > >> IRQ chip data can be anything in that case, so it's not a requirement. > > > > And looking back for implementation in v3 the whole mistake was to use > > GPIOCHIP_IRQ_RESOURCE_HELPERS. It just wanted custom callbacks with > > the IRQ chip data assigned to whatever from which we may then deduce > > struct gpio_chip. It does *not* require to be struct gpio_chip. > > The local driver data structure should keep pointer to struct gpio_regmap. > > That one can be used in the respective .irq_request_resources() and > > .irq_release_resources(). The default ones for gpio-regmap may also > > be provided via a macro, say GPIO_REGMAP_IRQ_RESOURCE_HELPERS. > > > > Hence I don't see the need of having gpio_regmap_get_gpiochip() helper > > and driver can be implemented using gpio-regmap and external IRQ domain. > > > > What did I miss? > > IMHO nothing, that's exactly my understanding, too. Except for the > GPIO_REGMAP_IRQ_RESOURCE_HELPERS. See my previous mail. Because that > would have to be set by regmap-irq. There are two cases: - easy, when the chip is provided by the user (in this case we just missing a couple of callbacks in gpio-regmap) - hard, when chip is created by regmap-irq (in this case regmap-irq missing to setup the callbacks) So, effectively all GPIO drivers that use regmap-irq facility are now missing the functionality of tracking "GPIO locked as IRQ". -- With Best Regards, Andy Shevchenko