Re: [PATCH 11/14] ARM: sunxi: dts: s3/s3l/v3: add DTSI files for S3/S3L/V3 SoCs

[Paul Kocialkowski <paul.kocialkowski-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>]

Hi,

Le lundi 18 mars 2019 à 23:15 +0800, Icenowy Zheng a écrit :
> 
> 于 2019年3月18日 GMT+08:00 下午8:41:32, Paul Kocialkowski <paul.kocialkowski-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org> 写到:
> > Hi,
> > 
> > Le mardi 12 mars 2019 à 23:22 +0800, Icenowy Zheng a écrit :
> > > The Allwinner S3/S3L/V3 SoCs all share the same die with the V3s SoC,
> > > but with more GPIO wired out of the package.
> > > 
> > > Add DTSI files for these SoCs. The DTSI file for V3 just replaces the
> > > pinctrl compatible string, and the S3/S3L DTSI files just include the
> > V3
> > > DTSI file.
> > 
> > Note that the V3 has a NMI controller at 1c000d0, that is required for
> > handling the AXP209 interrupts IIRQ. I have no idea whether it's also
> > the case on the V3s/S3/S3L though but it would be good to know.
> 
> It's not mentioned on the datasheet.
> 
> If it's present, please send a patch.

Indeed, it is not documented but the block is definitely there (and it
shows up in Allwinner's kernel source too). I'll send a patch once
these series is merged then!

> BTW all V3 series chip share the same die (sun8iw8).

Right, so I think it's safe to assume that the controller is there on
all of them then.

Cheers,

Paul

> Thanks
> 
> > Note that I can totally add support for it when adding support for my
> > V3 device that uses the AXP209 this way.
> > 
> > Also, could we get proper compatibles and config options for these new
> > SoCs, since they are distinct from the V3S?
> > 
> > Cheers,
> > 
> > Paul
> > 
> > > Signed-off-by: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
> > > ---
> > >  arch/arm/boot/dts/sun8i-s3.dtsi  |  6 ++++++
> > >  arch/arm/boot/dts/sun8i-s3l.dtsi |  6 ++++++
> > >  arch/arm/boot/dts/sun8i-v3.dtsi  | 14 ++++++++++++++
> > >  3 files changed, 26 insertions(+)
> > >  create mode 100644 arch/arm/boot/dts/sun8i-s3.dtsi
> > >  create mode 100644 arch/arm/boot/dts/sun8i-s3l.dtsi
> > >  create mode 100644 arch/arm/boot/dts/sun8i-v3.dtsi
> > > 
> > > diff --git a/arch/arm/boot/dts/sun8i-s3.dtsi
> > b/arch/arm/boot/dts/sun8i-s3.dtsi
> > > new file mode 100644
> > > index 000000000000..0f41a25ecb30
> > > --- /dev/null
> > > +++ b/arch/arm/boot/dts/sun8i-s3.dtsi
> > > @@ -0,0 +1,6 @@
> > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > > +/*
> > > + * Copyright (C) 2019 Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
> > > + */
> > > +
> > > +#include "sun8i-v3.dtsi"
> > > diff --git a/arch/arm/boot/dts/sun8i-s3l.dtsi
> > b/arch/arm/boot/dts/sun8i-s3l.dtsi
> > > new file mode 100644
> > > index 000000000000..0f41a25ecb30
> > > --- /dev/null
> > > +++ b/arch/arm/boot/dts/sun8i-s3l.dtsi
> > > @@ -0,0 +1,6 @@
> > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > > +/*
> > > + * Copyright (C) 2019 Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
> > > + */
> > > +
> > > +#include "sun8i-v3.dtsi"
> > > diff --git a/arch/arm/boot/dts/sun8i-v3.dtsi
> > b/arch/arm/boot/dts/sun8i-v3.dtsi
> > > new file mode 100644
> > > index 000000000000..6ae8645ade50
> > > --- /dev/null
> > > +++ b/arch/arm/boot/dts/sun8i-v3.dtsi
> > > @@ -0,0 +1,14 @@
> > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > > +/*
> > > + * Copyright (C) 2019 Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
> > > + */
> > > +
> > > +#include "sun8i-v3s.dtsi"
> > > +
> > > +&ccu {
> > > +	compatible = "allwinner,sun8i-v3-ccu";
> > > +};
> > > +
> > > +&pio {
> > > +	compatible = "allwinner,sun8i-v3-pinctrl";
> > > +};
> > > -- 
> > > 2.18.1
> > > 
> > -- 
> > Paul Kocialkowski, Bootlin
> > Embedded Linux and kernel engineering
> > https://bootlin.com
> > 
> > 
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
-- 
Paul Kocialkowski, Bootlin
Embedded Linux and kernel engineering
https://bootlin.com

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