From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A1F10C10F00 for ; Fri, 6 Mar 2020 12:18:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7A36F208CD for ; Fri, 6 Mar 2020 12:18:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1583497111; bh=6h6y2vs5rjLKL5RwvxTAWpj0alaGXXXmtOtVKeSMsz8=; h=Date:From:To:Cc:Subject:In-Reply-To:References:List-ID:From; b=VOMgcFNw60JRcWcCDbwSlNMhA3KDJYin/mPo3jcrhRo9ryIBja1AMcOMXUbnwVJdT YvKPuW/HhZe1DsblckY6Cggg/3S4VKNsPZnKkJjh8J7hV9ZnKzSbrZ3pEJWNRCA/o5 4UBVVPC9Cnnl2G0etOhJeDfpCd4rlBfvwQGQCLZk= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726781AbgCFMSa (ORCPT ); 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Fri, 06 Mar 2020 12:18:26 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Fri, 06 Mar 2020 12:18:26 +0000 From: Marc Zyngier To: Linus Walleij Cc: linux-gpio@vger.kernel.org, Bjorn Andersson , Lina Iyer , Stephen Boyd , stable@vger.kernel.org Subject: Re: [PATCH] pinctrl: qcom: Guard irq_eoi() In-Reply-To: <20200306121221.1231296-1-linus.walleij@linaro.org> References: <20200306121221.1231296-1-linus.walleij@linaro.org> Message-ID: X-Sender: maz@kernel.org User-Agent: Roundcube Webmail/1.3.10 X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: linus.walleij@linaro.org, linux-gpio@vger.kernel.org, bjorn.andersson@linaro.org, ilina@codeaurora.org, swboyd@chromium.org, stable@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Hi Linus, On 2020-03-06 12:12, Linus Walleij wrote: > In the commit setting up the qcom/msm pin controller to > be hierarchical some callbacks were careful to check that > d->parent_data on irq_data was valid before calling the > parent function, however irq_chip_eoi_parent() was called > unconditionally which doesn't work with elder Qualcomm > platforms such as APQ8060. > > When the drivers/mfd/qcom-pm8xxx.c driver calls > chained_irq_exit() that call will in turn call chip->irq_eoi() > which is set to irq_chip_eoi_parent() by default on a > hierachical IRQ chip, and the parent is pinctrl-msm.c > so that will in turn unconditionally call > irq_chip_eoi_parent() again, but its parent is invalid > so we get the following crash: > > Unnable to handle kernel NULL pointer dereference at > virtual address 00000010 > pgd = (ptrval) > [00000010] *pgd=00000000 > Internal error: Oops: 5 [#1] PREEMPT SMP ARM > (...) > PC is at irq_chip_eoi_parent+0x4/0x10 > LR is at pm8xxx_irq_handler+0x1b4/0x2d8 > > Implement a local stub just avoiding to call down to > irq_chip_eoi_parent() if d->parent_data is not set. > > Cc: Bjorn Andersson > Cc: Lina Iyer > Cc: Marc Zyngier > Cc: Stephen Boyd > Cc: stable@vger.kernel.org > Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy") > Signed-off-by: Linus Walleij > --- > drivers/pinctrl/qcom/pinctrl-msm.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c > b/drivers/pinctrl/qcom/pinctrl-msm.c > index 9a8daa256a32..511f596cf2c3 100644 > --- a/drivers/pinctrl/qcom/pinctrl-msm.c > +++ b/drivers/pinctrl/qcom/pinctrl-msm.c > @@ -828,6 +828,12 @@ static void msm_gpio_irq_unmask(struct irq_data > *d) > msm_gpio_irq_clear_unmask(d, false); > } > > +static void msm_gpio_irq_eoi(struct irq_data *d) > +{ > + if (d->parent_data) > + irq_chip_eoi_parent(d); > +} > + > static void msm_gpio_irq_ack(struct irq_data *d) > { > struct gpio_chip *gc = irq_data_get_irq_chip_data(d); > @@ -1104,7 +1110,7 @@ static int msm_gpio_init(struct msm_pinctrl > *pctrl) > pctrl->irq_chip.irq_mask = msm_gpio_irq_mask; > pctrl->irq_chip.irq_unmask = msm_gpio_irq_unmask; > pctrl->irq_chip.irq_ack = msm_gpio_irq_ack; > - pctrl->irq_chip.irq_eoi = irq_chip_eoi_parent; > + pctrl->irq_chip.irq_eoi = msm_gpio_irq_eoi; > pctrl->irq_chip.irq_set_type = msm_gpio_irq_set_type; > pctrl->irq_chip.irq_set_wake = msm_gpio_irq_set_wake; > pctrl->irq_chip.irq_request_resources = msm_gpio_irq_reqres; Long term, it may me better to offer a different set of callbacks for interrupts that are terminated at the pinctrl level. In the meantime, and as a fix: Acked-by: Marc Zyngier I assume you'll take this via the pinctrl tree? Thanks, M. -- Jazz is not dead. It just smells funny...