Linux GPIO subsystem development
 help / color / mirror / Atom feed
From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Sneh Mankad <sneh.mankad@oss.qualcomm.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Linus Walleij <linusw@kernel.org>,
	Yuanjie Yang <quic_yuanjiey@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/3] pinctrl: qcom: Avoid assigning thread_op_remain in unthreaded test
Date: Wed, 3 Jun 2026 15:58:26 +0200	[thread overview]
Message-ID: <bf77fa4c-168a-49ac-bfe9-87880b0bbc9f@oss.qualcomm.com> (raw)
In-Reply-To: <20260529-tlmm_test_changes-v1-3-88bfdccb4369@oss.qualcomm.com>



On 29-May-26 14:55, Sneh Mankad wrote:
> tlmm_test_rising_while_disabled() sets thread_op_remain to 10, but this
> variable is only used by the threaded IRQ handler to control the number
> of GPIO pin toggles. Since tlmm_test_rising_while_disabled() does not
> register a threaded IRQ handler, the assignment is never used.
> 
> Remove the thread_op_remain assignment from
> tlmm_test_rising_while_disabled().
> 
> This does not cause any change in functionality.
> 
> Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
> ---
>  drivers/pinctrl/qcom/tlmm-test.c | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/drivers/pinctrl/qcom/tlmm-test.c b/drivers/pinctrl/qcom/tlmm-test.c
> index 007d6539ceced294e81cfbe93a00c75a98c858de..e9e04300ab3687825255885821ebde0f3ee586a8 100644
> --- a/drivers/pinctrl/qcom/tlmm-test.c
> +++ b/drivers/pinctrl/qcom/tlmm-test.c
> @@ -521,7 +521,6 @@ static void tlmm_test_rising_while_disabled(struct kunit *test)
>  	unsigned int before_edge;
>  
>  	priv->intr_op = TLMM_TEST_COUNT;
> -	atomic_set(&priv->thread_op_remain, 10);

Should this be setting priv->intr_op_remain instead?

Konrad

  reply	other threads:[~2026-06-03 13:58 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-29 12:55 [PATCH 0/3] pinctrl: qcom: Correct MSM_PULL_MASK and fix resolving TLMM register address Sneh Mankad
2026-05-29 12:55 ` [PATCH 1/3] pinctrl: qcom: Modify MSM_PULL_MASK to accurately represent PULL bits Sneh Mankad
2026-06-03 13:53   ` Konrad Dybcio
2026-06-08  3:32   ` Dmitry Baryshkov
2026-05-29 12:55 ` [PATCH 2/3] pinctrl: qcom: Fix resolving register base address from device node Sneh Mankad
2026-06-08  3:34   ` Dmitry Baryshkov
2026-05-29 12:55 ` [PATCH 3/3] pinctrl: qcom: Avoid assigning thread_op_remain in unthreaded test Sneh Mankad
2026-06-03 13:58   ` Konrad Dybcio [this message]
2026-06-10  6:16     ` Sneh Mankad
2026-06-15 14:38       ` Konrad Dybcio
2026-06-08 19:31 ` [PATCH 0/3] pinctrl: qcom: Correct MSM_PULL_MASK and fix resolving TLMM register address Linus Walleij

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=bf77fa4c-168a-49ac-bfe9-87880b0bbc9f@oss.qualcomm.com \
    --to=konrad.dybcio@oss.qualcomm.com \
    --cc=andersson@kernel.org \
    --cc=linusw@kernel.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-gpio@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=quic_yuanjiey@quicinc.com \
    --cc=sneh.mankad@oss.qualcomm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox