From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Sricharan R <quic_srichara@quicinc.com>,
agross@kernel.org, bjorn.andersson@linaro.org,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
mturquette@baylibre.com, sboyd@kernel.org,
linus.walleij@linaro.org, catalin.marinas@arm.com,
p.zabel@pengutronix.de, quic_varada@quicinc.com,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH V2 3/8] clk: qcom: Add Global Clock controller (GCC) driver for IPQ5018
Date: Wed, 22 Jun 2022 17:08:33 +0200 [thread overview]
Message-ID: <c9ec14db-1ddd-7316-4ef6-9d57509f3fad@linaro.org> (raw)
In-Reply-To: <20220621161126.15883-4-quic_srichara@quicinc.com>
On 21/06/2022 18:11, Sricharan R wrote:
> From: Varadarajan Narayanan <quic_varada@quicinc.com>
>
> Add support for the global clock controller found on IPQ5018
> based devices.
>
> Co-developed-by: Sricharan R <quic_srichara@quicinc.com>
> Signed-off-by: Sricharan R <quic_srichara@quicinc.com>
> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Thank you for your patch. There is something to discuss/improve.
> ---
> drivers/clk/qcom/Kconfig | 7 +
> drivers/clk/qcom/Makefile | 1 +
> drivers/clk/qcom/gcc-ipq5018.c | 3995 ++++++++++++++++++++++++++++++++
> 3 files changed, 4003 insertions(+)
> create mode 100644 drivers/clk/qcom/gcc-ipq5018.c
>
> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
> index d01436be6d7a..294fb975db85 100644
> --- a/drivers/clk/qcom/Kconfig
> +++ b/drivers/clk/qcom/Kconfig
> @@ -172,6 +172,13 @@ config IPQ_GCC_8074
> i2c, USB, SD/eMMC, etc. Select this for the root clock
> of ipq8074.
>
> +config IPQ_GCC_5018
> + tristate "IPQ5018 Global Clock Controller"
> + help
> + Support for global clock controller on ipq5018 devices.
> + Say Y if you want to use peripheral devices such as UART, SPI,
> + i2c, USB, SD/eMMC, etc.
> +
> config MSM_GCC_8660
> tristate "MSM8660 Global Clock Controller"
> help
> diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
> index 671cf5821af1..33ab4ce9b863 100644
> --- a/drivers/clk/qcom/Makefile
> +++ b/drivers/clk/qcom/Makefile
> @@ -26,6 +26,7 @@ obj-$(CONFIG_IPQ_GCC_4019) += gcc-ipq4019.o
> obj-$(CONFIG_IPQ_GCC_6018) += gcc-ipq6018.o
> obj-$(CONFIG_IPQ_GCC_806X) += gcc-ipq806x.o
> obj-$(CONFIG_IPQ_GCC_8074) += gcc-ipq8074.o
> +obj-$(CONFIG_IPQ_GCC_5018) += gcc-ipq5018.o
> obj-$(CONFIG_IPQ_LCC_806X) += lcc-ipq806x.o
> obj-$(CONFIG_MDM_GCC_9607) += gcc-mdm9607.o
> obj-$(CONFIG_MDM_GCC_9615) += gcc-mdm9615.o
(...)
> +
> +static int gcc_ipq5018_probe(struct platform_device *pdev)
> +{
> + int ret;
> + struct regmap *regmap;
> + struct qcom_cc_desc ipq5018_desc = gcc_ipq5018_desc;
> +
> + regmap = qcom_cc_map(pdev, &ipq5018_desc);
> + if (IS_ERR(regmap))
> + return PTR_ERR(regmap);
> +
> + clk_alpha_pll_configure(&ubi32_pll_main, regmap, &ubi32_pll_config);
> +
> + ret = qcom_cc_really_probe(pdev, &ipq5018_desc, regmap);
return qcom_cc_really_probe(....)
> + if (ret) {
> + dev_err(&pdev->dev, "Failed to register ipq5018 GCC clocks\n");
> + return ret;
> + }
> +
> + dev_info(&pdev->dev, "Registered ipq5018 GCC clocks provider");
No probe success messages. This pollutes the log and there is other
infrastructure to check for successful probe.
> +
> + return ret;
> +}
> +
> +static struct platform_driver gcc_ipq5018_driver = {
> + .probe = gcc_ipq5018_probe,
> + .driver = {
> + .name = "qcom,gcc-ipq5018",
> + .owner = THIS_MODULE,
No need for owner.
> + .of_match_table = gcc_ipq5018_match_table,
> + },
> +};
> +
> +static int __init gcc_ipq5018_init(void)
> +{
> + return platform_driver_register(&gcc_ipq5018_driver);
> +}
> +core_initcall(gcc_ipq5018_init);
> +
> +static void __exit gcc_ipq5018_exit(void)
> +{
> + platform_driver_unregister(&gcc_ipq5018_driver);
> +}
> +module_exit(gcc_ipq5018_exit);
> +
> +MODULE_DESCRIPTION("Qualcomm Technologies, Inc. GCC IPQ5018 Driver");
> +MODULE_LICENSE("GPL v2");
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-06-22 15:09 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-21 16:11 [PATCH V2 0/8] Add minimal boot support for IPQ5018 Sricharan R
2022-06-21 16:11 ` [PATCH V2 1/8] clk: qcom: clk-alpha-pll: Add support for Stromer PLLs Sricharan R
2022-06-21 16:11 ` [PATCH V2 2/8] dt-bindings: arm64: ipq5018: Add binding descriptions for clock and reset Sricharan R
2022-06-22 15:04 ` Krzysztof Kozlowski
2022-06-23 6:00 ` Sricharan Ramabadhran
2022-06-24 17:26 ` Rob Herring
2022-06-21 16:11 ` [PATCH V2 3/8] clk: qcom: Add Global Clock controller (GCC) driver for IPQ5018 Sricharan R
2022-06-22 15:08 ` Krzysztof Kozlowski [this message]
2022-06-23 6:06 ` Sricharan Ramabadhran
2022-06-24 4:05 ` Bjorn Andersson
2022-06-27 19:51 ` Sricharan Ramabadhran
2022-06-28 1:28 ` kernel test robot
2022-06-21 16:11 ` [PATCH V2 4/8] dt-bindings: pinctrl: qcom: Add ipq5018 pinctrl bindings Sricharan R
2022-06-22 15:13 ` Krzysztof Kozlowski
2022-06-23 6:28 ` Sricharan Ramabadhran
2022-06-24 3:44 ` Bjorn Andersson
2022-06-24 17:26 ` Rob Herring
2022-06-21 16:11 ` [PATCH V2 5/8] pinctrl: qcom: Add IPQ5018 pinctrl driver Sricharan R
2022-06-24 3:54 ` Bjorn Andersson
2022-06-27 19:35 ` Sricharan Ramabadhran
2022-06-28 3:31 ` kernel test robot
2022-06-21 16:11 ` [PATCH V2 6/8] dt-bindings: qcom: Add ipq5018 bindings Sricharan R
2022-06-22 15:14 ` Krzysztof Kozlowski
2022-06-23 6:28 ` Sricharan Ramabadhran
2022-06-21 16:11 ` [PATCH V2 7/8] arm64: dts: Add ipq5018 SoC and MP03 board support Sricharan R
2022-06-22 15:18 ` Krzysztof Kozlowski
2022-06-23 7:19 ` Sricharan Ramabadhran
2022-06-26 18:32 ` Konrad Dybcio
2022-06-28 7:14 ` Sricharan Ramabadhran
2022-07-01 7:31 ` Konrad Dybcio
2022-06-21 16:11 ` [PATCH V2 8/8] arm64: defconfig: Enable IPQ5018 SoC base configs Sricharan R
2022-06-28 12:55 ` [PATCH V2 0/8] Add minimal boot support for IPQ5018 Linus Walleij
2022-06-29 6:51 ` Sricharan Ramabadhran
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