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Thu, 25 Jun 2026 02:20:33 -0700 (PDT) X-Received: by 2002:a05:6a00:340e:b0:842:6fac:bd3 with SMTP id d2e1a72fcca58-845b3aae9bfmr2112819b3a.28.1782379232532; Thu, 25 Jun 2026 02:20:32 -0700 (PDT) Received: from [10.218.48.36] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-845a3fcc696sm4340835b3a.4.2026.06.25.02.20.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 25 Jun 2026 02:20:32 -0700 (PDT) Message-ID: Date: Thu, 25 Jun 2026 14:50:26 +0530 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 4/8] irqchip/qcom-pdc: Differentiate between direct SPI and GPIO as SPI To: Konrad Dybcio , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thomas Gleixner , Linus Walleij Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, Sneh Mankad References: <20260616-hamoa_pdc_v3-v3-0-4d8e1504ea75@oss.qualcomm.com> <20260616-hamoa_pdc_v3-v3-4-4d8e1504ea75@oss.qualcomm.com> <2978f55b-0b5c-4720-98ba-e14ef46b1169@oss.qualcomm.com> Content-Language: en-US From: "Maulik Shah (mkshah)" In-Reply-To: <2978f55b-0b5c-4720-98ba-e14ef46b1169@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: xvb8KEvmebk8kpQKoA3mbCynMe7RCmXQ X-Proofpoint-Spam-Info: AW1haW4tMjYwNjI1MDA3OSBTYWx0ZWRfXwYTzDk4LkdfN VrHv4p458c9XM7fPtMSDT/7zSYwY3bo+LySVcFX5oryMeCINEPUQhb8PUF28DQp6+84eXTgdaNj 1E0JGTt3kAr9ctuvjgwnzWVAYvtAyZU= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjI1MDA3OSBTYWx0ZWRfXw55a2zLq1Njq kugC+ju4vywhML4/9OmGtojXP15VuHhJU0wh6q7r4CZPGk1EY61GzkZvQZmM/ajU/8KDuoqMB3A IocMSwKpUuGdu15P6SkqrfQO0GlUIW51Xqs2lilSY7WqLRfuHEpakB2c+CXO4ZP+fSaTxUx6ZNX S11rXiCykomkAukR2oOovKj5cHEGsaKl8EZhHWXH8rhAdbzF/N/jlIdufueFy+sMj/f14cHKbdw Y9/mc8itwZuPNgaWHgeI9Mc6d+j2lyOzkIhLOIDZOcdWGAUaqwnB+wxm1uJ0Imse+G+xVvG5wgd nvbFLrhPrZAt8OHbL/50vF9kyZS2bfyOvpDNAUy7RXnvNOCgtcXz3+xqjfaoqNFTgau9lBevDoC wfhuyZQiXG2S5BbVodMPBLnoVDMzy0SRMWv9tcTKFTU7StLteakRSjAmhHMshplAnSB2RrQxBE8 qK+y2gaF70YhXDW/IAQ== X-Authority-Analysis: v=2.4 cv=b/SCJNGx c=1 sm=1 tr=0 ts=6a3cf2e2 cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=fkzGnpFETygImC-9BAwA:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-GUID: xvb8KEvmebk8kpQKoA3mbCynMe7RCmXQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-25_01,2026-06-24_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 suspectscore=0 phishscore=0 bulkscore=0 adultscore=0 clxscore=1015 spamscore=0 malwarescore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2606250079 On 6/18/2026 1:32 PM, Konrad Dybcio wrote: > On 6/16/26 11:25 AM, Maulik Shah wrote: >> Before commit 4dc70713dc24 ("irqchip/qcom-pdc: Kill non-wakeup irqdomain") >> there are separate domains for direct SPIs and GPIO used as SPIs. Separate >> domains can be useful in case irqchip want to differentiate both of them. >> Since commit unified both the domains there is no way to differentiate. >> >> In preparation to add the second level interrupt controller support where >> GPIO interrupts get latched at PDC (but not direct SPIs) there is a need to >> differentiate between SPIs and GPIOs as SPIs. Reverting above commit do not >> seem a good option either which leads to waste of resources. >> >> PDC HW have the IRQ_PARAM register telling number of direct SPIs and number >> of GPIOs as SPIs. Further PDC allocates direct SPIs at the beginning and >> all GPIOs as SPIs are allocated at the end. This information can be used in >> driver to differentiate them. >> >> Add the support to read this register and keep this information in >> struct pdc_desc. Later change utilizes same. >> >> Signed-off-by: Maulik Shah >> --- > > [...] > >> + irq_param = pdc_reg_read(pdc->regs->irq_param_reg, 0); >> + pdc->num_spis = FIELD_GET(GENMASK(7, 0), irq_param); >> + pdc->num_gpios = FIELD_GET(GENMASK(15, 8), irq_param); > > num_gpios is not used in this series, please either drop it or > use it to limit the index in the following patches > > Konrad I will remove unused num_gpios from v4. Thanks, Maulik