[RESEND PATCH 00/19] Second step support for A100

[RESEND PATCH 00/19] Second step support for A100

[Frank Lee]

Let's add watchdog, arm-pmu, dma, usb, mmc..... support for allwinner
a100 soc.

Yangtao Li (19):
  pinctrl: sunxi: fix irq bank map for the Allwinner A100 pin controller
  pinctrl: sunxi: Mark the irq bank not found in
    sunxi_pinctrl_irq_handler() with WARN_ON
  pinctrl: sunxi: Always call chained_irq_{enter, exit} in
    sunxi_pinctrl_irq_handler
  dt-bindings: dma: allwinner,sun50i-a64-dma: Add A100 compatible
  dmaengine: sun6i: Add support for A100 DMA
  arm64: allwinner: a100: Add device node for DMA controller
  arm64: dts: allwinner: A100: Add PMU mode
  phy: sun4i-usb: remove enable_pmu_unk1 from sun50i_h6_cfg
  phy: allwinner: Convert to devm_platform_ioremap_* API
  dt-bindings: watchdog: sun4i: Add A100 compatible
  arm64: dts: allwinner: a100: add watchdog node
  dt-bindings: Add bindings for USB phy on Allwinner A100
  phy: sun4i-usb: add support for A100 USB PHY
  arm64: dts: allwinner: a100: add usb related nodes
  arm64: allwinner: A100: enable EHCI, OHCI and USB PHY nodes in Perf1
  dt-bindings: mmc: sunxi: Add A100 compatibles
  mmc: sunxi: add support for A100 mmc controller
  arm64: allwinner: a100: Add MMC related nodes
  arm64: dts: allwinner: a100: perf1: Add eMMC and MMC node

 .../dma/allwinner,sun50i-a64-dma.yaml         |   5 +-
 .../bindings/mmc/allwinner,sun4i-a10-mmc.yaml |   2 +
 .../phy/allwinner,sun50i-a100-usb-phy.yaml    | 105 ++++++++++
 .../watchdog/allwinner,sun4i-a10-wdt.yaml     |   3 +
 .../allwinner/sun50i-a100-allwinner-perf1.dts |  54 +++++
 .../arm64/boot/dts/allwinner/sun50i-a100.dtsi | 197 +++++++++++++++++-
 drivers/dma/sun6i-dma.c                       |  25 +++
 drivers/mmc/host/sunxi-mmc.c                  |  28 ++-
 drivers/phy/allwinner/phy-sun4i-usb.c         |  29 ++-
 drivers/phy/allwinner/phy-sun50i-usb3.c       |   4 +-
 drivers/phy/allwinner/phy-sun6i-mipi-dphy.c   |   4 +-
 drivers/phy/allwinner/phy-sun9i-usb.c         |   4 +-
 drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c   |   2 +-
 drivers/pinctrl/sunxi/pinctrl-sunxi.c         |   9 +-
 14 files changed, 443 insertions(+), 28 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/phy/allwinner,sun50i-a100-usb-phy.yaml

-- 
2.28.0

[RESEND PATCH 01/19] pinctrl: sunxi: fix irq bank map for the Allwinner A100 pin controller

[Frank Lee]

From: Yangtao Li <frank@allwinnertech.com>

A100's pin starts with PB, so it should start with 1.

Fixes: 473436e7647d6 ("pinctrl: sunxi: add support for the Allwinner A100 pin controller")
Signed-off-by: Yangtao Li <frank@allwinnertech.com>
---
 drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
index 19cfd1e76ee2..e69f6da40dc0 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
@@ -677,7 +677,7 @@ static const struct sunxi_desc_pin a100_pins[] = {
 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 19)),
 };
 
-static const unsigned int a100_irq_bank_map[] = { 0, 1, 2, 3, 4, 5, 6};
+static const unsigned int a100_irq_bank_map[] = { 1, 2, 3, 4, 5, 6, 7};
 
 static const struct sunxi_pinctrl_desc a100_pinctrl_data = {
 	.pins = a100_pins,
-- 
2.28.0

[RESEND PATCH 02/19] pinctrl: sunxi: Mark the irq bank not found in sunxi_pinctrl_irq_handler() with WARN_ON

[Frank Lee]

From: Yangtao Li <frank@allwinnertech.com>

The interrupt descriptor cannot be found in the interrupt processing
function, and this situation cannot happen when the system is running
normally. It doesn't seem right to return directly to the status of not
handling gic. In this case, it must be a bug, let's mark it with
WARN_ON.

Signed-off-by: Yangtao Li <frank@allwinnertech.com>
---
 drivers/pinctrl/sunxi/pinctrl-sunxi.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 8e792f8e2dc9..9d8b59dafa4b 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -1139,8 +1139,7 @@ static void sunxi_pinctrl_irq_handler(struct irq_desc *desc)
 		if (irq == pctl->irq[bank])
 			break;
 
-	if (bank == pctl->desc->irq_banks)
-		return;
+	WARN_ON(bank == pctl->desc->irq_banks);
 
 	reg = sunxi_irq_status_reg_from_bank(pctl->desc, bank);
 	val = readl(pctl->membase + reg);
-- 
2.28.0

[RESEND PATCH 03/19] pinctrl: sunxi: Always call chained_irq_{enter, exit} in sunxi_pinctrl_irq_handler

[Frank Lee]

From: Yangtao Li <frank@allwinnertech.com>

It is found on many allwinner soc that there is a low probability that
the interrupt status cannot be read in sunxi_pinctrl_irq_handler. This
will cause the interrupt status of a gpio bank to always be active on
gic, preventing gic from responding to other spi interrupts correctly.

So we should call the chained_irq_* each time enter sunxi_pinctrl_irq_handler().

Cc: stable@vger.kernel.org
Signed-off-by: Yangtao Li <frank@allwinnertech.com>
---
 drivers/pinctrl/sunxi/pinctrl-sunxi.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 9d8b59dafa4b..dc8d39ae045b 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -1141,20 +1141,22 @@ static void sunxi_pinctrl_irq_handler(struct irq_desc *desc)
 
 	WARN_ON(bank == pctl->desc->irq_banks);
 
+	chained_irq_enter(chip, desc);
+
 	reg = sunxi_irq_status_reg_from_bank(pctl->desc, bank);
 	val = readl(pctl->membase + reg);
 
 	if (val) {
 		int irqoffset;
 
-		chained_irq_enter(chip, desc);
 		for_each_set_bit(irqoffset, &val, IRQ_PER_BANK) {
 			int pin_irq = irq_find_mapping(pctl->domain,
 						       bank * IRQ_PER_BANK + irqoffset);
 			generic_handle_irq(pin_irq);
 		}
-		chained_irq_exit(chip, desc);
 	}
+
+	chained_irq_exit(chip, desc);
 }
 
 static int sunxi_pinctrl_add_function(struct sunxi_pinctrl *pctl,
-- 
2.28.0

Re: [RESEND PATCH 01/19] pinctrl: sunxi: fix irq bank map for the Allwinner A100 pin controller

[Linus Walleij]

On Tue, Nov 10, 2020 at 7:23 AM Frank Lee <frank@allwinnertech.com> wrote:

> From: Yangtao Li <frank@allwinnertech.com>
>
> A100's pin starts with PB, so it should start with 1.
>
> Fixes: 473436e7647d6 ("pinctrl: sunxi: add support for the Allwinner A100 pin controller")
> Signed-off-by: Yangtao Li <frank@allwinnertech.com>

No response from maintainers for 14 days so patch applied.

Yours,
Linus Walleij

Re: [RESEND PATCH 02/19] pinctrl: sunxi: Mark the irq bank not found in sunxi_pinctrl_irq_handler() with WARN_ON

[Linus Walleij]

On Tue, Nov 10, 2020 at 7:24 AM Frank Lee <frank@allwinnertech.com> wrote:

> From: Yangtao Li <frank@allwinnertech.com>
>
> The interrupt descriptor cannot be found in the interrupt processing
> function, and this situation cannot happen when the system is running
> normally. It doesn't seem right to return directly to the status of not
> handling gic. In this case, it must be a bug, let's mark it with
> WARN_ON.
>
> Signed-off-by: Yangtao Li <frank@allwinnertech.com>

Patch applied.

Yours,
Linus Walleij

Re: [RESEND PATCH 03/19] pinctrl: sunxi: Always call chained_irq_{enter, exit} in sunxi_pinctrl_irq_handler

[Linus Walleij]

On Tue, Nov 10, 2020 at 7:24 AM Frank Lee <frank@allwinnertech.com> wrote:

> From: Yangtao Li <frank@allwinnertech.com>
>
> It is found on many allwinner soc that there is a low probability that
> the interrupt status cannot be read in sunxi_pinctrl_irq_handler. This
> will cause the interrupt status of a gpio bank to always be active on
> gic, preventing gic from responding to other spi interrupts correctly.
>
> So we should call the chained_irq_* each time enter sunxi_pinctrl_irq_handler().
>
> Cc: stable@vger.kernel.org
> Signed-off-by: Yangtao Li <frank@allwinnertech.com>

Patch applied.

Yours,
Linus Walleij