* [PATCH 01/10] pinctrl: renesas: Remove unused pfc parameter from .pin_to_pocctrl()
2021-12-23 14:56 [PATCH 00/10] pinctrl: renesas: checker: Miscellaneous improvements Geert Uytterhoeven
@ 2021-12-23 14:56 ` Geert Uytterhoeven
2021-12-23 14:56 ` [PATCH 02/10] pinctrl: renesas: Factor out .pin_to_portcr() address handling Geert Uytterhoeven
` (8 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Geert Uytterhoeven @ 2021-12-23 14:56 UTC (permalink / raw)
To: Linus Walleij; +Cc: linux-renesas-soc, linux-gpio, Geert Uytterhoeven
The pfc parameter of the .pin_to_pocctrl() method was never used.
It is a relic of the old I/O voltage handling before commit
8775306dcf48092f ("pinctrl: sh-pfc: refactor voltage setting").
Remove the parameter, as it prevents the checker from calling this
function for validating consistency of the pin control tables.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/pinctrl/renesas/pfc-r8a77470.c | 3 +--
drivers/pinctrl/renesas/pfc-r8a7790.c | 2 +-
drivers/pinctrl/renesas/pfc-r8a7791.c | 2 +-
drivers/pinctrl/renesas/pfc-r8a7794.c | 2 +-
drivers/pinctrl/renesas/pfc-r8a77950.c | 3 +--
drivers/pinctrl/renesas/pfc-r8a77951.c | 3 +--
drivers/pinctrl/renesas/pfc-r8a7796.c | 3 +--
drivers/pinctrl/renesas/pfc-r8a77965.c | 3 +--
drivers/pinctrl/renesas/pfc-r8a77970.c | 3 +--
drivers/pinctrl/renesas/pfc-r8a77980.c | 3 +--
drivers/pinctrl/renesas/pfc-r8a77990.c | 3 +--
drivers/pinctrl/renesas/pfc-r8a77995.c | 2 +-
drivers/pinctrl/renesas/pfc-r8a779a0.c | 3 +--
drivers/pinctrl/renesas/pinctrl.c | 4 ++--
drivers/pinctrl/renesas/sh_pfc.h | 2 +-
15 files changed, 16 insertions(+), 25 deletions(-)
diff --git a/drivers/pinctrl/renesas/pfc-r8a77470.c b/drivers/pinctrl/renesas/pfc-r8a77470.c
index 3a722e0da48b781b..ee6e8fabab246c2b 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77470.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77470.c
@@ -3345,8 +3345,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ },
};
-static int r8a77470_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin,
- u32 *pocctrl)
+static int r8a77470_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
{
int bit = -EINVAL;
diff --git a/drivers/pinctrl/renesas/pfc-r8a7790.c b/drivers/pinctrl/renesas/pfc-r8a7790.c
index 9c264dee03dfa906..0aa141069daf3389 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7790.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7790.c
@@ -5873,7 +5873,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ },
};
-static int r8a7790_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl)
+static int r8a7790_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
{
if (pin < RCAR_GP_PIN(3, 0) || pin > RCAR_GP_PIN(3, 31))
return -EINVAL;
diff --git a/drivers/pinctrl/renesas/pfc-r8a7791.c b/drivers/pinctrl/renesas/pfc-r8a7791.c
index e4a284ae7cfaf59e..076a8b7d71de04d2 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7791.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7791.c
@@ -6602,7 +6602,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ },
};
-static int r8a7791_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl)
+static int r8a7791_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
{
if (pin < RCAR_GP_PIN(6, 0) || pin > RCAR_GP_PIN(6, 23))
return -EINVAL;
diff --git a/drivers/pinctrl/renesas/pfc-r8a7794.c b/drivers/pinctrl/renesas/pfc-r8a7794.c
index 3835c3956bd1f017..d1b0e651738249ca 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7794.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7794.c
@@ -5570,7 +5570,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ },
};
-static int r8a7794_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl)
+static int r8a7794_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
{
if (pin < RCAR_GP_PIN(6, 0) || pin > RCAR_GP_PIN(6, 23))
return -EINVAL;
diff --git a/drivers/pinctrl/renesas/pfc-r8a77950.c b/drivers/pinctrl/renesas/pfc-r8a77950.c
index ae3dd734c724bebf..63c9f6d6468b3869 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77950.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77950.c
@@ -5514,8 +5514,7 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
{ /* sentinel */ },
};
-static int r8a77950_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin,
- u32 *pocctrl)
+static int r8a77950_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
{
int bit = -EINVAL;
diff --git a/drivers/pinctrl/renesas/pfc-r8a77951.c b/drivers/pinctrl/renesas/pfc-r8a77951.c
index bd6f83485e565210..9d6eef4e9d1885b9 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77951.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77951.c
@@ -5962,8 +5962,7 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
{ /* sentinel */ },
};
-static int r8a77951_pin_to_pocctrl(struct sh_pfc *pfc,
- unsigned int pin, u32 *pocctrl)
+static int r8a77951_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
{
int bit = -EINVAL;
diff --git a/drivers/pinctrl/renesas/pfc-r8a7796.c b/drivers/pinctrl/renesas/pfc-r8a7796.c
index 6079f588a201430d..75ea36829a70e024 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7796.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7796.c
@@ -5913,8 +5913,7 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
{ /* sentinel */ },
};
-static int r8a7796_pin_to_pocctrl(struct sh_pfc *pfc,
- unsigned int pin, u32 *pocctrl)
+static int r8a7796_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
{
int bit = -EINVAL;
diff --git a/drivers/pinctrl/renesas/pfc-r8a77965.c b/drivers/pinctrl/renesas/pfc-r8a77965.c
index 75e7b02337b2efea..6bb7f7543c37ca8d 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77965.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77965.c
@@ -6154,8 +6154,7 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
{ /* sentinel */ },
};
-static int r8a77965_pin_to_pocctrl(struct sh_pfc *pfc,
- unsigned int pin, u32 *pocctrl)
+static int r8a77965_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
{
int bit = -EINVAL;
diff --git a/drivers/pinctrl/renesas/pfc-r8a77970.c b/drivers/pinctrl/renesas/pfc-r8a77970.c
index bcbd5904451d2b79..94f90c13989eceb9 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77970.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77970.c
@@ -2434,8 +2434,7 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
{ /* sentinel */ },
};
-static int r8a77970_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin,
- u32 *pocctrl)
+static int r8a77970_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
{
int bit = pin & 0x1f;
diff --git a/drivers/pinctrl/renesas/pfc-r8a77980.c b/drivers/pinctrl/renesas/pfc-r8a77980.c
index df15d9a2007e4828..c229a5d8fa573816 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77980.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77980.c
@@ -2878,8 +2878,7 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
{ /* sentinel */ },
};
-static int r8a77980_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin,
- u32 *pocctrl)
+static int r8a77980_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
{
int bit = pin & 0x1f;
diff --git a/drivers/pinctrl/renesas/pfc-r8a77990.c b/drivers/pinctrl/renesas/pfc-r8a77990.c
index 68e82d4bc06ec663..228896529545c441 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77990.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77990.c
@@ -5023,8 +5023,7 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
{ /* sentinel */ },
};
-static int r8a77990_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin,
- u32 *pocctrl)
+static int r8a77990_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
{
int bit = -EINVAL;
diff --git a/drivers/pinctrl/renesas/pfc-r8a77995.c b/drivers/pinctrl/renesas/pfc-r8a77995.c
index c3106fd040d90ae4..e8c896f19f45e376 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77995.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77995.c
@@ -2822,7 +2822,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ },
};
-static int r8a77995_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl)
+static int r8a77995_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
{
int bit = -EINVAL;
diff --git a/drivers/pinctrl/renesas/pfc-r8a779a0.c b/drivers/pinctrl/renesas/pfc-r8a779a0.c
index 463ebd6c6c70d931..155294d0dd5abfb4 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779a0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779a0.c
@@ -4011,8 +4011,7 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
{ /* sentinel */ },
};
-static int r8a779a0_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin,
- u32 *pocctrl)
+static int r8a779a0_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
{
int bit = pin & 0x1f;
diff --git a/drivers/pinctrl/renesas/pinctrl.c b/drivers/pinctrl/renesas/pinctrl.c
index 96b9de974246ac23..a5862c67a6ecc22e 100644
--- a/drivers/pinctrl/renesas/pinctrl.c
+++ b/drivers/pinctrl/renesas/pinctrl.c
@@ -639,7 +639,7 @@ static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin,
if (!pfc->info->ops || !pfc->info->ops->pin_to_pocctrl)
return -ENOTSUPP;
- bit = pfc->info->ops->pin_to_pocctrl(pfc, _pin, &pocctrl);
+ bit = pfc->info->ops->pin_to_pocctrl(_pin, &pocctrl);
if (WARN(bit < 0, "invalid pin %#x", _pin))
return bit;
@@ -711,7 +711,7 @@ static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned _pin,
if (!pfc->info->ops || !pfc->info->ops->pin_to_pocctrl)
return -ENOTSUPP;
- bit = pfc->info->ops->pin_to_pocctrl(pfc, _pin, &pocctrl);
+ bit = pfc->info->ops->pin_to_pocctrl(_pin, &pocctrl);
if (WARN(bit < 0, "invalid pin %#x", _pin))
return bit;
diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h
index 4124e3b46c16c8de..d8a6bd0412e496d3 100644
--- a/drivers/pinctrl/renesas/sh_pfc.h
+++ b/drivers/pinctrl/renesas/sh_pfc.h
@@ -254,7 +254,7 @@ struct sh_pfc_soc_operations {
unsigned int (*get_bias)(struct sh_pfc *pfc, unsigned int pin);
void (*set_bias)(struct sh_pfc *pfc, unsigned int pin,
unsigned int bias);
- int (*pin_to_pocctrl)(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl);
+ int (*pin_to_pocctrl)(unsigned int pin, u32 *pocctrl);
void __iomem * (*pin_to_portcr)(struct sh_pfc *pfc, unsigned int pin);
};
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 02/10] pinctrl: renesas: Factor out .pin_to_portcr() address handling
2021-12-23 14:56 [PATCH 00/10] pinctrl: renesas: checker: Miscellaneous improvements Geert Uytterhoeven
2021-12-23 14:56 ` [PATCH 01/10] pinctrl: renesas: Remove unused pfc parameter from .pin_to_pocctrl() Geert Uytterhoeven
@ 2021-12-23 14:56 ` Geert Uytterhoeven
2021-12-23 14:56 ` [PATCH 03/10] pinctrl: renesas: Pass sh_pfc_soc_info to rcar_pin_to_bias_reg() Geert Uytterhoeven
` (7 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Geert Uytterhoeven @ 2021-12-23 14:56 UTC (permalink / raw)
To: Linus Walleij; +Cc: linux-renesas-soc, linux-gpio, Geert Uytterhoeven
All implementations of the .pin_to_portcr() method implement the same
conversion from Port Control Register offset to virtual address. Factor
it out into the two callers.
Remove the pfc parameter, as it is no longer used.
Note that the failure handling in r8a7740_pin_to_portcr() is pro forma,
as the function is never called with an invalid pin number.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/pinctrl/renesas/pfc-r8a73a4.c | 4 ++--
drivers/pinctrl/renesas/pfc-r8a7740.c | 6 +++---
drivers/pinctrl/renesas/pfc-sh73a0.c | 4 ++--
drivers/pinctrl/renesas/pinctrl.c | 6 ++++--
drivers/pinctrl/renesas/sh_pfc.h | 2 +-
5 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/drivers/pinctrl/renesas/pfc-r8a73a4.c b/drivers/pinctrl/renesas/pfc-r8a73a4.c
index 1e569f6a03bf13e0..ba3a1857f80a08c4 100644
--- a/drivers/pinctrl/renesas/pfc-r8a73a4.c
+++ b/drivers/pinctrl/renesas/pfc-r8a73a4.c
@@ -2606,9 +2606,9 @@ static const unsigned int r8a73a4_portcr_offsets[] = {
0x00002000, 0x00003000, 0x00003000,
};
-static void __iomem *r8a73a4_pin_to_portcr(struct sh_pfc *pfc, unsigned int pin)
+static int r8a73a4_pin_to_portcr(unsigned int pin)
{
- return pfc->windows->virt + r8a73a4_portcr_offsets[pin >> 5] + pin;
+ return r8a73a4_portcr_offsets[pin >> 5] + pin;
}
static const struct sh_pfc_soc_operations r8a73a4_pfc_ops = {
diff --git a/drivers/pinctrl/renesas/pfc-r8a7740.c b/drivers/pinctrl/renesas/pfc-r8a7740.c
index 3214331ba4e243cb..e8b9fb74a802ac03 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7740.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7740.c
@@ -3495,7 +3495,7 @@ static const struct r8a7740_portcr_group r8a7740_portcr_offsets[] = {
{ 83, 0x0000 }, { 114, 0x1000 }, { 209, 0x2000 }, { 211, 0x3000 },
};
-static void __iomem *r8a7740_pin_to_portcr(struct sh_pfc *pfc, unsigned int pin)
+static int r8a7740_pin_to_portcr(unsigned int pin)
{
unsigned int i;
@@ -3504,10 +3504,10 @@ static void __iomem *r8a7740_pin_to_portcr(struct sh_pfc *pfc, unsigned int pin)
&r8a7740_portcr_offsets[i];
if (pin <= group->end_pin)
- return pfc->windows->virt + group->offset + pin;
+ return group->offset + pin;
}
- return NULL;
+ return -1;
}
static const struct sh_pfc_soc_operations r8a7740_pfc_ops = {
diff --git a/drivers/pinctrl/renesas/pfc-sh73a0.c b/drivers/pinctrl/renesas/pfc-sh73a0.c
index 44cf1adaff13b02c..5d8a0179fd60fee4 100644
--- a/drivers/pinctrl/renesas/pfc-sh73a0.c
+++ b/drivers/pinctrl/renesas/pfc-sh73a0.c
@@ -4137,9 +4137,9 @@ static const unsigned int sh73a0_portcr_offsets[] = {
0x00002000, 0x00002000, 0x00003000, 0x00003000, 0x00002000,
};
-static void __iomem *sh73a0_pin_to_portcr(struct sh_pfc *pfc, unsigned int pin)
+static int sh73a0_pin_to_portcr(unsigned int pin)
{
- return pfc->windows->virt + sh73a0_portcr_offsets[pin >> 5] + pin;
+ return sh73a0_portcr_offsets[pin >> 5] + pin;
}
/* -----------------------------------------------------------------------------
diff --git a/drivers/pinctrl/renesas/pinctrl.c b/drivers/pinctrl/renesas/pinctrl.c
index a5862c67a6ecc22e..f0c42c053f8e2460 100644
--- a/drivers/pinctrl/renesas/pinctrl.c
+++ b/drivers/pinctrl/renesas/pinctrl.c
@@ -919,7 +919,8 @@ void rcar_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
unsigned int rmobile_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin)
{
- void __iomem *reg = pfc->info->ops->pin_to_portcr(pfc, pin);
+ void __iomem *reg = pfc->windows->virt +
+ pfc->info->ops->pin_to_portcr(pin);
u32 value = ioread8(reg) & PORTnCR_PULMD_MASK;
switch (value) {
@@ -936,7 +937,8 @@ unsigned int rmobile_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin)
void rmobile_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
unsigned int bias)
{
- void __iomem *reg = pfc->info->ops->pin_to_portcr(pfc, pin);
+ void __iomem *reg = pfc->windows->virt +
+ pfc->info->ops->pin_to_portcr(pin);
u32 value = ioread8(reg) & ~PORTnCR_PULMD_MASK;
switch (bias) {
diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h
index d8a6bd0412e496d3..7191c1c9ca959954 100644
--- a/drivers/pinctrl/renesas/sh_pfc.h
+++ b/drivers/pinctrl/renesas/sh_pfc.h
@@ -255,7 +255,7 @@ struct sh_pfc_soc_operations {
void (*set_bias)(struct sh_pfc *pfc, unsigned int pin,
unsigned int bias);
int (*pin_to_pocctrl)(unsigned int pin, u32 *pocctrl);
- void __iomem * (*pin_to_portcr)(struct sh_pfc *pfc, unsigned int pin);
+ int (*pin_to_portcr)(unsigned int pin);
};
struct sh_pfc_soc_info {
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 03/10] pinctrl: renesas: Pass sh_pfc_soc_info to rcar_pin_to_bias_reg()
2021-12-23 14:56 [PATCH 00/10] pinctrl: renesas: checker: Miscellaneous improvements Geert Uytterhoeven
2021-12-23 14:56 ` [PATCH 01/10] pinctrl: renesas: Remove unused pfc parameter from .pin_to_pocctrl() Geert Uytterhoeven
2021-12-23 14:56 ` [PATCH 02/10] pinctrl: renesas: Factor out .pin_to_portcr() address handling Geert Uytterhoeven
@ 2021-12-23 14:56 ` Geert Uytterhoeven
2021-12-23 14:56 ` [PATCH 04/10] pinctrl: renesas: checker: Simplify same_name() Geert Uytterhoeven
` (6 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Geert Uytterhoeven @ 2021-12-23 14:56 UTC (permalink / raw)
To: Linus Walleij; +Cc: linux-renesas-soc, linux-gpio, Geert Uytterhoeven
Currently rcar_pin_to_bias_reg() takes a struct sh_pfc pointer, which is
only available after the pin control driver has been initialized,
thus preventing the checker from calling this function for validating
consistency of the pin control tables.
Fix this by replacing the parameter by a struct sh_pfc_soc_info pointer.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/pinctrl/renesas/pfc-r8a77995.c | 2 +-
drivers/pinctrl/renesas/pinctrl.c | 14 +++++++-------
drivers/pinctrl/renesas/sh_pfc.h | 2 +-
3 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/pinctrl/renesas/pfc-r8a77995.c b/drivers/pinctrl/renesas/pfc-r8a77995.c
index e8c896f19f45e376..9fe6646bfafaf2b5 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77995.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77995.c
@@ -3058,7 +3058,7 @@ r8a77995_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
const struct pinmux_bias_reg *reg;
unsigned int bit;
- reg = rcar_pin_to_bias_reg(pfc, pin, &bit);
+ reg = rcar_pin_to_bias_reg(pfc->info, pin, &bit);
if (!reg)
return reg;
diff --git a/drivers/pinctrl/renesas/pinctrl.c b/drivers/pinctrl/renesas/pinctrl.c
index f0c42c053f8e2460..1fa9431601fad209 100644
--- a/drivers/pinctrl/renesas/pinctrl.c
+++ b/drivers/pinctrl/renesas/pinctrl.c
@@ -835,16 +835,16 @@ int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
}
const struct pinmux_bias_reg *
-rcar_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
+rcar_pin_to_bias_reg(const struct sh_pfc_soc_info *info, unsigned int pin,
unsigned int *bit)
{
unsigned int i, j;
- for (i = 0; pfc->info->bias_regs[i].puen || pfc->info->bias_regs[i].pud; i++) {
- for (j = 0; j < ARRAY_SIZE(pfc->info->bias_regs[i].pins); j++) {
- if (pfc->info->bias_regs[i].pins[j] == pin) {
+ for (i = 0; info->bias_regs[i].puen || info->bias_regs[i].pud; i++) {
+ for (j = 0; j < ARRAY_SIZE(info->bias_regs[i].pins); j++) {
+ if (info->bias_regs[i].pins[j] == pin) {
*bit = j;
- return &pfc->info->bias_regs[i];
+ return &info->bias_regs[i];
}
}
}
@@ -859,7 +859,7 @@ unsigned int rcar_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin)
const struct pinmux_bias_reg *reg;
unsigned int bit;
- reg = rcar_pin_to_bias_reg(pfc, pin, &bit);
+ reg = rcar_pin_to_bias_reg(pfc->info, pin, &bit);
if (!reg)
return PIN_CONFIG_BIAS_DISABLE;
@@ -885,7 +885,7 @@ void rcar_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
u32 enable, updown;
unsigned int bit;
- reg = rcar_pin_to_bias_reg(pfc, pin, &bit);
+ reg = rcar_pin_to_bias_reg(pfc->info, pin, &bit);
if (!reg)
return;
diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h
index 7191c1c9ca959954..2bd96b28bb8b49c9 100644
--- a/drivers/pinctrl/renesas/sh_pfc.h
+++ b/drivers/pinctrl/renesas/sh_pfc.h
@@ -759,7 +759,7 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info;
* Bias helpers
*/
const struct pinmux_bias_reg *
-rcar_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
+rcar_pin_to_bias_reg(const struct sh_pfc_soc_info *info, unsigned int pin,
unsigned int *bit);
unsigned int rcar_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin);
void rcar_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 04/10] pinctrl: renesas: checker: Simplify same_name()
2021-12-23 14:56 [PATCH 00/10] pinctrl: renesas: checker: Miscellaneous improvements Geert Uytterhoeven
` (2 preceding siblings ...)
2021-12-23 14:56 ` [PATCH 03/10] pinctrl: renesas: Pass sh_pfc_soc_info to rcar_pin_to_bias_reg() Geert Uytterhoeven
@ 2021-12-23 14:56 ` Geert Uytterhoeven
2021-12-23 14:56 ` [PATCH 05/10] pinctrl: renesas: checker: Add pin group sharing checks Geert Uytterhoeven
` (5 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Geert Uytterhoeven @ 2021-12-23 14:56 UTC (permalink / raw)
To: Linus Walleij; +Cc: linux-renesas-soc, linux-gpio, Geert Uytterhoeven
Simplify the helper that checks if two strings are valid and identical.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/pinctrl/renesas/core.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/pinctrl/renesas/core.c b/drivers/pinctrl/renesas/core.c
index 0d4ea2e22a53599f..5c0a6212706270e7 100644
--- a/drivers/pinctrl/renesas/core.c
+++ b/drivers/pinctrl/renesas/core.c
@@ -777,10 +777,7 @@ static bool __init is0s(const u16 *enum_ids, unsigned int n)
static bool __init same_name(const char *a, const char *b)
{
- if (!a || !b)
- return false;
-
- return !strcmp(a, b);
+ return a && b && !strcmp(a, b);
}
static void __init sh_pfc_check_reg(const char *drvname, u32 reg, u32 bits)
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 05/10] pinctrl: renesas: checker: Add pin group sharing checks
2021-12-23 14:56 [PATCH 00/10] pinctrl: renesas: checker: Miscellaneous improvements Geert Uytterhoeven
` (3 preceding siblings ...)
2021-12-23 14:56 ` [PATCH 04/10] pinctrl: renesas: checker: Simplify same_name() Geert Uytterhoeven
@ 2021-12-23 14:56 ` Geert Uytterhoeven
2021-12-23 14:56 ` [PATCH 06/10] pinctrl: renesas: checker: Validate bias configs consistency Geert Uytterhoeven
` (4 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Geert Uytterhoeven @ 2021-12-23 14:56 UTC (permalink / raw)
To: Linus Walleij; +Cc: linux-renesas-soc, linux-gpio, Geert Uytterhoeven
Add checks for discovering pin groups that could share pin data, as
sharing reduces kernel size.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/pinctrl/renesas/core.c | 37 +++++++++++++++++++++++++++++-----
1 file changed, 32 insertions(+), 5 deletions(-)
diff --git a/drivers/pinctrl/renesas/core.c b/drivers/pinctrl/renesas/core.c
index 5c0a6212706270e7..57a06b5ea17444e2 100644
--- a/drivers/pinctrl/renesas/core.c
+++ b/drivers/pinctrl/renesas/core.c
@@ -924,6 +924,35 @@ static void __init sh_pfc_check_bias_reg(const struct sh_pfc_soc_info *info,
sh_pfc_check_pin(info, bias->puen, bias->pins[i]);
}
+static void __init sh_pfc_compare_groups(const char *drvname,
+ const struct sh_pfc_pin_group *a,
+ const struct sh_pfc_pin_group *b)
+{
+ unsigned int i;
+ size_t len;
+
+ if (same_name(a->name, b->name))
+ sh_pfc_err("group %s: name conflict\n", a->name);
+
+ if (a->nr_pins > b->nr_pins)
+ swap(a, b);
+
+ len = a->nr_pins * sizeof(a->pins[0]);
+ for (i = 0; i <= b->nr_pins - a->nr_pins; i++) {
+ if (a->pins == b->pins + i || a->mux == b->mux + i ||
+ memcmp(a->pins, b->pins + i, len) ||
+ memcmp(a->mux, b->mux + i, len))
+ continue;
+
+ if (a->nr_pins == b->nr_pins)
+ sh_pfc_warn("group %s can be an alias for %s\n",
+ a->name, b->name);
+ else
+ sh_pfc_warn("group %s is a subset of %s\n", a->name,
+ b->name);
+ }
+}
+
static void __init sh_pfc_check_info(const struct sh_pfc_soc_info *info)
{
const struct pinmux_bias_reg *bias_regs = info->bias_regs;
@@ -1000,11 +1029,9 @@ static void __init sh_pfc_check_info(const struct sh_pfc_soc_info *info)
sh_pfc_err("empty group %u\n", i);
continue;
}
- for (j = 0; j < i; j++) {
- if (same_name(group->name, info->groups[j].name))
- sh_pfc_err("group %s: name conflict\n",
- group->name);
- }
+ for (j = 0; j < i; j++)
+ sh_pfc_compare_groups(drvname, group, &info->groups[j]);
+
if (!refcnts[i])
sh_pfc_err("orphan group %s\n", group->name);
else if (refcnts[i] > 1)
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 06/10] pinctrl: renesas: checker: Validate bias configs consistency
2021-12-23 14:56 [PATCH 00/10] pinctrl: renesas: checker: Miscellaneous improvements Geert Uytterhoeven
` (4 preceding siblings ...)
2021-12-23 14:56 ` [PATCH 05/10] pinctrl: renesas: checker: Add pin group sharing checks Geert Uytterhoeven
@ 2021-12-23 14:56 ` Geert Uytterhoeven
2021-12-23 14:56 ` [PATCH 07/10] pinctrl: renesas: checker: Validate drive strength " Geert Uytterhoeven
` (3 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Geert Uytterhoeven @ 2021-12-23 14:56 UTC (permalink / raw)
To: Linus Walleij; +Cc: linux-renesas-soc, linux-gpio, Geert Uytterhoeven
Validate consistency of the pin control tables for pins with pull-up
and/or pull-down capabilities. If a pin has bias register bits
declarations in bias_regs[] or through .pin_to_portcr(), the
corresponding SH_PFC_PIN_CFG_PULL* flags should be set in the pin's
configs, and vice versa, and the .get_bias() and .set_bias() callbacks
should be implemented.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/pinctrl/renesas/core.c | 80 +++++++++++++++++++++++++++++++---
1 file changed, 73 insertions(+), 7 deletions(-)
diff --git a/drivers/pinctrl/renesas/core.c b/drivers/pinctrl/renesas/core.c
index 57a06b5ea17444e2..dce511a22b31de3d 100644
--- a/drivers/pinctrl/renesas/core.c
+++ b/drivers/pinctrl/renesas/core.c
@@ -745,6 +745,7 @@ static int sh_pfc_suspend_init(struct sh_pfc *pfc) { return 0; }
static unsigned int sh_pfc_errors __initdata;
static unsigned int sh_pfc_warnings __initdata;
+static bool sh_pfc_bias_done __initdata;
static struct {
u32 reg;
u32 bits;
@@ -758,6 +759,15 @@ static u32 sh_pfc_num_enums __initdata;
pr_err("%s: " fmt, drvname, ##__VA_ARGS__); \
sh_pfc_errors++; \
} while (0)
+
+#define sh_pfc_err_once(type, fmt, ...) \
+ do { \
+ if (!sh_pfc_ ## type ## _done) { \
+ sh_pfc_ ## type ## _done = true; \
+ sh_pfc_err(fmt, ##__VA_ARGS__); \
+ } \
+ } while (0)
+
#define sh_pfc_warn(fmt, ...) \
do { \
pr_warn("%s: " fmt, drvname, ##__VA_ARGS__); \
@@ -836,21 +846,22 @@ static void __init sh_pfc_check_reg_enums(const char *drvname, u32 reg,
}
}
-static void __init sh_pfc_check_pin(const struct sh_pfc_soc_info *info,
- u32 reg, unsigned int pin)
+static const struct sh_pfc_pin __init *sh_pfc_find_pin(
+ const struct sh_pfc_soc_info *info, u32 reg, unsigned int pin)
{
const char *drvname = info->name;
unsigned int i;
if (pin == SH_PFC_PIN_NONE)
- return;
+ return NULL;
for (i = 0; i < info->nr_pins; i++) {
if (pin == info->pins[i].pin)
- return;
+ return &info->pins[i];
}
sh_pfc_err("reg 0x%x: pin %u not found\n", reg, pin);
+ return NULL;
}
static void __init sh_pfc_check_cfg_reg(const char *drvname,
@@ -902,13 +913,15 @@ static void __init sh_pfc_check_drive_reg(const struct sh_pfc_soc_info *info,
GENMASK(field->offset + field->size - 1,
field->offset));
- sh_pfc_check_pin(info, drive->reg, field->pin);
+ sh_pfc_find_pin(info, drive->reg, field->pin);
}
}
static void __init sh_pfc_check_bias_reg(const struct sh_pfc_soc_info *info,
const struct pinmux_bias_reg *bias)
{
+ const char *drvname = info->name;
+ const struct sh_pfc_pin *pin;
unsigned int i;
u32 bits;
@@ -920,8 +933,32 @@ static void __init sh_pfc_check_bias_reg(const struct sh_pfc_soc_info *info,
sh_pfc_check_reg(info->name, bias->puen, bits);
if (bias->pud)
sh_pfc_check_reg(info->name, bias->pud, bits);
- for (i = 0; i < ARRAY_SIZE(bias->pins); i++)
- sh_pfc_check_pin(info, bias->puen, bias->pins[i]);
+ for (i = 0; i < ARRAY_SIZE(bias->pins); i++) {
+ pin = sh_pfc_find_pin(info, bias->puen, bias->pins[i]);
+ if (!pin)
+ continue;
+
+ if (bias->puen && bias->pud) {
+ /*
+ * Pull-enable and pull-up/down control registers
+ * As some SoCs have pins that support only pull-up
+ * or pull-down, we just check for one of them
+ */
+ if (!(pin->configs & SH_PFC_PIN_CFG_PULL_UP_DOWN))
+ sh_pfc_err("bias_reg 0x%x:%u: pin %s lacks one or more SH_PFC_PIN_CFG_PULL_* flags\n",
+ bias->puen, i, pin->name);
+ } else if (bias->puen) {
+ /* Pull-up control register only */
+ if (!(pin->configs & SH_PFC_PIN_CFG_PULL_UP))
+ sh_pfc_err("bias_reg 0x%x:%u: pin %s lacks SH_PFC_PIN_CFG_PULL_UP flag\n",
+ bias->puen, i, pin->name);
+ } else if (bias->pud) {
+ /* Pull-down control register only */
+ if (!(pin->configs & SH_PFC_PIN_CFG_PULL_DOWN))
+ sh_pfc_err("bias_reg 0x%x:%u: pin %s lacks SH_PFC_PIN_CFG_PULL_DOWN flag\n",
+ bias->pud, i, pin->name);
+ }
+ }
}
static void __init sh_pfc_compare_groups(const char *drvname,
@@ -963,10 +1000,12 @@ static void __init sh_pfc_check_info(const struct sh_pfc_soc_info *info)
pr_info("sh_pfc: Checking %s\n", drvname);
sh_pfc_num_regs = 0;
sh_pfc_num_enums = 0;
+ sh_pfc_bias_done = false;
/* Check pins */
for (i = 0; i < info->nr_pins; i++) {
const struct sh_pfc_pin *pin = &info->pins[i];
+ unsigned int x;
if (!pin->name) {
sh_pfc_err("empty pin %u\n", i);
@@ -988,6 +1027,33 @@ static void __init sh_pfc_check_info(const struct sh_pfc_soc_info *info)
pin->name, pin2->name,
pin->enum_id);
}
+
+ if (pin->configs & SH_PFC_PIN_CFG_PULL_UP_DOWN) {
+ if (!info->ops || !info->ops->get_bias ||
+ !info->ops->set_bias)
+ sh_pfc_err_once(bias, "SH_PFC_PIN_CFG_PULL_* flag set but .[gs]et_bias() not implemented\n");
+
+ if (!bias_regs &&
+ (!info->ops || !info->ops->pin_to_portcr))
+ sh_pfc_err_once(bias, "SH_PFC_PIN_CFG_PULL_UP flag set but no bias_regs defined and .pin_to_portcr() not implemented\n");
+ }
+
+ if ((pin->configs & SH_PFC_PIN_CFG_PULL_UP_DOWN) && bias_regs) {
+ const struct pinmux_bias_reg *bias_reg =
+ rcar_pin_to_bias_reg(info, pin->pin, &x);
+
+ if (!bias_reg ||
+ ((pin->configs & SH_PFC_PIN_CFG_PULL_UP) &&
+ !bias_reg->puen))
+ sh_pfc_err("pin %s: SH_PFC_PIN_CFG_PULL_UP flag set but pin not in bias_regs\n",
+ pin->name);
+
+ if (!bias_reg ||
+ ((pin->configs & SH_PFC_PIN_CFG_PULL_DOWN) &&
+ !bias_reg->pud))
+ sh_pfc_err("pin %s: SH_PFC_PIN_CFG_PULL_DOWN flag set but pin not in bias_regs\n",
+ pin->name);
+ }
}
/* Check groups and functions */
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 07/10] pinctrl: renesas: checker: Validate drive strength configs consistency
2021-12-23 14:56 [PATCH 00/10] pinctrl: renesas: checker: Miscellaneous improvements Geert Uytterhoeven
` (5 preceding siblings ...)
2021-12-23 14:56 ` [PATCH 06/10] pinctrl: renesas: checker: Validate bias configs consistency Geert Uytterhoeven
@ 2021-12-23 14:56 ` Geert Uytterhoeven
2021-12-23 14:56 ` [PATCH 08/10] pinctrl: renesas: checker: Validate I/O voltage " Geert Uytterhoeven
` (2 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Geert Uytterhoeven @ 2021-12-23 14:56 UTC (permalink / raw)
To: Linus Walleij; +Cc: linux-renesas-soc, linux-gpio, Geert Uytterhoeven
Validate consistency of the pin control tables for pins with drive
strength capabilities. If a pin has drive strength register bits
declarations in drive_regs[], the SH_PFC_PIN_CFG_DRIVE_STRENGTH flag
should be set in the pin's configs, and vice versa.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/pinctrl/renesas/core.c | 30 +++++++++++++++++++++++++++++-
1 file changed, 29 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/renesas/core.c b/drivers/pinctrl/renesas/core.c
index dce511a22b31de3d..1789c96ad2aa2c79 100644
--- a/drivers/pinctrl/renesas/core.c
+++ b/drivers/pinctrl/renesas/core.c
@@ -746,6 +746,7 @@ static int sh_pfc_suspend_init(struct sh_pfc *pfc) { return 0; }
static unsigned int sh_pfc_errors __initdata;
static unsigned int sh_pfc_warnings __initdata;
static bool sh_pfc_bias_done __initdata;
+static bool sh_pfc_drive_done __initdata;
static struct {
u32 reg;
u32 bits;
@@ -901,6 +902,8 @@ static void __init sh_pfc_check_cfg_reg(const char *drvname,
static void __init sh_pfc_check_drive_reg(const struct sh_pfc_soc_info *info,
const struct pinmux_drive_reg *drive)
{
+ const char *drvname = info->name;
+ const struct sh_pfc_pin *pin;
unsigned int i;
for (i = 0; i < ARRAY_SIZE(drive->fields); i++) {
@@ -913,7 +916,10 @@ static void __init sh_pfc_check_drive_reg(const struct sh_pfc_soc_info *info,
GENMASK(field->offset + field->size - 1,
field->offset));
- sh_pfc_find_pin(info, drive->reg, field->pin);
+ pin = sh_pfc_find_pin(info, drive->reg, field->pin);
+ if (pin && !(pin->configs & SH_PFC_PIN_CFG_DRIVE_STRENGTH))
+ sh_pfc_err("drive_reg 0x%x: field %u: pin %s lacks SH_PFC_PIN_CFG_DRIVE_STRENGTH flag\n",
+ drive->reg, i, pin->name);
}
}
@@ -992,6 +998,7 @@ static void __init sh_pfc_compare_groups(const char *drvname,
static void __init sh_pfc_check_info(const struct sh_pfc_soc_info *info)
{
+ const struct pinmux_drive_reg *drive_regs = info->drive_regs;
const struct pinmux_bias_reg *bias_regs = info->bias_regs;
const char *drvname = info->name;
unsigned int *refcnts;
@@ -1001,6 +1008,7 @@ static void __init sh_pfc_check_info(const struct sh_pfc_soc_info *info)
sh_pfc_num_regs = 0;
sh_pfc_num_enums = 0;
sh_pfc_bias_done = false;
+ sh_pfc_drive_done = false;
/* Check pins */
for (i = 0; i < info->nr_pins; i++) {
@@ -1054,6 +1062,26 @@ static void __init sh_pfc_check_info(const struct sh_pfc_soc_info *info)
sh_pfc_err("pin %s: SH_PFC_PIN_CFG_PULL_DOWN flag set but pin not in bias_regs\n",
pin->name);
}
+
+ if (pin->configs & SH_PFC_PIN_CFG_DRIVE_STRENGTH) {
+ if (!drive_regs) {
+ sh_pfc_err_once(drive, "SH_PFC_PIN_CFG_DRIVE_STRENGTH flag set but drive_regs missing\n");
+ } else {
+ for (j = 0; drive_regs[j / 8].reg; j++) {
+ if (!drive_regs[j / 8].fields[j % 8].pin &&
+ !drive_regs[j / 8].fields[j % 8].offset &&
+ !drive_regs[j / 8].fields[j % 8].size)
+ continue;
+
+ if (drive_regs[j / 8].fields[j % 8].pin == pin->pin)
+ break;
+ }
+
+ if (!drive_regs[j / 8].reg)
+ sh_pfc_err("pin %s: SH_PFC_PIN_CFG_DRIVE_STRENGTH flag set but not in drive_regs\n",
+ pin->name);
+ }
+ }
}
/* Check groups and functions */
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 08/10] pinctrl: renesas: checker: Validate I/O voltage configs consistency
2021-12-23 14:56 [PATCH 00/10] pinctrl: renesas: checker: Miscellaneous improvements Geert Uytterhoeven
` (6 preceding siblings ...)
2021-12-23 14:56 ` [PATCH 07/10] pinctrl: renesas: checker: Validate drive strength " Geert Uytterhoeven
@ 2021-12-23 14:56 ` Geert Uytterhoeven
2021-12-23 14:56 ` [PATCH 09/10] pinctrl: renesas: checker: Check bias pin conflicts Geert Uytterhoeven
2021-12-23 14:56 ` [PATCH 10/10] pinctrl: renesas: checker: Check drive " Geert Uytterhoeven
9 siblings, 0 replies; 11+ messages in thread
From: Geert Uytterhoeven @ 2021-12-23 14:56 UTC (permalink / raw)
To: Linus Walleij; +Cc: linux-renesas-soc, linux-gpio, Geert Uytterhoeven
Validate consistency of the pin control tables for pins with I/O voltage
capabilities. If a pin has I/O voltage register bits declarations
through .pin_to_pocctrl(), the SH_PFC_PIN_CFG_IO_VOLTAGE flag should be
set in the pin's configs, and vice versa.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/pinctrl/renesas/core.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/pinctrl/renesas/core.c b/drivers/pinctrl/renesas/core.c
index 1789c96ad2aa2c79..ef88359ddf5c0f2a 100644
--- a/drivers/pinctrl/renesas/core.c
+++ b/drivers/pinctrl/renesas/core.c
@@ -747,6 +747,7 @@ static unsigned int sh_pfc_errors __initdata;
static unsigned int sh_pfc_warnings __initdata;
static bool sh_pfc_bias_done __initdata;
static bool sh_pfc_drive_done __initdata;
+static bool sh_pfc_power_done __initdata;
static struct {
u32 reg;
u32 bits;
@@ -1009,6 +1010,7 @@ static void __init sh_pfc_check_info(const struct sh_pfc_soc_info *info)
sh_pfc_num_enums = 0;
sh_pfc_bias_done = false;
sh_pfc_drive_done = false;
+ sh_pfc_power_done = false;
/* Check pins */
for (i = 0; i < info->nr_pins; i++) {
@@ -1082,6 +1084,18 @@ static void __init sh_pfc_check_info(const struct sh_pfc_soc_info *info)
pin->name);
}
}
+
+ if (pin->configs & SH_PFC_PIN_CFG_IO_VOLTAGE) {
+ if (!info->ops || !info->ops->pin_to_pocctrl)
+ sh_pfc_err_once(power, "SH_PFC_PIN_CFG_IO_VOLTAGE flag set but .pin_to_pocctrl() not implemented\n");
+ else if (info->ops->pin_to_pocctrl(pin->pin, &x) < 0)
+ sh_pfc_err("pin %s: SH_PFC_PIN_CFG_IO_VOLTAGE set but invalid pin_to_pocctrl()\n",
+ pin->name);
+ } else if (info->ops && info->ops->pin_to_pocctrl &&
+ info->ops->pin_to_pocctrl(pin->pin, &x) >= 0) {
+ sh_pfc_warn("pin %s: SH_PFC_PIN_CFG_IO_VOLTAGE not set but valid pin_to_pocctrl()\n",
+ pin->name);
+ }
}
/* Check groups and functions */
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 09/10] pinctrl: renesas: checker: Check bias pin conflicts
2021-12-23 14:56 [PATCH 00/10] pinctrl: renesas: checker: Miscellaneous improvements Geert Uytterhoeven
` (7 preceding siblings ...)
2021-12-23 14:56 ` [PATCH 08/10] pinctrl: renesas: checker: Validate I/O voltage " Geert Uytterhoeven
@ 2021-12-23 14:56 ` Geert Uytterhoeven
2021-12-23 14:56 ` [PATCH 10/10] pinctrl: renesas: checker: Check drive " Geert Uytterhoeven
9 siblings, 0 replies; 11+ messages in thread
From: Geert Uytterhoeven @ 2021-12-23 14:56 UTC (permalink / raw)
To: Linus Walleij; +Cc: linux-renesas-soc, linux-gpio, Geert Uytterhoeven
Check that there is only a single entry for each pin with pull-up and/or
pull-down capabilities.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/pinctrl/renesas/core.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/drivers/pinctrl/renesas/core.c b/drivers/pinctrl/renesas/core.c
index ef88359ddf5c0f2a..1e0b21428e83c549 100644
--- a/drivers/pinctrl/renesas/core.c
+++ b/drivers/pinctrl/renesas/core.c
@@ -1161,6 +1161,28 @@ static void __init sh_pfc_check_info(const struct sh_pfc_soc_info *info)
for (i = 0; bias_regs && (bias_regs[i].puen || bias_regs[i].pud); i++)
sh_pfc_check_bias_reg(info, &bias_regs[i]);
+ for (i = 0; bias_regs &&
+ (bias_regs[i / 32].puen || bias_regs[i / 32].pud); i++) {
+ if (bias_regs[i / 32].pins[i % 32] == SH_PFC_PIN_NONE)
+ continue;
+
+ for (j = 0; j < i; j++) {
+ if (bias_regs[i / 32].pins[i % 32] !=
+ bias_regs[j / 32].pins[j % 32])
+ continue;
+
+ if (bias_regs[i / 32].puen && bias_regs[j / 32].puen)
+ sh_pfc_err("bias_reg 0x%x:%u/0x%x:%u: pin conflict\n",
+ bias_regs[i / 32].puen, i % 32,
+ bias_regs[j / 32].puen, j % 32);
+ if (bias_regs[i / 32].pud && bias_regs[j / 32].pud)
+ sh_pfc_err("bias_reg 0x%x:%u/0x%x:%u: pin conflict\n",
+ bias_regs[i / 32].pud, i % 32,
+ bias_regs[j / 32].pud, j % 32);
+ }
+
+ }
+
/* Check ioctrl registers */
for (i = 0; info->ioctrl_regs && info->ioctrl_regs[i].reg; i++)
sh_pfc_check_reg(drvname, info->ioctrl_regs[i].reg, U32_MAX);
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 10/10] pinctrl: renesas: checker: Check drive pin conflicts
2021-12-23 14:56 [PATCH 00/10] pinctrl: renesas: checker: Miscellaneous improvements Geert Uytterhoeven
` (8 preceding siblings ...)
2021-12-23 14:56 ` [PATCH 09/10] pinctrl: renesas: checker: Check bias pin conflicts Geert Uytterhoeven
@ 2021-12-23 14:56 ` Geert Uytterhoeven
9 siblings, 0 replies; 11+ messages in thread
From: Geert Uytterhoeven @ 2021-12-23 14:56 UTC (permalink / raw)
To: Linus Walleij; +Cc: linux-renesas-soc, linux-gpio, Geert Uytterhoeven
Check that there is only a single entry for each pin with drive strength
capabilities.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/pinctrl/renesas/core.c | 22 ++++++++++++++++++++--
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/renesas/core.c b/drivers/pinctrl/renesas/core.c
index 1e0b21428e83c549..c252eb5c9755035f 100644
--- a/drivers/pinctrl/renesas/core.c
+++ b/drivers/pinctrl/renesas/core.c
@@ -1154,8 +1154,26 @@ static void __init sh_pfc_check_info(const struct sh_pfc_soc_info *info)
sh_pfc_check_cfg_reg(drvname, &info->cfg_regs[i]);
/* Check drive strength registers */
- for (i = 0; info->drive_regs && info->drive_regs[i].reg; i++)
- sh_pfc_check_drive_reg(info, &info->drive_regs[i]);
+ for (i = 0; drive_regs && drive_regs[i].reg; i++)
+ sh_pfc_check_drive_reg(info, &drive_regs[i]);
+
+ for (i = 0; drive_regs && drive_regs[i / 8].reg; i++) {
+ if (!drive_regs[i / 8].fields[i % 8].pin &&
+ !drive_regs[i / 8].fields[i % 8].offset &&
+ !drive_regs[i / 8].fields[i % 8].size)
+ continue;
+
+ for (j = 0; j < i; j++) {
+ if (drive_regs[i / 8].fields[i % 8].pin ==
+ drive_regs[j / 8].fields[j % 8].pin &&
+ drive_regs[j / 8].fields[j % 8].offset &&
+ drive_regs[j / 8].fields[j % 8].size) {
+ sh_pfc_err("drive_reg 0x%x:%u/0x%x:%u: pin conflict\n",
+ drive_regs[i / 8].reg, i % 8,
+ drive_regs[j / 8].reg, j % 8);
+ }
+ }
+ }
/* Check bias registers */
for (i = 0; bias_regs && (bias_regs[i].puen || bias_regs[i].pud); i++)
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread