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From: Paul Walmsley <pjw@kernel.org>
To: Jia Wang <wangjia@ultrarisc.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>,
	Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	Paul Walmsley <pjw@kernel.org>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	 Alexandre Ghiti <alex@ghiti.fr>,
	Linus Walleij <linusw@kernel.org>,
	 Bartosz Golaszewski <brgl@kernel.org>,
	 Samuel Holland <samuel.holland@sifive.com>,
	 Paul Walmsley <paul.walmsley@sifive.com>,
	 Palmer Dabbelt <palmer@sifive.com>,
	Conor Dooley <conor@kernel.org>,
	 devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	 linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org
Subject: Re: [PATCH 9/9] riscv: defconfig: enable ARCH_ULTRARISC
Date: Wed, 8 Jul 2026 11:38:44 -0600 (MDT)	[thread overview]
Message-ID: <d23703f7-29c3-c1f9-6f6b-80e155c56746@kernel.org> (raw)
In-Reply-To: <177995553472.929162.16657480414876825285.b4-reply@b4>

On Thu, 28 May 2026, Jia Wang wrote:

> On 2026-05-21 22:57 +0200, Krzysztof Kozlowski wrote:
> > On 15/05/2026 03:18, Jia Wang via B4 Relay wrote:
> > > From: Jia Wang <wangjia@ultrarisc.com>
> > > 
> > > Enable `ARCH_ULTRARISC` in the default RISC-V defconfig.
> > > 
> > > Link: https://lore.kernel.org/lkml/20260427-ultrarisc-pcie-v4-1-98935f6cdfb5@ultrarisc.com/
> > 
> > Drop link, not relevant here.
> >
> 
> Will drop the link, thanks.
>  
> > > 
> > > Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
> > > ---
> > >  arch/riscv/configs/defconfig | 1 +
> > >  1 file changed, 1 insertion(+)
> > > 
> > > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> > > index c2c37327b987..9fdc4d1831ed 100644
> > > --- a/arch/riscv/configs/defconfig
> > > +++ b/arch/riscv/configs/defconfig
> > > @@ -32,6 +32,7 @@ CONFIG_SOC_STARFIVE=y
> > >  CONFIG_ARCH_SUNXI=y
> > >  CONFIG_ARCH_TENSTORRENT=y
> > >  CONFIG_ARCH_THEAD=y
> > > +CONFIG_ARCH_ULTRARISC=y
> > 
> > This patch should be sent with with the patch adding that config option.
> >
> 
> Ack, will include it in the same series as the config option patch.

I've pulled this out, dropped the link, and queued it for v7.2-rc along 
with the arch/riscv/Kconfig patch.


- Paul

  reply	other threads:[~2026-07-08 17:38 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-15  1:17 [PATCH 0/9] riscv: ultrarisc: add DP1000 SoC DT and pinctrl support Jia Wang via B4 Relay
2026-05-15  1:17 ` [PATCH 1/9] dt-bindings: vendor-prefixes: add Rongda Jia Wang via B4 Relay
2026-05-21 20:51   ` Krzysztof Kozlowski
2026-05-26  7:12     ` Jia Wang
2026-05-15  1:17 ` [PATCH 2/9] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible Jia Wang via B4 Relay
2026-05-15 10:06   ` Conor Dooley
2026-05-15  1:17 ` [PATCH 3/9] dt-bindings: riscv: Add UltraRISC DP1000 bindings Jia Wang via B4 Relay
2026-05-15 10:08   ` Conor Dooley
2026-05-18  3:06     ` Jia Wang
2026-05-15  1:18 ` [PATCH 4/9] dt-bindings: pinctrl: Add UltraRISC DP1000 pinctrl bindings Jia Wang via B4 Relay
2026-05-15 10:12   ` Conor Dooley
2026-05-18  6:03     ` Jia Wang
2026-05-21 20:56   ` Krzysztof Kozlowski
2026-05-27  1:34     ` Jia Wang
2026-05-25  9:23   ` Linus Walleij
2026-05-27  1:37     ` Jia Wang
2026-05-15  1:18 ` [PATCH 5/9] riscv: dts: ultrarisc: Add initial device tree for UltraRISC DP1000 Jia Wang via B4 Relay
2026-05-15 10:26   ` Conor Dooley
2026-05-20  2:51     ` Jia Wang
2026-05-21 21:05   ` Krzysztof Kozlowski
2026-05-27  7:04     ` Jia Wang
2026-05-15  1:18 ` [PATCH 6/9] pinctrl: ultrarisc: Add UltraRISC DP1000 pinctrl driver Jia Wang via B4 Relay
2026-05-21 21:09   ` Krzysztof Kozlowski
2026-05-27  7:07     ` Jia Wang
2026-05-25  9:28   ` Linus Walleij
2026-05-25 10:10     ` Conor Dooley
2026-05-28  7:46       ` Jia Wang
2026-05-28  8:55         ` Conor Dooley
2026-05-29  5:43           ` Jia Wang
2026-05-27  7:28     ` Jia Wang
2026-05-15  1:18 ` [PATCH 7/9] riscv: dts: ultrarisc: add Rongda M0 board device tree Jia Wang via B4 Relay
2026-05-15 10:28   ` Conor Dooley
2026-05-20  8:40     ` Jia Wang
2026-05-21 20:59   ` Krzysztof Kozlowski
2026-05-28  8:02     ` Jia Wang
2026-05-15  1:18 ` [PATCH 8/9] riscv: dts: ultrarisc: add Milk-V Titan " Jia Wang via B4 Relay
2026-05-15  1:18 ` [PATCH 9/9] riscv: defconfig: enable ARCH_ULTRARISC Jia Wang via B4 Relay
2026-05-21 20:57   ` Krzysztof Kozlowski
2026-05-28  8:05     ` Jia Wang
2026-07-08 17:38       ` Paul Walmsley [this message]
2026-05-15 10:05 ` [PATCH 0/9] riscv: ultrarisc: add DP1000 SoC DT and pinctrl support Conor Dooley
2026-05-21  9:52   ` Jia Wang
2026-05-21 10:23     ` Conor Dooley
2026-05-22  1:41       ` Jia Wang

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