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([2a10:a5c0:800d:dd00:8fdf:935a:2c85:d703]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-56e63c63eeesm159703e87.88.2025.09.10.22.13.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 10 Sep 2025 22:13:04 -0700 (PDT) Message-ID: Date: Thu, 11 Sep 2025 08:13:03 +0300 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/3] iio: adc: Support ROHM BD79112 ADC/GPIO To: Jonathan Cameron Cc: David Lechner , =?UTF-8?Q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org References: <20250910-bd79112-v4-0-f82f43746a8c@gmail.com> <20250910-bd79112-v4-2-f82f43746a8c@gmail.com> <20250910184619.0303163d@jic23-huawei> Content-Language: en-US, en-AU, en-GB, en-BW From: Matti Vaittinen In-Reply-To: <20250910184619.0303163d@jic23-huawei> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Morning Jonathan, On 10/09/2025 20:46, Jonathan Cameron wrote: > On Wed, 10 Sep 2025 14:24:35 +0300 > Matti Vaittinen wrote: > >> The ROHM BD79112 is an ADC/GPIO with 32 channels. The channel inputs can >> be used as ADC or GPIO. Using the GPIOs as IRQ sources isn't supported. >> >> The ADC is 12-bit, supporting input voltages up to 5.7V, and separate I/O >> voltage supply. Maximum SPI clock rate is 20 MHz (10 MHz with >> daisy-chain configuration) and maximum sampling rate is 1MSPS. >> >> The IC does also support CRC but it is not implemented in the driver. >> >> Signed-off-by: Matti Vaittinen > > Hi Matti, > > A few trivial things that I'll tidy up if nothing else comes up (I might not > bother given how trivial they are!) Thanks again! > Also one question. I couldn't immediately follow why any random register > read is sanity checking if an ADC pin is configured as GPIO. > Ah. Valid question! I see my comment below is partially wrong. >> +/* >> + * Read transaction consists of two 16-bit sequences separated by CSB. >> + * For register read, 'IOSET' bit must be set. For ADC read, IOSET is cleared >> + * and ADDR equals the channel number (0 ... 31). >> + * >> + * First 16-bit sequence, MOSI as below, MISO data ignored: >> + * - SCK: | 1 | 2 | 3 | 4 | 5 .. 8 | 9 .. 16 | >> + * - MOSI:| 0 | 0 | IOSET | RW (1) | ADDR | 8'b0 | >> + * >> + * CSB released and re-acquired between these sequences >> + * >> + * Second 16-bit sequence, MISO as below, MOSI data ignored: >> + * For Register read data is 8 bits: >> + * - SCK: | 1 .. 8 | 9 .. 16 | >> + * - MISO:| 8'b0 | 8-bit data | >> + * >> + * For ADC read data is 12 bits: >> + * - SCK: | 1 .. 4 | 4 .. 16 | >> + * - MISO:| 4'b0 | 12-bit data | This is not 100% true. I overlooked the ADC read "status flag" when adding this comment for the ADC data reading. This should be: * For ADC, read data is 12 bits prepended with a status flag: * - SCK: | 1 | 2 | 3 4 | 4 .. 16 | * - MISO:| 0 | STATUS_FLAG | 2'b0 | 12-bit data | The 'STATUS_FLAG' is set if the input pin is configured as a GPIO. >> + */ >> +static int bd79112_reg_read(void *context, unsigned int reg, unsigned int *val) >> +{ >> + struct bd79112_data *data = context; >> + int ret; >> + >> + if (reg & BD79112_BIT_IO) >> + reg |= BD79112_BIT_RW; >> + >> + data->read_tx[0] = reg; >> + >> + ret = spi_sync(data->spi, &data->read_msg); >> + if (!ret) >> + *val = be16_to_cpu(data->read_rx); >> + >> + if (reg & BD79112_BIT_IO && *val & BD79112_ADC_STATUS_FLAG) >> + dev_err(data->dev, "ADC pin configured as GPIO\n"); > > Why are we checking this in a regmap callback? > Maybe it needs rewording and the point is some missmatch in what we > can read vs the state? > >> + >> + return ret; >> +} > >> + >> +static int bd79112_probe(struct spi_device *spi) >> +{ >> + struct bd79112_data *data; >> + struct iio_dev *iio_dev; >> + struct iio_chan_spec *cs; >> + struct device *dev = &spi->dev; >> + unsigned long gpio_pins, pin; >> + unsigned int i; >> + int ret; >> + >> + iio_dev = devm_iio_device_alloc(dev, sizeof(*data)); >> + if (!iio_dev) >> + return -ENOMEM; >> + >> + data = iio_priv(iio_dev); >> + data->spi = spi; >> + data->dev = dev; >> + data->map = devm_regmap_init(&spi->dev, NULL, data, &bd79112_regmap); > > data->mpa = devm_regmap_init(dev, ... > > >> + if (IS_ERR(data->map)) >> + return dev_err_probe(dev, PTR_ERR(data->map), >> + "Failed to initialize Regmap\n"); >> + >> + ret = devm_regulator_get_enable_read_voltage(dev, "vdd"); >> + if (ret < 0) >> + return dev_err_probe(dev, ret, "Failed to get the Vdd\n"); >> + >> + data->vref_mv = ret / 1000; >> + >> + ret = devm_regulator_get_enable(dev, "iovdd"); >> + if (ret < 0) >> + return dev_err_probe(dev, ret, "Failed to enable I/O voltage\n"); >> + >> + data->read_xfer[0].tx_buf = &data->read_tx[0]; >> + data->read_xfer[0].len = sizeof(data->read_tx); >> + data->read_xfer[0].cs_change = 1; >> + data->read_xfer[1].rx_buf = &data->read_rx; >> + data->read_xfer[1].len = sizeof(data->read_rx); >> + spi_message_init_with_transfers(&data->read_msg, data->read_xfer, 2); >> + >> + data->write_xfer.tx_buf = &data->reg_write_tx[0]; >> + data->write_xfer.len = sizeof(data->reg_write_tx); >> + spi_message_init_with_transfers(&data->write_msg, &data->write_xfer, 1); >> + >> + ret = devm_iio_adc_device_alloc_chaninfo_se(dev, &bd79112_chan_template, >> + BD79112_MAX_NUM_CHANNELS - 1, >> + &cs); >> + >> + /* Register all pins as GPIOs if there are no ADC channels */ >> + if (ret == -ENOENT) >> + goto register_gpios; >> + >> + if (ret < 0) >> + return ret; >> + >> + iio_dev->num_channels = ret; >> + iio_dev->channels = cs; >> + >> + for (i = 0; i < iio_dev->num_channels; i++) { >> + unsigned int ch = cs[i].channel; >> + >> + cs[i].datasheet_name = bd79112_chan_names[ch]; > > Could have done > > cs[i].datasheet_name = bd79112_chan_names[cs[i].channel]; > > and I don't think it makes it harder to read, but doesn't matter enough to respin. I kind of agree. It stays short and allows us to get rid of the brackets. Thanks! I can still re-spin this later this week, assuming you rather not fix the data-format comment while applying :) Thanks for pointing this out! Yours, -- Matti