* [PATCH v2 01/12] arm64: dts: qcom: sc7280: drop clock-cells from LPASS TLMM
2022-09-27 15:34 [PATCH v2 00/12] pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings Krzysztof Kozlowski
@ 2022-09-27 15:34 ` Krzysztof Kozlowski
2022-09-28 7:37 ` Neil Armstrong
2022-09-27 15:34 ` [PATCH v2 02/12] arm64: dts: qcom: sc7280: align LPASS pin configuration with DT schema Krzysztof Kozlowski
` (11 subsequent siblings)
12 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-27 15:34 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Srinivas Kandagatla,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
The LPASS pin-controller is not a clock provider:
qcom/sc7280-herobrine-herobrine-r1.dtb: pinctrl@33c0000: '#clock-cells' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 8d807b7bf66a..8823b75a6f1b 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2432,8 +2432,6 @@ lpass_tlmm: pinctrl@33c0000 {
#gpio-cells = <2>;
gpio-ranges = <&lpass_tlmm 0 0 15>;
- #clock-cells = <1>;
-
lpass_dmic01_clk: dmic01-clk {
pins = "gpio6";
function = "dmic1_clk";
--
2.34.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v2 01/12] arm64: dts: qcom: sc7280: drop clock-cells from LPASS TLMM
2022-09-27 15:34 ` [PATCH v2 01/12] arm64: dts: qcom: sc7280: drop clock-cells from LPASS TLMM Krzysztof Kozlowski
@ 2022-09-28 7:37 ` Neil Armstrong
0 siblings, 0 replies; 26+ messages in thread
From: Neil Armstrong @ 2022-09-28 7:37 UTC (permalink / raw)
To: Krzysztof Kozlowski, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Linus Walleij, Rob Herring, Krzysztof Kozlowski,
Srinivas Kandagatla, linux-arm-msm, linux-gpio, devicetree,
linux-kernel
On 27/09/2022 17:34, Krzysztof Kozlowski wrote:
> The LPASS pin-controller is not a clock provider:
>
> qcom/sc7280-herobrine-herobrine-r1.dtb: pinctrl@33c0000: '#clock-cells' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 8d807b7bf66a..8823b75a6f1b 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -2432,8 +2432,6 @@ lpass_tlmm: pinctrl@33c0000 {
> #gpio-cells = <2>;
> gpio-ranges = <&lpass_tlmm 0 0 15>;
>
> - #clock-cells = <1>;
> -
> lpass_dmic01_clk: dmic01-clk {
> pins = "gpio6";
> function = "dmic1_clk";
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v2 02/12] arm64: dts: qcom: sc7280: align LPASS pin configuration with DT schema
2022-09-27 15:34 [PATCH v2 00/12] pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings Krzysztof Kozlowski
2022-09-27 15:34 ` [PATCH v2 01/12] arm64: dts: qcom: sc7280: drop clock-cells from LPASS TLMM Krzysztof Kozlowski
@ 2022-09-27 15:34 ` Krzysztof Kozlowski
2022-09-28 7:38 ` Neil Armstrong
2022-09-27 15:34 ` [PATCH v2 03/12] arm64: dts: qcom: sm8250: correct LPASS pin pull down Krzysztof Kozlowski
` (10 subsequent siblings)
12 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-27 15:34 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Srinivas Kandagatla,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
DT schema expects LPASS pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 32 ++++++++++++++--------------
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 8823b75a6f1b..28e3fb9992d9 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2432,82 +2432,82 @@ lpass_tlmm: pinctrl@33c0000 {
#gpio-cells = <2>;
gpio-ranges = <&lpass_tlmm 0 0 15>;
- lpass_dmic01_clk: dmic01-clk {
+ lpass_dmic01_clk: dmic01-clk-state {
pins = "gpio6";
function = "dmic1_clk";
};
- lpass_dmic01_clk_sleep: dmic01-clk-sleep {
+ lpass_dmic01_clk_sleep: dmic01-clk-sleep-state {
pins = "gpio6";
function = "dmic1_clk";
};
- lpass_dmic01_data: dmic01-data {
+ lpass_dmic01_data: dmic01-data-state {
pins = "gpio7";
function = "dmic1_data";
};
- lpass_dmic01_data_sleep: dmic01-data-sleep {
+ lpass_dmic01_data_sleep: dmic01-data-sleep-state {
pins = "gpio7";
function = "dmic1_data";
};
- lpass_dmic23_clk: dmic23-clk {
+ lpass_dmic23_clk: dmic23-clk-state {
pins = "gpio8";
function = "dmic2_clk";
};
- lpass_dmic23_clk_sleep: dmic23-clk-sleep {
+ lpass_dmic23_clk_sleep: dmic23-clk-sleep-state {
pins = "gpio8";
function = "dmic2_clk";
};
- lpass_dmic23_data: dmic23-data {
+ lpass_dmic23_data: dmic23-data-state {
pins = "gpio9";
function = "dmic2_data";
};
- lpass_dmic23_data_sleep: dmic23-data-sleep {
+ lpass_dmic23_data_sleep: dmic23-data-sleep-state {
pins = "gpio9";
function = "dmic2_data";
};
- lpass_rx_swr_clk: rx-swr-clk {
+ lpass_rx_swr_clk: rx-swr-clk-state {
pins = "gpio3";
function = "swr_rx_clk";
};
- lpass_rx_swr_clk_sleep: rx-swr-clk-sleep {
+ lpass_rx_swr_clk_sleep: rx-swr-clk-sleep-state {
pins = "gpio3";
function = "swr_rx_clk";
};
- lpass_rx_swr_data: rx-swr-data {
+ lpass_rx_swr_data: rx-swr-data-state {
pins = "gpio4", "gpio5";
function = "swr_rx_data";
};
- lpass_rx_swr_data_sleep: rx-swr-data-sleep {
+ lpass_rx_swr_data_sleep: rx-swr-data-sleep-state {
pins = "gpio4", "gpio5";
function = "swr_rx_data";
};
- lpass_tx_swr_clk: tx-swr-clk {
+ lpass_tx_swr_clk: tx-swr-clk-state {
pins = "gpio0";
function = "swr_tx_clk";
};
- lpass_tx_swr_clk_sleep: tx-swr-clk-sleep {
+ lpass_tx_swr_clk_sleep: tx-swr-clk-sleep-state {
pins = "gpio0";
function = "swr_tx_clk";
};
- lpass_tx_swr_data: tx-swr-data {
+ lpass_tx_swr_data: tx-swr-data-state {
pins = "gpio1", "gpio2", "gpio14";
function = "swr_tx_data";
};
- lpass_tx_swr_data_sleep: tx-swr-data-sleep {
+ lpass_tx_swr_data_sleep: tx-swr-data-sleep-state {
pins = "gpio1", "gpio2", "gpio14";
function = "swr_tx_data";
};
--
2.34.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v2 02/12] arm64: dts: qcom: sc7280: align LPASS pin configuration with DT schema
2022-09-27 15:34 ` [PATCH v2 02/12] arm64: dts: qcom: sc7280: align LPASS pin configuration with DT schema Krzysztof Kozlowski
@ 2022-09-28 7:38 ` Neil Armstrong
0 siblings, 0 replies; 26+ messages in thread
From: Neil Armstrong @ 2022-09-28 7:38 UTC (permalink / raw)
To: Krzysztof Kozlowski, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Linus Walleij, Rob Herring, Krzysztof Kozlowski,
Srinivas Kandagatla, linux-arm-msm, linux-gpio, devicetree,
linux-kernel
On 27/09/2022 17:34, Krzysztof Kozlowski wrote:
> DT schema expects LPASS pin configuration nodes to be named with
> '-state' suffix and their optional children with '-pins' suffix.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 32 ++++++++++++++--------------
> 1 file changed, 16 insertions(+), 16 deletions(-)
>
<snip>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v2 03/12] arm64: dts: qcom: sm8250: correct LPASS pin pull down
2022-09-27 15:34 [PATCH v2 00/12] pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings Krzysztof Kozlowski
2022-09-27 15:34 ` [PATCH v2 01/12] arm64: dts: qcom: sc7280: drop clock-cells from LPASS TLMM Krzysztof Kozlowski
2022-09-27 15:34 ` [PATCH v2 02/12] arm64: dts: qcom: sc7280: align LPASS pin configuration with DT schema Krzysztof Kozlowski
@ 2022-09-27 15:34 ` Krzysztof Kozlowski
2022-09-28 7:38 ` Neil Armstrong
2022-09-27 15:34 ` [PATCH v2 04/12] arm64: dts: qcom: sm8250: align LPASS pin configuration with DT schema Krzysztof Kozlowski
` (9 subsequent siblings)
12 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-27 15:34 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Srinivas Kandagatla,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
The pull-down property is actually bias-pull-down.
Fixes: 3160c1b894d9 ("arm64: dts: qcom: sm8250: add lpass lpi pin controller node")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index a5b62cadb129..8f402b912c62 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2454,7 +2454,7 @@ data {
pins = "gpio7";
function = "dmic1_data";
drive-strength = <2>;
- pull-down;
+ bias-pull-down;
input-enable;
};
};
--
2.34.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v2 03/12] arm64: dts: qcom: sm8250: correct LPASS pin pull down
2022-09-27 15:34 ` [PATCH v2 03/12] arm64: dts: qcom: sm8250: correct LPASS pin pull down Krzysztof Kozlowski
@ 2022-09-28 7:38 ` Neil Armstrong
0 siblings, 0 replies; 26+ messages in thread
From: Neil Armstrong @ 2022-09-28 7:38 UTC (permalink / raw)
To: Krzysztof Kozlowski, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Linus Walleij, Rob Herring, Krzysztof Kozlowski,
Srinivas Kandagatla, linux-arm-msm, linux-gpio, devicetree,
linux-kernel
On 27/09/2022 17:34, Krzysztof Kozlowski wrote:
> The pull-down property is actually bias-pull-down.
>
> Fixes: 3160c1b894d9 ("arm64: dts: qcom: sm8250: add lpass lpi pin controller node")
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index a5b62cadb129..8f402b912c62 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -2454,7 +2454,7 @@ data {
> pins = "gpio7";
> function = "dmic1_data";
> drive-strength = <2>;
> - pull-down;
> + bias-pull-down;
> input-enable;
> };
> };
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v2 04/12] arm64: dts: qcom: sm8250: align LPASS pin configuration with DT schema
2022-09-27 15:34 [PATCH v2 00/12] pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings Krzysztof Kozlowski
` (2 preceding siblings ...)
2022-09-27 15:34 ` [PATCH v2 03/12] arm64: dts: qcom: sm8250: correct LPASS pin pull down Krzysztof Kozlowski
@ 2022-09-27 15:34 ` Krzysztof Kozlowski
2022-09-28 7:39 ` Neil Armstrong
2022-09-27 15:34 ` [PATCH v2 05/12] dt-bindings: pinctrl: qcom,sc8280xp-lpass-lpi: fix gpio pattern Krzysztof Kozlowski
` (8 subsequent siblings)
12 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-27 15:34 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Srinivas Kandagatla,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
DT schema expects LPASS pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 44 ++++++++++++++--------------
1 file changed, 22 insertions(+), 22 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 8f402b912c62..e0416d611b66 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2388,8 +2388,8 @@ lpass_tlmm: pinctrl@33c0000{
<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
clock-names = "core", "audio";
- wsa_swr_active: wsa-swr-active-pins {
- clk {
+ wsa_swr_active: wsa-swr-active-state {
+ clk-pins {
pins = "gpio10";
function = "wsa_swr_clk";
drive-strength = <2>;
@@ -2397,7 +2397,7 @@ clk {
bias-disable;
};
- data {
+ data-pins {
pins = "gpio11";
function = "wsa_swr_data";
drive-strength = <2>;
@@ -2407,8 +2407,8 @@ data {
};
};
- wsa_swr_sleep: wsa-swr-sleep-pins {
- clk {
+ wsa_swr_sleep: wsa-swr-sleep-state {
+ clk-pins {
pins = "gpio10";
function = "wsa_swr_clk";
drive-strength = <2>;
@@ -2416,7 +2416,7 @@ clk {
bias-pull-down;
};
- data {
+ data-pins {
pins = "gpio11";
function = "wsa_swr_data";
drive-strength = <2>;
@@ -2426,14 +2426,14 @@ data {
};
};
- dmic01_active: dmic01-active-pins {
- clk {
+ dmic01_active: dmic01-active-state {
+ clk-pins {
pins = "gpio6";
function = "dmic1_clk";
drive-strength = <8>;
output-high;
};
- data {
+ data-pins {
pins = "gpio7";
function = "dmic1_data";
drive-strength = <8>;
@@ -2441,8 +2441,8 @@ data {
};
};
- dmic01_sleep: dmic01-sleep-pins {
- clk {
+ dmic01_sleep: dmic01-sleep-state {
+ clk-pins {
pins = "gpio6";
function = "dmic1_clk";
drive-strength = <2>;
@@ -2450,7 +2450,7 @@ clk {
output-low;
};
- data {
+ data-pins {
pins = "gpio7";
function = "dmic1_data";
drive-strength = <2>;
@@ -2459,8 +2459,8 @@ data {
};
};
- rx_swr_active: rx_swr-active-pins {
- clk {
+ rx_swr_active: rx-swr-active-state {
+ clk-pins {
pins = "gpio3";
function = "swr_rx_clk";
drive-strength = <2>;
@@ -2468,7 +2468,7 @@ clk {
bias-disable;
};
- data {
+ data-pins {
pins = "gpio4", "gpio5";
function = "swr_rx_data";
drive-strength = <2>;
@@ -2477,8 +2477,8 @@ data {
};
};
- tx_swr_active: tx_swr-active-pins {
- clk {
+ tx_swr_active: tx-swr-active-state {
+ clk-pins {
pins = "gpio0";
function = "swr_tx_clk";
drive-strength = <2>;
@@ -2486,7 +2486,7 @@ clk {
bias-disable;
};
- data {
+ data-pins {
pins = "gpio1", "gpio2";
function = "swr_tx_data";
drive-strength = <2>;
@@ -2495,8 +2495,8 @@ data {
};
};
- tx_swr_sleep: tx_swr-sleep-pins {
- clk {
+ tx_swr_sleep: tx-swr-sleep-state {
+ clk-pins {
pins = "gpio0";
function = "swr_tx_clk";
drive-strength = <2>;
@@ -2504,7 +2504,7 @@ clk {
bias-pull-down;
};
- data1 {
+ data1-pins {
pins = "gpio1";
function = "swr_tx_data";
drive-strength = <2>;
@@ -2512,7 +2512,7 @@ data1 {
bias-bus-hold;
};
- data2 {
+ data2-pins {
pins = "gpio2";
function = "swr_tx_data";
drive-strength = <2>;
--
2.34.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v2 04/12] arm64: dts: qcom: sm8250: align LPASS pin configuration with DT schema
2022-09-27 15:34 ` [PATCH v2 04/12] arm64: dts: qcom: sm8250: align LPASS pin configuration with DT schema Krzysztof Kozlowski
@ 2022-09-28 7:39 ` Neil Armstrong
0 siblings, 0 replies; 26+ messages in thread
From: Neil Armstrong @ 2022-09-28 7:39 UTC (permalink / raw)
To: Krzysztof Kozlowski, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Linus Walleij, Rob Herring, Krzysztof Kozlowski,
Srinivas Kandagatla, linux-arm-msm, linux-gpio, devicetree,
linux-kernel
On 27/09/2022 17:34, Krzysztof Kozlowski wrote:
> DT schema expects LPASS pin configuration nodes to be named with
> '-state' suffix and their optional children with '-pins' suffix.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 44 ++++++++++++++--------------
> 1 file changed, 22 insertions(+), 22 deletions(-)
>
<snip>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v2 05/12] dt-bindings: pinctrl: qcom,sc8280xp-lpass-lpi: fix gpio pattern
2022-09-27 15:34 [PATCH v2 00/12] pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings Krzysztof Kozlowski
` (3 preceding siblings ...)
2022-09-27 15:34 ` [PATCH v2 04/12] arm64: dts: qcom: sm8250: align LPASS pin configuration with DT schema Krzysztof Kozlowski
@ 2022-09-27 15:34 ` Krzysztof Kozlowski
2022-10-17 20:07 ` (subset) " Krzysztof Kozlowski
2022-09-27 15:34 ` [PATCH v2 06/12] dt-bindings: pinctrl: qcom,sm8450-lpass-lpi: " Krzysztof Kozlowski
` (7 subsequent siblings)
12 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-27 15:34 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Srinivas Kandagatla,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
Cc: Krzysztof Kozlowski, Rob Herring
Fix double ']' in GPIO pattern to properly match "pins" property.
Otherwise schema for pins state fails.
Fixes: 958bb025f5b3 ("dt-bindings: pinctrl: qcom: Add sc8280xp lpass lpi pinctrl bindings")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
---
.../bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml
index 1f468303bb08..fb3ad6c0d80e 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml
@@ -58,7 +58,7 @@ patternProperties:
List of gpio pins affected by the properties specified in this
subnode.
items:
- pattern: "^gpio([0-1]|1[0-8]])$"
+ pattern: "^gpio([0-1]|1[0-8])$"
function:
enum: [ swr_tx_clk, swr_tx_data, swr_rx_clk, swr_rx_data,
--
2.34.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: (subset) [PATCH v2 05/12] dt-bindings: pinctrl: qcom,sc8280xp-lpass-lpi: fix gpio pattern
2022-09-27 15:34 ` [PATCH v2 05/12] dt-bindings: pinctrl: qcom,sc8280xp-lpass-lpi: fix gpio pattern Krzysztof Kozlowski
@ 2022-10-17 20:07 ` Krzysztof Kozlowski
0 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-17 20:07 UTC (permalink / raw)
To: Andy Gross, Rob Herring, linux-gpio, Krzysztof Kozlowski,
Bjorn Andersson, Linus Walleij, linux-kernel, Konrad Dybcio,
Srinivas Kandagatla, linux-arm-msm, devicetree,
Krzysztof Kozlowski
Cc: Rob Herring
On Tue, 27 Sep 2022 17:34:22 +0200, Krzysztof Kozlowski wrote:
> Fix double ']' in GPIO pattern to properly match "pins" property.
> Otherwise schema for pins state fails.
>
>
Applied, thanks!
[05/12] dt-bindings: pinctrl: qcom,sc8280xp-lpass-lpi: fix gpio pattern
https://git.kernel.org/krzk/linux-dt/c/793b96bf484d9c8c05266254721ce96534d79800
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v2 06/12] dt-bindings: pinctrl: qcom,sm8450-lpass-lpi: fix gpio pattern
2022-09-27 15:34 [PATCH v2 00/12] pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings Krzysztof Kozlowski
` (4 preceding siblings ...)
2022-09-27 15:34 ` [PATCH v2 05/12] dt-bindings: pinctrl: qcom,sc8280xp-lpass-lpi: fix gpio pattern Krzysztof Kozlowski
@ 2022-09-27 15:34 ` Krzysztof Kozlowski
2022-10-17 20:07 ` (subset) " Krzysztof Kozlowski
2022-09-27 15:34 ` [PATCH v2 07/12] dt-bindings: pinctrl: qcom,sc7280-lpass-lpi: fix matching pin config Krzysztof Kozlowski
` (6 subsequent siblings)
12 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-27 15:34 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Srinivas Kandagatla,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
Cc: Krzysztof Kozlowski, Rob Herring
Fix double ']' in GPIO pattern to properly match "pins" property.
Otherwise schema for pins state fails.
Fixes: 4faa4e73011d ("dt-bindings: pinctrl: qcom: Add sm8450 lpass lpi pinctrl bindings")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
---
.../bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
index 3694795ec793..c17cdff6174f 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
@@ -58,7 +58,7 @@ patternProperties:
List of gpio pins affected by the properties specified in this
subnode.
items:
- pattern: "^gpio([0-9]|[1-2][0-9]])$"
+ pattern: "^gpio([0-9]|[1-2][0-9])$"
function:
enum: [ swr_tx_clk, swr_tx_data, swr_rx_clk, swr_rx_data,
--
2.34.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: (subset) [PATCH v2 06/12] dt-bindings: pinctrl: qcom,sm8450-lpass-lpi: fix gpio pattern
2022-09-27 15:34 ` [PATCH v2 06/12] dt-bindings: pinctrl: qcom,sm8450-lpass-lpi: " Krzysztof Kozlowski
@ 2022-10-17 20:07 ` Krzysztof Kozlowski
0 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-17 20:07 UTC (permalink / raw)
To: Andy Gross, Rob Herring, linux-gpio, Krzysztof Kozlowski,
Linus Walleij, Bjorn Andersson, linux-kernel, Konrad Dybcio,
Srinivas Kandagatla, linux-arm-msm, devicetree,
Krzysztof Kozlowski
Cc: Rob Herring
On Tue, 27 Sep 2022 17:34:23 +0200, Krzysztof Kozlowski wrote:
> Fix double ']' in GPIO pattern to properly match "pins" property.
> Otherwise schema for pins state fails.
>
>
Applied, thanks!
[06/12] dt-bindings: pinctrl: qcom,sm8450-lpass-lpi: fix gpio pattern
https://git.kernel.org/krzk/linux-dt/c/2f1aad93a1d4a86bb1249f7f94f4e696cde20232
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v2 07/12] dt-bindings: pinctrl: qcom,sc7280-lpass-lpi: fix matching pin config
2022-09-27 15:34 [PATCH v2 00/12] pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings Krzysztof Kozlowski
` (5 preceding siblings ...)
2022-09-27 15:34 ` [PATCH v2 06/12] dt-bindings: pinctrl: qcom,sm8450-lpass-lpi: " Krzysztof Kozlowski
@ 2022-09-27 15:34 ` Krzysztof Kozlowski
2022-10-17 20:07 ` (subset) " Krzysztof Kozlowski
2022-09-27 15:34 ` [PATCH v2 08/12] dt-bindings: pinctrl: qcom,sc8280xp-lpass-lpi: " Krzysztof Kozlowski
` (5 subsequent siblings)
12 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-27 15:34 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Srinivas Kandagatla,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
Cc: Krzysztof Kozlowski, Rob Herring
The LPASS pin controller follows generic pin-controller bindings, so
just like TLMM, should have subnodes with '-state' and '-pins'.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../qcom,sc7280-lpass-lpi-pinctrl.yaml | 29 +++++++++++++++++--
1 file changed, 27 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
index 624e14f00790..a8a48b684692 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
@@ -37,9 +37,17 @@ properties:
gpio-ranges:
maxItems: 1
-#PIN CONFIGURATION NODES
patternProperties:
- '-pins$':
+ "-state$":
+ oneOf:
+ - $ref: "#/$defs/qcom-sc7280-lpass-state"
+ - patternProperties:
+ "-pins$":
+ $ref: "#/$defs/qcom-sc7280-lpass-state"
+ additionalProperties: false
+
+$defs:
+ qcom-sc7280-lpass-state:
type: object
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
@@ -116,4 +124,21 @@ examples:
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&lpass_tlmm 0 0 15>;
+
+ dmic01-state {
+ dmic01-clk-pins {
+ pins = "gpio6";
+ function = "dmic1_clk";
+ };
+
+ dmic01-clk-sleep-pins {
+ pins = "gpio6";
+ function = "dmic1_clk";
+ };
+ };
+
+ tx-swr-data-sleep-state {
+ pins = "gpio1", "gpio2", "gpio14";
+ function = "swr_tx_data";
+ };
};
--
2.34.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: (subset) [PATCH v2 07/12] dt-bindings: pinctrl: qcom,sc7280-lpass-lpi: fix matching pin config
2022-09-27 15:34 ` [PATCH v2 07/12] dt-bindings: pinctrl: qcom,sc7280-lpass-lpi: fix matching pin config Krzysztof Kozlowski
@ 2022-10-17 20:07 ` Krzysztof Kozlowski
0 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-17 20:07 UTC (permalink / raw)
To: Andy Gross, Rob Herring, linux-gpio, Krzysztof Kozlowski,
Bjorn Andersson, Linus Walleij, linux-kernel, Konrad Dybcio,
Srinivas Kandagatla, linux-arm-msm, devicetree,
Krzysztof Kozlowski
Cc: Rob Herring
On Tue, 27 Sep 2022 17:34:24 +0200, Krzysztof Kozlowski wrote:
> The LPASS pin controller follows generic pin-controller bindings, so
> just like TLMM, should have subnodes with '-state' and '-pins'.
>
>
Applied, thanks!
[07/12] dt-bindings: pinctrl: qcom,sc7280-lpass-lpi: fix matching pin config
https://git.kernel.org/krzk/linux-dt/c/cb70c0d8b50a4051743fb42d2fc730f268864361
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v2 08/12] dt-bindings: pinctrl: qcom,sc8280xp-lpass-lpi: fix matching pin config
2022-09-27 15:34 [PATCH v2 00/12] pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings Krzysztof Kozlowski
` (6 preceding siblings ...)
2022-09-27 15:34 ` [PATCH v2 07/12] dt-bindings: pinctrl: qcom,sc7280-lpass-lpi: fix matching pin config Krzysztof Kozlowski
@ 2022-09-27 15:34 ` Krzysztof Kozlowski
2022-10-17 20:07 ` (subset) " Krzysztof Kozlowski
2022-09-27 15:34 ` [PATCH v2 09/12] dt-bindings: pinctrl: qcom,sm8250-lpass-lpi: " Krzysztof Kozlowski
` (4 subsequent siblings)
12 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-27 15:34 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Srinivas Kandagatla,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
Cc: Krzysztof Kozlowski, Rob Herring
The LPASS pin controller follows generic pin-controller bindings, so
just like TLMM, should have subnodes with '-state' and '-pins'.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../qcom,sc8280xp-lpass-lpi-pinctrl.yaml | 29 +++++++++++++++++--
1 file changed, 27 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml
index fb3ad6c0d80e..edf38c774514 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml
@@ -43,9 +43,17 @@ properties:
gpio-ranges:
maxItems: 1
-#PIN CONFIGURATION NODES
patternProperties:
- '-pins$':
+ "-state$":
+ oneOf:
+ - $ref: "#/$defs/qcom-sc8280xp-lpass-state"
+ - patternProperties:
+ "-pins$":
+ $ref: "#/$defs/qcom-sc8280xp-lpass-state"
+ additionalProperties: false
+
+$defs:
+ qcom-sc8280xp-lpass-state:
type: object
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
@@ -130,4 +138,21 @@ examples:
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&lpi_tlmm 0 0 18>;
+
+ dmic01-state {
+ dmic01-clk-pins {
+ pins = "gpio16";
+ function = "dmic1_clk";
+ };
+
+ dmic01-clk-sleep-pins {
+ pins = "gpio16";
+ function = "dmic1_clk";
+ };
+ };
+
+ tx-swr-data-sleep-state {
+ pins = "gpio0", "gpio1";
+ function = "swr_tx_data";
+ };
};
--
2.34.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: (subset) [PATCH v2 08/12] dt-bindings: pinctrl: qcom,sc8280xp-lpass-lpi: fix matching pin config
2022-09-27 15:34 ` [PATCH v2 08/12] dt-bindings: pinctrl: qcom,sc8280xp-lpass-lpi: " Krzysztof Kozlowski
@ 2022-10-17 20:07 ` Krzysztof Kozlowski
0 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-17 20:07 UTC (permalink / raw)
To: Andy Gross, Rob Herring, linux-gpio, Krzysztof Kozlowski,
Bjorn Andersson, Linus Walleij, linux-kernel, Konrad Dybcio,
Srinivas Kandagatla, linux-arm-msm, devicetree,
Krzysztof Kozlowski
Cc: Rob Herring
On Tue, 27 Sep 2022 17:34:25 +0200, Krzysztof Kozlowski wrote:
> The LPASS pin controller follows generic pin-controller bindings, so
> just like TLMM, should have subnodes with '-state' and '-pins'.
>
>
Applied, thanks!
[08/12] dt-bindings: pinctrl: qcom,sc8280xp-lpass-lpi: fix matching pin config
https://git.kernel.org/krzk/linux-dt/c/b47a6c8b771c62140b619a288acdd5ee46e29272
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v2 09/12] dt-bindings: pinctrl: qcom,sm8250-lpass-lpi: fix matching pin config
2022-09-27 15:34 [PATCH v2 00/12] pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings Krzysztof Kozlowski
` (7 preceding siblings ...)
2022-09-27 15:34 ` [PATCH v2 08/12] dt-bindings: pinctrl: qcom,sc8280xp-lpass-lpi: " Krzysztof Kozlowski
@ 2022-09-27 15:34 ` Krzysztof Kozlowski
2022-10-17 20:07 ` (subset) " Krzysztof Kozlowski
2022-09-27 15:34 ` [PATCH v2 10/12] dt-bindings: pinctrl: qcom,sm8450-lpass-lpi: " Krzysztof Kozlowski
` (3 subsequent siblings)
12 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-27 15:34 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Srinivas Kandagatla,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
Cc: Krzysztof Kozlowski, Rob Herring
The LPASS pin controller follows generic pin-controller bindings, so
just like TLMM, should have subnodes with '-state' and '-pins'.
qcom/qrb5165-rb5.dtb: pinctrl@33c0000: wsa-swr-active-pins: 'pins' is a required property
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../qcom,sm8250-lpass-lpi-pinctrl.yaml | 36 +++++++++++++++++--
1 file changed, 34 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml
index 06efb1382876..78da5d2bb353 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml
@@ -42,9 +42,17 @@ properties:
gpio-ranges:
maxItems: 1
-#PIN CONFIGURATION NODES
patternProperties:
- '-pins$':
+ "-state$":
+ oneOf:
+ - $ref: "#/$defs/qcom-sm8250-lpass-state"
+ - patternProperties:
+ "-pins$":
+ $ref: "#/$defs/qcom-sm8250-lpass-state"
+ additionalProperties: false
+
+$defs:
+ qcom-sm8250-lpass-state:
type: object
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
@@ -130,4 +138,28 @@ examples:
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&lpi_tlmm 0 0 14>;
+
+ wsa-swr-active-state {
+ clk-pins {
+ pins = "gpio10";
+ function = "wsa_swr_clk";
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ data-pins {
+ pins = "gpio11";
+ function = "wsa_swr_data";
+ drive-strength = <2>;
+ slew-rate = <1>;
+ };
+ };
+
+ tx-swr-sleep-clk-state {
+ pins = "gpio0";
+ function = "swr_tx_clk";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
};
--
2.34.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: (subset) [PATCH v2 09/12] dt-bindings: pinctrl: qcom,sm8250-lpass-lpi: fix matching pin config
2022-09-27 15:34 ` [PATCH v2 09/12] dt-bindings: pinctrl: qcom,sm8250-lpass-lpi: " Krzysztof Kozlowski
@ 2022-10-17 20:07 ` Krzysztof Kozlowski
0 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-17 20:07 UTC (permalink / raw)
To: Andy Gross, Rob Herring, linux-gpio, Krzysztof Kozlowski,
Linus Walleij, Bjorn Andersson, linux-kernel, Konrad Dybcio,
Srinivas Kandagatla, linux-arm-msm, devicetree,
Krzysztof Kozlowski
Cc: Rob Herring
On Tue, 27 Sep 2022 17:34:26 +0200, Krzysztof Kozlowski wrote:
> The LPASS pin controller follows generic pin-controller bindings, so
> just like TLMM, should have subnodes with '-state' and '-pins'.
>
> qcom/qrb5165-rb5.dtb: pinctrl@33c0000: wsa-swr-active-pins: 'pins' is a required property
>
>
Applied, thanks!
[09/12] dt-bindings: pinctrl: qcom,sm8250-lpass-lpi: fix matching pin config
https://git.kernel.org/krzk/linux-dt/c/351123e62b793e92f6348dd27a03cc035c5a3b6d
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v2 10/12] dt-bindings: pinctrl: qcom,sm8450-lpass-lpi: fix matching pin config
2022-09-27 15:34 [PATCH v2 00/12] pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings Krzysztof Kozlowski
` (8 preceding siblings ...)
2022-09-27 15:34 ` [PATCH v2 09/12] dt-bindings: pinctrl: qcom,sm8250-lpass-lpi: " Krzysztof Kozlowski
@ 2022-09-27 15:34 ` Krzysztof Kozlowski
2022-10-17 20:07 ` (subset) " Krzysztof Kozlowski
2022-09-27 15:34 ` [PATCH v2 11/12] dt-bindings: pinctrl: qcom,sc7280-lpass-lpi: add bias-bus-hold Krzysztof Kozlowski
` (2 subsequent siblings)
12 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-27 15:34 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Srinivas Kandagatla,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
Cc: Krzysztof Kozlowski, Rob Herring
The LPASS pin controller follows generic pin-controller bindings, so
just like TLMM, should have subnodes with '-state' and '-pins'.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../qcom,sm8450-lpass-lpi-pinctrl.yaml | 36 +++++++++++++++++--
1 file changed, 34 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
index c17cdff6174f..c81fd74cde1a 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
@@ -43,9 +43,17 @@ properties:
gpio-ranges:
maxItems: 1
-#PIN CONFIGURATION NODES
patternProperties:
- '-pins$':
+ "-state$":
+ oneOf:
+ - $ref: "#/$defs/qcom-sm8450-lpass-state"
+ - patternProperties:
+ "-pins$":
+ $ref: "#/$defs/qcom-sm8450-lpass-state"
+ additionalProperties: false
+
+$defs:
+ qcom-sm8450-lpass-state:
type: object
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
@@ -132,4 +140,28 @@ examples:
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&lpi_tlmm 0 0 23>;
+
+ wsa-swr-active-state {
+ clk-pins {
+ pins = "gpio10";
+ function = "wsa_swr_clk";
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ data-pins {
+ pins = "gpio11";
+ function = "wsa_swr_data";
+ drive-strength = <2>;
+ slew-rate = <1>;
+ };
+ };
+
+ tx-swr-sleep-clk-state {
+ pins = "gpio0";
+ function = "swr_tx_clk";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
};
--
2.34.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: (subset) [PATCH v2 10/12] dt-bindings: pinctrl: qcom,sm8450-lpass-lpi: fix matching pin config
2022-09-27 15:34 ` [PATCH v2 10/12] dt-bindings: pinctrl: qcom,sm8450-lpass-lpi: " Krzysztof Kozlowski
@ 2022-10-17 20:07 ` Krzysztof Kozlowski
0 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-17 20:07 UTC (permalink / raw)
To: Rob Herring, Andy Gross, linux-gpio, Krzysztof Kozlowski,
Linus Walleij, Bjorn Andersson, linux-kernel, Konrad Dybcio,
Srinivas Kandagatla, linux-arm-msm, devicetree,
Krzysztof Kozlowski
Cc: Rob Herring
On Tue, 27 Sep 2022 17:34:27 +0200, Krzysztof Kozlowski wrote:
> The LPASS pin controller follows generic pin-controller bindings, so
> just like TLMM, should have subnodes with '-state' and '-pins'.
>
>
Applied, thanks!
[10/12] dt-bindings: pinctrl: qcom,sm8450-lpass-lpi: fix matching pin config
https://git.kernel.org/krzk/linux-dt/c/a849cbd18aa2da5db84502111742431dcd57555b
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v2 11/12] dt-bindings: pinctrl: qcom,sc7280-lpass-lpi: add bias-bus-hold
2022-09-27 15:34 [PATCH v2 00/12] pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings Krzysztof Kozlowski
` (9 preceding siblings ...)
2022-09-27 15:34 ` [PATCH v2 10/12] dt-bindings: pinctrl: qcom,sm8450-lpass-lpi: " Krzysztof Kozlowski
@ 2022-09-27 15:34 ` Krzysztof Kozlowski
2022-10-17 20:07 ` (subset) " Krzysztof Kozlowski
2022-09-27 15:34 ` [PATCH v2 12/12] dt-bindings: pinctrl: qcom,sm8250-lpass-lpi: add bias-bus-hold and input-enable Krzysztof Kozlowski
2022-11-07 3:12 ` (subset) [PATCH v2 00/12] pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings Bjorn Andersson
12 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-27 15:34 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Srinivas Kandagatla,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
Cc: Krzysztof Kozlowski, Rob Herring
The existing SC7280 LPASS pin controller nodes use bias-bus-hold, so
allow it. Squash also blank lines for readability.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
---
.../bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
index a8a48b684692..bd54c92287d6 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
@@ -91,13 +91,10 @@ $defs:
3: Reserved (No adjustments)
bias-pull-down: true
-
bias-pull-up: true
-
+ bias-bus-hold: true
bias-disable: true
-
output-high: true
-
output-low: true
required:
--
2.34.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: (subset) [PATCH v2 11/12] dt-bindings: pinctrl: qcom,sc7280-lpass-lpi: add bias-bus-hold
2022-09-27 15:34 ` [PATCH v2 11/12] dt-bindings: pinctrl: qcom,sc7280-lpass-lpi: add bias-bus-hold Krzysztof Kozlowski
@ 2022-10-17 20:07 ` Krzysztof Kozlowski
0 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-17 20:07 UTC (permalink / raw)
To: Andy Gross, Rob Herring, linux-gpio, Krzysztof Kozlowski,
Bjorn Andersson, Linus Walleij, linux-kernel, Konrad Dybcio,
Srinivas Kandagatla, linux-arm-msm, devicetree,
Krzysztof Kozlowski
Cc: Rob Herring
On Tue, 27 Sep 2022 17:34:28 +0200, Krzysztof Kozlowski wrote:
> The existing SC7280 LPASS pin controller nodes use bias-bus-hold, so
> allow it. Squash also blank lines for readability.
>
>
Applied, thanks!
[11/12] dt-bindings: pinctrl: qcom,sc7280-lpass-lpi: add bias-bus-hold
https://git.kernel.org/krzk/linux-dt/c/13e4319b57fdecf7144239d9e631960d873b7675
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v2 12/12] dt-bindings: pinctrl: qcom,sm8250-lpass-lpi: add bias-bus-hold and input-enable
2022-09-27 15:34 [PATCH v2 00/12] pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings Krzysztof Kozlowski
` (10 preceding siblings ...)
2022-09-27 15:34 ` [PATCH v2 11/12] dt-bindings: pinctrl: qcom,sc7280-lpass-lpi: add bias-bus-hold Krzysztof Kozlowski
@ 2022-09-27 15:34 ` Krzysztof Kozlowski
2022-10-17 20:07 ` (subset) " Krzysztof Kozlowski
2022-11-07 3:12 ` (subset) [PATCH v2 00/12] pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings Bjorn Andersson
12 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-27 15:34 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Srinivas Kandagatla,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
Cc: Krzysztof Kozlowski, Rob Herring
The existing SC7280 LPASS pin controller nodes use bias-bus-hold and
input-enable, so allow them. Squash also blank lines for readability.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
---
.../bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml
index 78da5d2bb353..290ba2375e92 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml
@@ -96,13 +96,11 @@ $defs:
3: Reserved (No adjustments)
bias-pull-down: true
-
bias-pull-up: true
-
+ bias-bus-hold: true
bias-disable: true
-
+ input-enable: true
output-high: true
-
output-low: true
required:
--
2.34.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: (subset) [PATCH v2 12/12] dt-bindings: pinctrl: qcom,sm8250-lpass-lpi: add bias-bus-hold and input-enable
2022-09-27 15:34 ` [PATCH v2 12/12] dt-bindings: pinctrl: qcom,sm8250-lpass-lpi: add bias-bus-hold and input-enable Krzysztof Kozlowski
@ 2022-10-17 20:07 ` Krzysztof Kozlowski
0 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-17 20:07 UTC (permalink / raw)
To: Rob Herring, Andy Gross, linux-gpio, Krzysztof Kozlowski,
Bjorn Andersson, Linus Walleij, linux-kernel, Konrad Dybcio,
Srinivas Kandagatla, linux-arm-msm, devicetree,
Krzysztof Kozlowski
Cc: Rob Herring
On Tue, 27 Sep 2022 17:34:29 +0200, Krzysztof Kozlowski wrote:
> The existing SC7280 LPASS pin controller nodes use bias-bus-hold and
> input-enable, so allow them. Squash also blank lines for readability.
>
>
Applied, thanks!
[12/12] dt-bindings: pinctrl: qcom,sm8250-lpass-lpi: add bias-bus-hold and input-enable
https://git.kernel.org/krzk/linux-dt/c/a76a13c89a59e9310c6dafb1eb7f43bf04ea001f
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: (subset) [PATCH v2 00/12] pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings
2022-09-27 15:34 [PATCH v2 00/12] pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings Krzysztof Kozlowski
` (11 preceding siblings ...)
2022-09-27 15:34 ` [PATCH v2 12/12] dt-bindings: pinctrl: qcom,sm8250-lpass-lpi: add bias-bus-hold and input-enable Krzysztof Kozlowski
@ 2022-11-07 3:12 ` Bjorn Andersson
12 siblings, 0 replies; 26+ messages in thread
From: Bjorn Andersson @ 2022-11-07 3:12 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, devicetree, Rob Herring, linux-arm-msm,
linux-gpio, konrad.dybcio, Krzysztof Kozlowski, linux-kernel,
linus.walleij, srinivas.kandagatla, Andy Gross
On Tue, 27 Sep 2022 17:34:17 +0200, Krzysztof Kozlowski wrote:
> Changes since v1
> ================
> 1. Reorder patches - DTS first.
> 2. Correct commit msg in two binding patches, as suggested by Rob.
> 3. Add tags.
>
> Overview
> ========
> This is the *second*, independent patchset around Qualcomm pinctrl in recent days:
> 1. First round of TLMM fixes: merged
> 2. LPASS fixes: *this patchset*
> 3. ARMv7 TLMM fixes: https://lore.kernel.org/all/20220926074415.53100-1-krzysztof.kozlowski@linaro.org/
> 4. ARMv8 remaining TLMM fixes: https://lore.kernel.org/linux-devicetree/20220925110608.145728-1-krzysztof.kozlowski@linaro.org/T/#t
>
> [...]
Applied, thanks!
[01/12] arm64: dts: qcom: sc7280: drop clock-cells from LPASS TLMM
commit: 67cb6e988f8937105560c782bf04520c3d0db841
[02/12] arm64: dts: qcom: sc7280: align LPASS pin configuration with DT schema
commit: 886a50bd031aae7b6880030a4076a146d0429492
[03/12] arm64: dts: qcom: sm8250: correct LPASS pin pull down
commit: 195a0a11d66d6c696cbcf398d6bc3f3a3a462f7c
[04/12] arm64: dts: qcom: sm8250: align LPASS pin configuration with DT schema
commit: 031f5436c9b7209446eb90fe512d1e379ace0e1b
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 26+ messages in thread