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([2600:8803:e7e4:1d00:52e:cda3:16cc:72bb]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-31d63f159fdsm2922413fac.14.2025.09.05.06.18.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 05 Sep 2025 06:18:38 -0700 (PDT) Message-ID: Date: Fri, 5 Sep 2025 08:18:37 -0500 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/3] iio: adc: Support ROHM BD79112 ADC/GPIO To: Matti Vaittinen , Andy Shevchenko Cc: Matti Vaittinen , Jonathan Cameron , =?UTF-8?Q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Marcelo Schmitt , Javier Carrasco , Tobias Sperling , Antoniu Miclaus , Trevor Gamblin , Esteban Blanc , Herve Codina , Ramona Alexandra Nechita , Eason Yang , Pop Ioan Daniel , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org References: <796291b5-f61a-4d68-9cbb-ae099dbb93d8@gmail.com> From: David Lechner Content-Language: en-US In-Reply-To: <796291b5-f61a-4d68-9cbb-ae099dbb93d8@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 9/5/25 12:41 AM, Matti Vaittinen wrote: > Hi dee Ho Andy! > > Thanks again. I really appreciate the effort you put in these reviews! :) > > On 04/09/2025 16:36, Andy Shevchenko wrote: >> On Thu, Sep 04, 2025 at 03:36:46PM +0300, Matti Vaittinen wrote: >>> The ROHM BD79112 is an ADC/GPIO with 32 channels. The channel inputs can >>> be used as ADC or GPIO. Using the GPIOs as IRQ sources isn't supported. >>> >>> The ADC is 12-bit, supporting input voltages up to 5.7V, and separate I/O >>> voltage supply. Maximum SPI clock rate is 20 MHz (10 MHz with >>> daisy-chain configuration) and maximum sampling rate is 1MSPS. >>> >>> The IC does also support CRC but it is not implemented in the driver. >> >> ... >> >>> +/* >>> + * The data-sheet explains register I/O communication as follows: >>> + * >>> + * Read, two 16-bit sequences separated by CSB: >>> + * MOSI: >>> + * SCK:    | 1 | 2 | 3   | 4      | 5 .. 8 | 9 .. 16 | >>> + * data:| 0 | 0 |IOSET| RW (1) | ADDR   | 8'b0    | >>> + * >>> + * MISO: >>> + * SCK:    | 1 .. 8 | 9 .. 16 | >>> + * data:| 8'b0   | data    | >>> + * >>> + * Note, CSB is shown to be released between writing the address (MOSI) and >>> + * reading the register data (MISO). >>> + * >>> + * Write, single 16-bit sequence: >>> + * MOSI: >>> + * SCK:    | 1 | 2 | 3   | 4     | 5 .. 8 | >>> + * data:| 0 | 0 |IOSET| RW(0) | ADDR   | >>> + * >>> + * MISO: >>> + * SCK:    | 1 .. 8 | >>> + * data:| data   | >>> + */ >> >> I don't know how to read this comment. In the monospace font the whole block >> looks like a mess. > > What do you mean by a mess? Don't you have the '|' -characters aligned? That's very odd because they are aligned for me. Or, is this otherwise unclear? I find these diagrams very hard to read as well. I would just drop this part and let people look it up in the datasheet. I don't think it adds anything essential to understanding how the driver works.