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smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1uqTIb-0007lb-JP; Mon, 25 Aug 2025 11:15:33 +0200 Received: from lupine.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::4e] helo=lupine) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1uqTIZ-0022kp-0v; Mon, 25 Aug 2025 11:15:31 +0200 Received: from pza by lupine with local (Exim 4.96) (envelope-from ) id 1uqTIZ-000Hu4-0a; Mon, 25 Aug 2025 11:15:31 +0200 Message-ID: Subject: Re: [PATCH v13 04/11] PCI: stm32: Add PCIe host support for STM32MP25 From: Philipp Zabel To: Christian Bruel , lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org, robh@kernel.org, bhelgaas@google.com, krzk+dt@kernel.org, conor+dt@kernel.org, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, linus.walleij@linaro.org, corbet@lwn.net, shradha.t@samsung.com, mayank.rana@oss.qualcomm.com, namcao@linutronix.de, qiang.yu@oss.qualcomm.com, thippeswamy.havalige@amd.com, inochiama@gmail.com, quic_schintav@quicinc.com Cc: johan+linaro@kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-doc@vger.kernel.org Date: Mon, 25 Aug 2025 11:15:31 +0200 In-Reply-To: <20250820075411.1178729-5-christian.bruel@foss.st.com> References: <20250820075411.1178729-1-christian.bruel@foss.st.com> <20250820075411.1178729-5-christian.bruel@foss.st.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.46.4-2 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-gpio@vger.kernel.org On Mi, 2025-08-20 at 09:54 +0200, Christian Bruel wrote: > Add driver for the STM32MP25 SoC PCIe Gen1 2.5 GT/s and Gen2 5GT/s > controller based on the DesignWare PCIe core. >=20 > Supports MSI via GICv2m, Single Virtual Channel, Single Function >=20 > Supports WAKE# GPIO. >=20 > Signed-off-by: Christian Bruel > --- > drivers/pci/controller/dwc/Kconfig | 12 + > drivers/pci/controller/dwc/Makefile | 1 + > drivers/pci/controller/dwc/pcie-stm32.c | 360 ++++++++++++++++++++++++ > drivers/pci/controller/dwc/pcie-stm32.h | 15 + > 4 files changed, 388 insertions(+) > create mode 100644 drivers/pci/controller/dwc/pcie-stm32.c > create mode 100644 drivers/pci/controller/dwc/pcie-stm32.h >=20 > diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/= dwc/Kconfig > index deafc512b079..a8174817fd5b 100644 > --- a/drivers/pci/controller/dwc/Kconfig > +++ b/drivers/pci/controller/dwc/Kconfig > @@ -423,6 +423,18 @@ config PCIE_SPEAR13XX > help > Say Y here if you want PCIe support on SPEAr13XX SoCs. > =20 > +config PCIE_STM32_HOST > + tristate "STMicroelectronics STM32MP25 PCIe Controller (host mode)" > + depends on ARCH_STM32 || COMPILE_TEST > + depends on PCI_MSI > + select PCIE_DW_HOST > + help > + Enables Root Complex (RC) support for the DesignWare core based PCIe > + controller found in STM32MP25 SoC. > + > + This driver can also be built as a module. If so, the module > + will be called pcie-stm32. > + > config PCI_DRA7XX > tristate > =20 > diff --git a/drivers/pci/controller/dwc/Makefile b/drivers/pci/controller= /dwc/Makefile > index 6919d27798d1..1307a87b1cf0 100644 > --- a/drivers/pci/controller/dwc/Makefile > +++ b/drivers/pci/controller/dwc/Makefile > @@ -31,6 +31,7 @@ obj-$(CONFIG_PCIE_UNIPHIER) +=3D pcie-uniphier.o > obj-$(CONFIG_PCIE_UNIPHIER_EP) +=3D pcie-uniphier-ep.o > obj-$(CONFIG_PCIE_VISCONTI_HOST) +=3D pcie-visconti.o > obj-$(CONFIG_PCIE_RCAR_GEN4) +=3D pcie-rcar-gen4.o > +obj-$(CONFIG_PCIE_STM32_HOST) +=3D pcie-stm32.o > =20 > # The following drivers are for devices that use the generic ACPI > # pci_root.c driver but don't support standard ECAM config access. > diff --git a/drivers/pci/controller/dwc/pcie-stm32.c b/drivers/pci/contro= ller/dwc/pcie-stm32.c > new file mode 100644 > index 000000000000..964fa6f674c8 > --- /dev/null > +++ b/drivers/pci/controller/dwc/pcie-stm32.c > @@ -0,0 +1,360 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * STMicroelectronics STM32MP25 PCIe root complex driver. > + * > + * Copyright (C) 2025 STMicroelectronics > + * Author: Christian Bruel > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include "pcie-designware.h" > +#include "pcie-stm32.h" > +#include "../../pci.h" > + > +struct stm32_pcie { > + struct dw_pcie pci; > + struct regmap *regmap; > + struct reset_control *rst; This could be a local variable in stm32_pcie_probe(). regards Philipp