* [PATCH v2 1/5] ARM: dts: microchip: change to simple-mfd from simple-bus for PIO3 pinumux controller
2024-06-25 4:35 [PATCH v2 0/5] Convert Atmel PIO3 Pinctrl and GPIO bindings to yaml Manikandan Muralidharan
@ 2024-06-25 4:35 ` Manikandan Muralidharan
2024-06-25 4:35 ` [PATCH v2 2/5] ARM: dts: microchip: Remove additional compatible string from PIO3 pinctrl nodes Manikandan Muralidharan
` (4 subsequent siblings)
5 siblings, 0 replies; 16+ messages in thread
From: Manikandan Muralidharan @ 2024-06-25 4:35 UTC (permalink / raw)
To: linus.walleij, brgl, robh, krzk+dt, conor+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea, arnd, durai.manickamkr,
linux-gpio, devicetree, linux-arm-kernel, linux-kernel
Cc: manikandan.m
The pinctrl subnodes that define the pin configuration of other devices
under PIO3 pinmux controller are not simple memory mapped nodes.Ergo,
change simple-bus to simple-mfd.
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
---
arch/arm/boot/dts/microchip/at91rm9200.dtsi | 2 +-
arch/arm/boot/dts/microchip/at91sam9260.dtsi | 2 +-
arch/arm/boot/dts/microchip/at91sam9261.dtsi | 2 +-
arch/arm/boot/dts/microchip/at91sam9263.dtsi | 2 +-
arch/arm/boot/dts/microchip/at91sam9g45.dtsi | 2 +-
arch/arm/boot/dts/microchip/at91sam9n12.dtsi | 2 +-
arch/arm/boot/dts/microchip/at91sam9rl.dtsi | 2 +-
arch/arm/boot/dts/microchip/at91sam9x5.dtsi | 2 +-
arch/arm/boot/dts/microchip/sam9x60.dtsi | 2 +-
arch/arm/boot/dts/microchip/sama5d3.dtsi | 2 +-
arch/arm/boot/dts/microchip/sama5d4.dtsi | 2 +-
11 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm/boot/dts/microchip/at91rm9200.dtsi b/arch/arm/boot/dts/microchip/at91rm9200.dtsi
index 16c675e3a890..02a838541dc3 100644
--- a/arch/arm/boot/dts/microchip/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/microchip/at91rm9200.dtsi
@@ -225,7 +225,7 @@ macb0: ethernet@fffbc000 {
pinctrl@fffff400 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+ compatible = "atmel,at91rm9200-pinctrl", "simple-mfd";
ranges = <0xfffff400 0xfffff400 0x800>;
atmel,mux-mask = <
diff --git a/arch/arm/boot/dts/microchip/at91sam9260.dtsi b/arch/arm/boot/dts/microchip/at91sam9260.dtsi
index e56d5546554c..0038183e9a53 100644
--- a/arch/arm/boot/dts/microchip/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/microchip/at91sam9260.dtsi
@@ -170,7 +170,7 @@ tcb1: timer@fffdc000 {
pinctrl: pinctrl@fffff400 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+ compatible = "atmel,at91rm9200-pinctrl", "simple-mfd";
ranges = <0xfffff400 0xfffff400 0x600>;
atmel,mux-mask = <
diff --git a/arch/arm/boot/dts/microchip/at91sam9261.dtsi b/arch/arm/boot/dts/microchip/at91sam9261.dtsi
index 307b60658014..b57a7fd67197 100644
--- a/arch/arm/boot/dts/microchip/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/microchip/at91sam9261.dtsi
@@ -317,7 +317,7 @@ dbgu: serial@fffff200 {
pinctrl@fffff400 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+ compatible = "atmel,at91rm9200-pinctrl", "simple-mfd";
ranges = <0xfffff400 0xfffff400 0x600>;
atmel,mux-mask =
diff --git a/arch/arm/boot/dts/microchip/at91sam9263.dtsi b/arch/arm/boot/dts/microchip/at91sam9263.dtsi
index 75d8ff2d12c8..b95d4016ae9f 100644
--- a/arch/arm/boot/dts/microchip/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/microchip/at91sam9263.dtsi
@@ -167,7 +167,7 @@ poweroff@fffffd10 {
pinctrl@fffff200 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+ compatible = "atmel,at91rm9200-pinctrl", "simple-mfd";
ranges = <0xfffff200 0xfffff200 0xa00>;
atmel,mux-mask = <
diff --git a/arch/arm/boot/dts/microchip/at91sam9g45.dtsi b/arch/arm/boot/dts/microchip/at91sam9g45.dtsi
index 325c63a53118..c54eb21d5cba 100644
--- a/arch/arm/boot/dts/microchip/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/microchip/at91sam9g45.dtsi
@@ -190,7 +190,7 @@ dma: dma-controller@ffffec00 {
pinctrl@fffff200 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+ compatible = "atmel,at91rm9200-pinctrl", "simple-mfd";
ranges = <0xfffff200 0xfffff200 0xa00>;
atmel,mux-mask = <
diff --git a/arch/arm/boot/dts/microchip/at91sam9n12.dtsi b/arch/arm/boot/dts/microchip/at91sam9n12.dtsi
index 8dc04e9031a6..9aa22195051d 100644
--- a/arch/arm/boot/dts/microchip/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/microchip/at91sam9n12.dtsi
@@ -226,7 +226,7 @@ dma: dma-controller@ffffec00 {
pinctrl@fffff400 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
+ compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-mfd";
ranges = <0xfffff400 0xfffff400 0x800>;
atmel,mux-mask = <
diff --git a/arch/arm/boot/dts/microchip/at91sam9rl.dtsi b/arch/arm/boot/dts/microchip/at91sam9rl.dtsi
index 7436b5c862b1..1fec9fcc7cd1 100644
--- a/arch/arm/boot/dts/microchip/at91sam9rl.dtsi
+++ b/arch/arm/boot/dts/microchip/at91sam9rl.dtsi
@@ -339,7 +339,7 @@ dbgu: serial@fffff200 {
pinctrl@fffff400 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+ compatible = "atmel,at91rm9200-pinctrl", "simple-mfd";
ranges = <0xfffff400 0xfffff400 0x800>;
atmel,mux-mask =
diff --git a/arch/arm/boot/dts/microchip/at91sam9x5.dtsi b/arch/arm/boot/dts/microchip/at91sam9x5.dtsi
index a7456c2191fa..d41d7c844200 100644
--- a/arch/arm/boot/dts/microchip/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/microchip/at91sam9x5.dtsi
@@ -202,7 +202,7 @@ dma1: dma-controller@ffffee00 {
pinctrl: pinctrl@fffff400 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
+ compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-mfd";
ranges = <0xfffff400 0xfffff400 0x800>;
/* shared pinctrl settings */
diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi
index 291540e5d81e..4e71ae63edf1 100644
--- a/arch/arm/boot/dts/microchip/sam9x60.dtsi
+++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi
@@ -1223,7 +1223,7 @@ AT91_XDMAC_DT_PERID(28))>,
pinctrl: pinctrl@fffff400 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "microchip,sam9x60-pinctrl", "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
+ compatible = "microchip,sam9x60-pinctrl", "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-mfd";
ranges = <0xfffff400 0xfffff400 0x800>;
/* mux-mask corresponding to sam9x60 SoC in TFBGA228L package */
diff --git a/arch/arm/boot/dts/microchip/sama5d3.dtsi b/arch/arm/boot/dts/microchip/sama5d3.dtsi
index d4fc0c1dfc10..f1614dcd7d28 100644
--- a/arch/arm/boot/dts/microchip/sama5d3.dtsi
+++ b/arch/arm/boot/dts/microchip/sama5d3.dtsi
@@ -493,7 +493,7 @@ aic: interrupt-controller@fffff000 {
pinctrl: pinctrl@fffff200 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
+ compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-mfd";
ranges = <0xfffff200 0xfffff200 0xa00>;
atmel,mux-mask = <
/* A B C */
diff --git a/arch/arm/boot/dts/microchip/sama5d4.dtsi b/arch/arm/boot/dts/microchip/sama5d4.dtsi
index 58ceed997889..69dd4e7b4c14 100644
--- a/arch/arm/boot/dts/microchip/sama5d4.dtsi
+++ b/arch/arm/boot/dts/microchip/sama5d4.dtsi
@@ -791,7 +791,7 @@ dbgu: serial@fc069000 {
pinctrl: pinctrl@fc06a000 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
+ compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-mfd";
ranges = <0xfc068000 0xfc068000 0x100
0xfc06a000 0xfc06a000 0x4000>;
/* WARNING: revisit as pin spec has changed */
--
2.25.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v2 2/5] ARM: dts: microchip: Remove additional compatible string from PIO3 pinctrl nodes
2024-06-25 4:35 [PATCH v2 0/5] Convert Atmel PIO3 Pinctrl and GPIO bindings to yaml Manikandan Muralidharan
2024-06-25 4:35 ` [PATCH v2 1/5] ARM: dts: microchip: change to simple-mfd from simple-bus for PIO3 pinumux controller Manikandan Muralidharan
@ 2024-06-25 4:35 ` Manikandan Muralidharan
2024-06-25 4:35 ` [PATCH v2 3/5] ARM: dts: microchip: sam9x60: Remove additional compatible string from GPIO node Manikandan Muralidharan
` (3 subsequent siblings)
5 siblings, 0 replies; 16+ messages in thread
From: Manikandan Muralidharan @ 2024-06-25 4:35 UTC (permalink / raw)
To: linus.walleij, brgl, robh, krzk+dt, conor+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea, arnd, durai.manickamkr,
linux-gpio, devicetree, linux-arm-kernel, linux-kernel
Cc: manikandan.m
The driver data specific to each pinctrl GPIO bank compatible nodes are not
the same and declaring additional compatible string as fallback has no
specific purpose, hence, removing the additional compatible string from the
pinctrl nodes in DT to comply with atmel,at91-pinctrl.txt documentation.
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
---
arch/arm/boot/dts/microchip/at91sam9n12.dtsi | 2 +-
arch/arm/boot/dts/microchip/at91sam9x5.dtsi | 2 +-
arch/arm/boot/dts/microchip/sam9x60.dtsi | 2 +-
arch/arm/boot/dts/microchip/sama5d3.dtsi | 2 +-
arch/arm/boot/dts/microchip/sama5d4.dtsi | 2 +-
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/microchip/at91sam9n12.dtsi b/arch/arm/boot/dts/microchip/at91sam9n12.dtsi
index 9aa22195051d..844bd50943fc 100644
--- a/arch/arm/boot/dts/microchip/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/microchip/at91sam9n12.dtsi
@@ -226,7 +226,7 @@ dma: dma-controller@ffffec00 {
pinctrl@fffff400 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-mfd";
+ compatible = "atmel,at91sam9x5-pinctrl", "simple-mfd";
ranges = <0xfffff400 0xfffff400 0x800>;
atmel,mux-mask = <
diff --git a/arch/arm/boot/dts/microchip/at91sam9x5.dtsi b/arch/arm/boot/dts/microchip/at91sam9x5.dtsi
index d41d7c844200..27c1f2861cc3 100644
--- a/arch/arm/boot/dts/microchip/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/microchip/at91sam9x5.dtsi
@@ -202,7 +202,7 @@ dma1: dma-controller@ffffee00 {
pinctrl: pinctrl@fffff400 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-mfd";
+ compatible = "atmel,at91sam9x5-pinctrl", "simple-mfd";
ranges = <0xfffff400 0xfffff400 0x800>;
/* shared pinctrl settings */
diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi
index 4e71ae63edf1..797855e78058 100644
--- a/arch/arm/boot/dts/microchip/sam9x60.dtsi
+++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi
@@ -1223,7 +1223,7 @@ AT91_XDMAC_DT_PERID(28))>,
pinctrl: pinctrl@fffff400 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "microchip,sam9x60-pinctrl", "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-mfd";
+ compatible = "microchip,sam9x60-pinctrl", "simple-mfd";
ranges = <0xfffff400 0xfffff400 0x800>;
/* mux-mask corresponding to sam9x60 SoC in TFBGA228L package */
diff --git a/arch/arm/boot/dts/microchip/sama5d3.dtsi b/arch/arm/boot/dts/microchip/sama5d3.dtsi
index f1614dcd7d28..39865133aa56 100644
--- a/arch/arm/boot/dts/microchip/sama5d3.dtsi
+++ b/arch/arm/boot/dts/microchip/sama5d3.dtsi
@@ -493,7 +493,7 @@ aic: interrupt-controller@fffff000 {
pinctrl: pinctrl@fffff200 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-mfd";
+ compatible = "atmel,sama5d3-pinctrl", "simple-mfd";
ranges = <0xfffff200 0xfffff200 0xa00>;
atmel,mux-mask = <
/* A B C */
diff --git a/arch/arm/boot/dts/microchip/sama5d4.dtsi b/arch/arm/boot/dts/microchip/sama5d4.dtsi
index 69dd4e7b4c14..b253ba33fc38 100644
--- a/arch/arm/boot/dts/microchip/sama5d4.dtsi
+++ b/arch/arm/boot/dts/microchip/sama5d4.dtsi
@@ -791,7 +791,7 @@ dbgu: serial@fc069000 {
pinctrl: pinctrl@fc06a000 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-mfd";
+ compatible = "atmel,sama5d3-pinctrl", "simple-mfd";
ranges = <0xfc068000 0xfc068000 0x100
0xfc06a000 0xfc06a000 0x4000>;
/* WARNING: revisit as pin spec has changed */
--
2.25.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v2 3/5] ARM: dts: microchip: sam9x60: Remove additional compatible string from GPIO node
2024-06-25 4:35 [PATCH v2 0/5] Convert Atmel PIO3 Pinctrl and GPIO bindings to yaml Manikandan Muralidharan
2024-06-25 4:35 ` [PATCH v2 1/5] ARM: dts: microchip: change to simple-mfd from simple-bus for PIO3 pinumux controller Manikandan Muralidharan
2024-06-25 4:35 ` [PATCH v2 2/5] ARM: dts: microchip: Remove additional compatible string from PIO3 pinctrl nodes Manikandan Muralidharan
@ 2024-06-25 4:35 ` Manikandan Muralidharan
2024-06-25 4:35 ` [PATCH v2 4/5] dt-bindings: gpio: convert Atmel GPIO to json-schema Manikandan Muralidharan
` (2 subsequent siblings)
5 siblings, 0 replies; 16+ messages in thread
From: Manikandan Muralidharan @ 2024-06-25 4:35 UTC (permalink / raw)
To: linus.walleij, brgl, robh, krzk+dt, conor+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea, arnd, durai.manickamkr,
linux-gpio, devicetree, linux-arm-kernel, linux-kernel
Cc: manikandan.m
The driver data specific to each pinctrl GPIO bank compatible nodes are not
the same and declaring additional compatible string as fallback has no
specific purpose, hence, removing the "atmel,at91sam9x5-gpio" compatible from
sam9x60 SoC DT.
Note: The at91 pinctrl driver uses "atmel,at91rm9200-gpio" compatible string
to find the number of active GPIO banks and identify the pinmux nodes.It
should used as a constant across all DT for GPIO node banks that uses PIO3
based pinctrl driver
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
---
arch/arm/boot/dts/microchip/sam9x60.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi
index 797855e78058..db2ddff872d2 100644
--- a/arch/arm/boot/dts/microchip/sam9x60.dtsi
+++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi
@@ -1236,7 +1236,7 @@ pinctrl: pinctrl@fffff400 {
>;
pioA: gpio@fffff400 {
- compatible = "microchip,sam9x60-gpio", "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+ compatible = "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
@@ -1247,7 +1247,7 @@ pioA: gpio@fffff400 {
};
pioB: gpio@fffff600 {
- compatible = "microchip,sam9x60-gpio", "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+ compatible = "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
@@ -1259,7 +1259,7 @@ pioB: gpio@fffff600 {
};
pioC: gpio@fffff800 {
- compatible = "microchip,sam9x60-gpio", "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+ compatible = "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
@@ -1270,7 +1270,7 @@ pioC: gpio@fffff800 {
};
pioD: gpio@fffffa00 {
- compatible = "microchip,sam9x60-gpio", "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+ compatible = "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x200>;
interrupts = <44 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
--
2.25.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v2 4/5] dt-bindings: gpio: convert Atmel GPIO to json-schema
2024-06-25 4:35 [PATCH v2 0/5] Convert Atmel PIO3 Pinctrl and GPIO bindings to yaml Manikandan Muralidharan
` (2 preceding siblings ...)
2024-06-25 4:35 ` [PATCH v2 3/5] ARM: dts: microchip: sam9x60: Remove additional compatible string from GPIO node Manikandan Muralidharan
@ 2024-06-25 4:35 ` Manikandan Muralidharan
2024-06-25 16:34 ` Conor Dooley
2024-06-25 4:35 ` [PATCH v2 5/5] dt-bindings: pinctrl: Convert Atmel PIO3 pinctrl " Manikandan Muralidharan
2024-06-26 12:08 ` [PATCH v2 0/5] Convert Atmel PIO3 Pinctrl and GPIO bindings to yaml Linus Walleij
5 siblings, 1 reply; 16+ messages in thread
From: Manikandan Muralidharan @ 2024-06-25 4:35 UTC (permalink / raw)
To: linus.walleij, brgl, robh, krzk+dt, conor+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea, arnd, durai.manickamkr,
linux-gpio, devicetree, linux-arm-kernel, linux-kernel
Cc: manikandan.m
Convert the Atmel GPIO controller binding document to DT schema format
using json-schema.
The compatible string "microchip,sam9x7-gpio" is added as well.
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
---
changes in v2:
- Fix bot errors with 'make dt_binding_check', missed to add
"atmel,at91rm9200-gpio" as separate compatible for devices that uses it
- Remove label from example
- Add default entry for #gpio-lines property
- Add new compatible string details in commit message
---
.../bindings/gpio/atmel,at91rm9200-gpio.yaml | 81 +++++++++++++++++++
.../devicetree/bindings/gpio/gpio_atmel.txt | 31 -------
2 files changed, 81 insertions(+), 31 deletions(-)
create mode 100644 Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml
delete mode 100644 Documentation/devicetree/bindings/gpio/gpio_atmel.txt
diff --git a/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml b/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml
new file mode 100644
index 000000000000..3dd70933ed8e
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml
@@ -0,0 +1,81 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/atmel,at91rm9200-gpio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip GPIO controller (PIO)
+
+maintainers:
+ - Manikandan Muralidharan <manikandan.m@microchip.com>
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - atmel,at91sam9x5-gpio
+ - microchip,sam9x60-gpio
+ - const: atmel,at91rm9200-gpio
+ - items:
+ - enum:
+ - microchip,sam9x7-gpio
+ - const: microchip,sam9x60-gpio
+ - const: atmel,at91rm9200-gpio
+ - items:
+ - const: atmel,at91rm9200-gpio
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-controller: true
+
+ "#interrupt-cells":
+ const: 2
+
+ gpio-controller: true
+ gpio-line-names: true
+
+ "#gpio-cells":
+ const: 2
+
+ clocks:
+ maxItems: 1
+
+ "#gpio-lines":
+ description:
+ Number of gpio, 32 by default if absent
+ maxItems: 1
+ default: 32
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-controller
+ - "#interrupt-cells"
+ - gpio-controller
+ - "#gpio-cells"
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/at91.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ gpio@fffff400 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff400 0x200>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/gpio/gpio_atmel.txt b/Documentation/devicetree/bindings/gpio/gpio_atmel.txt
deleted file mode 100644
index 29416f9c3220..000000000000
--- a/Documentation/devicetree/bindings/gpio/gpio_atmel.txt
+++ /dev/null
@@ -1,31 +0,0 @@
-* Atmel GPIO controller (PIO)
-
-Required properties:
-- compatible: "atmel,<chip>-gpio", where <chip> is at91rm9200 or at91sam9x5.
-- reg: Should contain GPIO controller registers location and length
-- interrupts: Should be the port interrupt shared by all the pins.
-- #gpio-cells: Should be two. The first cell is the pin number and
- the second cell is used to specify optional parameters to declare if the GPIO
- is active high or low. See gpio.txt.
-- gpio-controller: Marks the device node as a GPIO controller.
-- interrupt-controller: Marks the device node as an interrupt controller.
-- #interrupt-cells: Should be two. The first cell is the pin number and the
- second cell is used to specify irq type flags, see the two cell description
- in interrupt-controller/interrupts.txt for details.
-
-optional properties:
-- #gpio-lines: Number of gpio if absent 32.
-
-
-Example:
- pioA: gpio@fffff200 {
- compatible = "atmel,at91rm9200-gpio";
- reg = <0xfffff200 0x100>;
- interrupts = <2 4>;
- #gpio-cells = <2>;
- gpio-controller;
- #gpio-lines = <19>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
--
2.25.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH v2 4/5] dt-bindings: gpio: convert Atmel GPIO to json-schema
2024-06-25 4:35 ` [PATCH v2 4/5] dt-bindings: gpio: convert Atmel GPIO to json-schema Manikandan Muralidharan
@ 2024-06-25 16:34 ` Conor Dooley
2024-06-26 8:32 ` Manikandan.M
0 siblings, 1 reply; 16+ messages in thread
From: Conor Dooley @ 2024-06-25 16:34 UTC (permalink / raw)
To: Manikandan Muralidharan
Cc: linus.walleij, brgl, robh, krzk+dt, conor+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea, arnd, durai.manickamkr,
linux-gpio, devicetree, linux-arm-kernel, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 2348 bytes --]
On Tue, Jun 25, 2024 at 10:05:24AM +0530, Manikandan Muralidharan wrote:
> Convert the Atmel GPIO controller binding document to DT schema format
> using json-schema.
> The compatible string "microchip,sam9x7-gpio" is added as well.
>
> Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
> ---
> changes in v2:
> - Fix bot errors with 'make dt_binding_check', missed to add
> "atmel,at91rm9200-gpio" as separate compatible for devices that uses it
> - Remove label from example
> - Add default entry for #gpio-lines property
> - Add new compatible string details in commit message
> ---
> .../bindings/gpio/atmel,at91rm9200-gpio.yaml | 81 +++++++++++++++++++
> .../devicetree/bindings/gpio/gpio_atmel.txt | 31 -------
> 2 files changed, 81 insertions(+), 31 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml
> delete mode 100644 Documentation/devicetree/bindings/gpio/gpio_atmel.txt
>
> diff --git a/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml b/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml
> new file mode 100644
> index 000000000000..3dd70933ed8e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml
> @@ -0,0 +1,81 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/gpio/atmel,at91rm9200-gpio.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip GPIO controller (PIO)
> +
> +maintainers:
> + - Manikandan Muralidharan <manikandan.m@microchip.com>
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - atmel,at91sam9x5-gpio
> + - microchip,sam9x60-gpio
> + - const: atmel,at91rm9200-gpio
> + - items:
> + - enum:
> + - microchip,sam9x7-gpio
> + - const: microchip,sam9x60-gpio
> + - const: atmel,at91rm9200-gpio
It's worth pointing out that this is required, because the driver
implements a different set of ops for the sam9x60. There's not just more
of them, they're different too.
Are the sam9x60 and at91rm9200 are actually compatible, or is the
fallback here some mistake that originated in the dts?
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 4/5] dt-bindings: gpio: convert Atmel GPIO to json-schema
2024-06-25 16:34 ` Conor Dooley
@ 2024-06-26 8:32 ` Manikandan.M
2024-06-26 8:59 ` Conor Dooley
0 siblings, 1 reply; 16+ messages in thread
From: Manikandan.M @ 2024-06-26 8:32 UTC (permalink / raw)
To: conor
Cc: linus.walleij, brgl, robh, krzk+dt, conor+dt, Nicolas.Ferre,
alexandre.belloni, claudiu.beznea, arnd, Durai.ManickamKR,
linux-gpio, devicetree, linux-arm-kernel, linux-kernel,
Manikandan.M
Hi Conor,
On 25/06/24 10:04 pm, Conor Dooley wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
>
> ForwardedMessage.eml
>
> Subject:
> Re: [PATCH v2 4/5] dt-bindings: gpio: convert Atmel GPIO to json-schema
> From:
> Conor Dooley <conor@kernel.org>
> Date:
> 25/06/24, 10:04 pm
>
> To:
> Manikandan Muralidharan <manikandan.m@microchip.com>
> CC:
> linus.walleij@linaro.org, brgl@bgdev.pl, robh@kernel.org,
> krzk+dt@kernel.org, conor+dt@kernel.org, nicolas.ferre@microchip.com,
> alexandre.belloni@bootlin.com, claudiu.beznea@tuxon.dev, arnd@arndb.de,
> durai.manickamkr@microchip.com, linux-gpio@vger.kernel.org,
> devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
> linux-kernel@vger.kernel.org
>
>
> On Tue, Jun 25, 2024 at 10:05:24AM +0530, Manikandan Muralidharan wrote:
>> Convert the Atmel GPIO controller binding document to DT schema format
>> using json-schema.
>> The compatible string "microchip,sam9x7-gpio" is added as well.
>>
>> Signed-off-by: Manikandan Muralidharan<manikandan.m@microchip.com>
>> ---
>> changes in v2:
>> - Fix bot errors with 'make dt_binding_check', missed to add
>> "atmel,at91rm9200-gpio" as separate compatible for devices that uses it
>> - Remove label from example
>> - Add default entry for #gpio-lines property
>> - Add new compatible string details in commit message
>> ---
>> .../bindings/gpio/atmel,at91rm9200-gpio.yaml | 81 +++++++++++++++++++
>> .../devicetree/bindings/gpio/gpio_atmel.txt | 31 -------
>> 2 files changed, 81 insertions(+), 31 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml
>> delete mode 100644 Documentation/devicetree/bindings/gpio/gpio_atmel.txt
>>
>> diff --git a/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml b/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml
>> new file mode 100644
>> index 000000000000..3dd70933ed8e
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml
>> @@ -0,0 +1,81 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id:http://devicetree.org/schemas/gpio/atmel,at91rm9200-gpio.yaml#
>> +$schema:http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Microchip GPIO controller (PIO)
>> +
>> +maintainers:
>> + - Manikandan Muralidharan<manikandan.m@microchip.com>
>> +
>> +properties:
>> + compatible:
>> + oneOf:
>> + - items:
>> + - enum:
>> + - atmel,at91sam9x5-gpio
>> + - microchip,sam9x60-gpio
>> + - const: atmel,at91rm9200-gpio
>> + - items:
>> + - enum:
>> + - microchip,sam9x7-gpio
>> + - const: microchip,sam9x60-gpio
>> + - const: atmel,at91rm9200-gpio
> It's worth pointing out that this is required, because the driver
> implements a different set of ops for the sam9x60. There's not just more
> of them, they're different too.
> Are the sam9x60 and at91rm9200 are actually compatible, or is the
> fallback here some mistake that originated in the dts?
>
The PIO3 pinctrl driver uses the compatible "atmel,at91rm9200-gpio" to
find the number of active GPIO banks and also to differentiate them from
the pinmux child nodes.The driver probe fails if the at91rm9200 is not
present in the GPIO bank compatible property list.
For sam9x7, "microchip,sam9x60-gpio" is used as the fallback compatible
and "atmel,at91rm9200-gpio" is added by default to avoid probe issues
and help find the number of GPIO banks by the driver.
--
Thanks and Regards,
Manikandan M.
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 4/5] dt-bindings: gpio: convert Atmel GPIO to json-schema
2024-06-26 8:32 ` Manikandan.M
@ 2024-06-26 8:59 ` Conor Dooley
2024-06-27 6:08 ` Manikandan.M
0 siblings, 1 reply; 16+ messages in thread
From: Conor Dooley @ 2024-06-26 8:59 UTC (permalink / raw)
To: Manikandan.M
Cc: linus.walleij, brgl, robh, krzk+dt, conor+dt, Nicolas.Ferre,
alexandre.belloni, claudiu.beznea, arnd, Durai.ManickamKR,
linux-gpio, devicetree, linux-arm-kernel, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 3753 bytes --]
On Wed, Jun 26, 2024 at 08:32:41AM +0000, Manikandan.M@microchip.com wrote:
> On 25/06/24 10:04 pm, Conor Dooley wrote:
> > Re: [PATCH v2 4/5] dt-bindings: gpio: convert Atmel GPIO to json-schema
> > From: Conor Dooley <conor@kernel.org>
> > On Tue, Jun 25, 2024 at 10:05:24AM +0530, Manikandan Muralidharan wrote:
> >> Convert the Atmel GPIO controller binding document to DT schema format
> >> using json-schema.
> >> The compatible string "microchip,sam9x7-gpio" is added as well.
> >>
> >> Signed-off-by: Manikandan Muralidharan<manikandan.m@microchip.com>
> >> ---
> >> changes in v2:
> >> - Fix bot errors with 'make dt_binding_check', missed to add
> >> "atmel,at91rm9200-gpio" as separate compatible for devices that uses it
> >> - Remove label from example
> >> - Add default entry for #gpio-lines property
> >> - Add new compatible string details in commit message
> >> ---
> >> .../bindings/gpio/atmel,at91rm9200-gpio.yaml | 81 +++++++++++++++++++
> >> .../devicetree/bindings/gpio/gpio_atmel.txt | 31 -------
> >> 2 files changed, 81 insertions(+), 31 deletions(-)
> >> create mode 100644 Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml
> >> delete mode 100644 Documentation/devicetree/bindings/gpio/gpio_atmel.txt
> >>
> >> diff --git a/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml b/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml
> >> new file mode 100644
> >> index 000000000000..3dd70933ed8e
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml
> >> @@ -0,0 +1,81 @@
> >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> >> +%YAML 1.2
> >> +---
> >> +$id:http://devicetree.org/schemas/gpio/atmel,at91rm9200-gpio.yaml#
> >> +$schema:http://devicetree.org/meta-schemas/core.yaml#
> >> +
> >> +title: Microchip GPIO controller (PIO)
> >> +
> >> +maintainers:
> >> + - Manikandan Muralidharan<manikandan.m@microchip.com>
> >> +
> >> +properties:
> >> + compatible:
> >> + oneOf:
> >> + - items:
> >> + - enum:
> >> + - atmel,at91sam9x5-gpio
> >> + - microchip,sam9x60-gpio
> >> + - const: atmel,at91rm9200-gpio
> >> + - items:
> >> + - enum:
> >> + - microchip,sam9x7-gpio
> >> + - const: microchip,sam9x60-gpio
> >> + - const: atmel,at91rm9200-gpio
> > It's worth pointing out that this is required, because the driver
> > implements a different set of ops for the sam9x60. There's not just more
> > of them, they're different too.
> > Are the sam9x60 and at91rm9200 are actually compatible, or is the
> > fallback here some mistake that originated in the dts?
> >
> The PIO3 pinctrl driver uses the compatible "atmel,at91rm9200-gpio" to
> find the number of active GPIO banks and also to differentiate them from
> the pinmux child nodes.The driver probe fails if the at91rm9200 is not
> present in the GPIO bank compatible property list.
> For sam9x7, "microchip,sam9x60-gpio" is used as the fallback compatible
> and "atmel,at91rm9200-gpio" is added by default to avoid probe issues
> and help find the number of GPIO banks by the driver.
That's unfortunately not what I asked. Forget about
at91_pinctrl_child_count() for a minute and answer the question again:
Are the sam9x60 and at91rm9200 actually compatible?
Hints:
- Do the registers that are in the at91rm9200 have the same behaviour in
the sam9x60?
- Are the new registers in sam9x60 optional, so that if all sam9x60 code
was deleted from the driver, the driver would still work for the subset
of features that the at91rm9200 already supports?
Thanks,
Conor.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 4/5] dt-bindings: gpio: convert Atmel GPIO to json-schema
2024-06-26 8:59 ` Conor Dooley
@ 2024-06-27 6:08 ` Manikandan.M
2024-06-27 15:42 ` Conor Dooley
0 siblings, 1 reply; 16+ messages in thread
From: Manikandan.M @ 2024-06-27 6:08 UTC (permalink / raw)
To: conor
Cc: linus.walleij, brgl, robh, krzk+dt, conor+dt, Nicolas.Ferre,
alexandre.belloni, claudiu.beznea, arnd, Durai.ManickamKR,
linux-gpio, devicetree, linux-arm-kernel, linux-kernel
Hi Conor,
On 26/06/24 2:29 pm, Conor Dooley wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
>
> ForwardedMessage.eml
>
> Subject:
> Re: [PATCH v2 4/5] dt-bindings: gpio: convert Atmel GPIO to json-schema
> From:
> Conor Dooley <conor@kernel.org>
> Date:
> 26/06/24, 2:29 pm
>
> To:
> Manikandan.M@microchip.com
> CC:
> linus.walleij@linaro.org, brgl@bgdev.pl, robh@kernel.org,
> krzk+dt@kernel.org, conor+dt@kernel.org, Nicolas.Ferre@microchip.com,
> alexandre.belloni@bootlin.com, claudiu.beznea@tuxon.dev, arnd@arndb.de,
> Durai.ManickamKR@microchip.com, linux-gpio@vger.kernel.org,
> devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
> linux-kernel@vger.kernel.org
>
>
> On Wed, Jun 26, 2024 at 08:32:41AM +0000,Manikandan.M@microchip.com wrote:
>> On 25/06/24 10:04 pm, Conor Dooley wrote:
>>> Re: [PATCH v2 4/5] dt-bindings: gpio: convert Atmel GPIO to json-schema
>>> From: Conor Dooley<conor@kernel.org>
>>> On Tue, Jun 25, 2024 at 10:05:24AM +0530, Manikandan Muralidharan wrote:
>>>> Convert the Atmel GPIO controller binding document to DT schema format
>>>> using json-schema.
>>>> The compatible string "microchip,sam9x7-gpio" is added as well.
>>>>
>>>> Signed-off-by: Manikandan Muralidharan<manikandan.m@microchip.com>
>>>> ---
>>>> changes in v2:
>>>> - Fix bot errors with 'make dt_binding_check', missed to add
>>>> "atmel,at91rm9200-gpio" as separate compatible for devices that uses it
>>>> - Remove label from example
>>>> - Add default entry for #gpio-lines property
>>>> - Add new compatible string details in commit message
>>>> ---
>>>> .../bindings/gpio/atmel,at91rm9200-gpio.yaml | 81 +++++++++++++++++++
>>>> .../devicetree/bindings/gpio/gpio_atmel.txt | 31 -------
>>>> 2 files changed, 81 insertions(+), 31 deletions(-)
>>>> create mode 100644 Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml
>>>> delete mode 100644 Documentation/devicetree/bindings/gpio/gpio_atmel.txt
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml b/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml
>>>> new file mode 100644
>>>> index 000000000000..3dd70933ed8e
>>>> --- /dev/null
>>>> +++ b/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml
>>>> @@ -0,0 +1,81 @@
>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>>> +%YAML 1.2
>>>> +---
>>>> +$id:http://devicetree.org/schemas/gpio/atmel,at91rm9200-gpio.yaml#
>>>> +$schema:http://devicetree.org/meta-schemas/core.yaml#
>>>> +
>>>> +title: Microchip GPIO controller (PIO)
>>>> +
>>>> +maintainers:
>>>> + - Manikandan Muralidharan<manikandan.m@microchip.com>
>>>> +
>>>> +properties:
>>>> + compatible:
>>>> + oneOf:
>>>> + - items:
>>>> + - enum:
>>>> + - atmel,at91sam9x5-gpio
>>>> + - microchip,sam9x60-gpio
>>>> + - const: atmel,at91rm9200-gpio
>>>> + - items:
>>>> + - enum:
>>>> + - microchip,sam9x7-gpio
>>>> + - const: microchip,sam9x60-gpio
>>>> + - const: atmel,at91rm9200-gpio
>>> It's worth pointing out that this is required, because the driver
>>> implements a different set of ops for the sam9x60. There's not just more
>>> of them, they're different too.
>>> Are the sam9x60 and at91rm9200 are actually compatible, or is the
>>> fallback here some mistake that originated in the dts?
>>>
>> The PIO3 pinctrl driver uses the compatible "atmel,at91rm9200-gpio" to
>> find the number of active GPIO banks and also to differentiate them from
>> the pinmux child nodes.The driver probe fails if the at91rm9200 is not
>> present in the GPIO bank compatible property list.
>> For sam9x7, "microchip,sam9x60-gpio" is used as the fallback compatible
>> and "atmel,at91rm9200-gpio" is added by default to avoid probe issues
>> and help find the number of GPIO banks by the driver.
> That's unfortunately not what I asked. Forget about
> at91_pinctrl_child_count() for a minute and answer the question again:
> Are the sam9x60 and at91rm9200 actually compatible?
>
> Hints:
> - Do the registers that are in the at91rm9200 have the same behaviour in
> the sam9x60?
The registers in at91rm9200 have the same behavior as sam9x60 expect
that the former supports only 2 Peripheral function per pin while
sam9x60 supports 4.
> - Are the new registers in sam9x60 optional, so that if all sam9x60 code
> was deleted from the driver, the driver would still work for the subset
> of features that the at91rm9200 already supports?
at91rm9200 function will work for sam9x60 but not up-to its full
potential.The new registers in sam9x60 for drive-strength, slew-rate,
debounce, pull-down will help drive the the current pinmux configs for
sam9x60/9x7 board DT.
>
> Thanks,
> Conor.
>
--
Thanks and Regards,
Manikandan M.
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 4/5] dt-bindings: gpio: convert Atmel GPIO to json-schema
2024-06-27 6:08 ` Manikandan.M
@ 2024-06-27 15:42 ` Conor Dooley
2024-06-27 15:44 ` Conor Dooley
0 siblings, 1 reply; 16+ messages in thread
From: Conor Dooley @ 2024-06-27 15:42 UTC (permalink / raw)
To: Manikandan.M
Cc: linus.walleij, brgl, robh, krzk+dt, conor+dt, Nicolas.Ferre,
alexandre.belloni, claudiu.beznea, arnd, Durai.ManickamKR,
linux-gpio, devicetree, linux-arm-kernel, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 5368 bytes --]
On Thu, Jun 27, 2024 at 06:08:15AM +0000, Manikandan.M@microchip.com wrote:
> Hi Conor,
>
> On 26/06/24 2:29 pm, Conor Dooley wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> >
> >
> > ForwardedMessage.eml
> >
> > Subject:
> > Re: [PATCH v2 4/5] dt-bindings: gpio: convert Atmel GPIO to json-schema
> > From:
> > Conor Dooley <conor@kernel.org>
> > Date:
> > 26/06/24, 2:29 pm
> >
> > To:
> > Manikandan.M@microchip.com
> > CC:
> > linus.walleij@linaro.org, brgl@bgdev.pl, robh@kernel.org,
> > krzk+dt@kernel.org, conor+dt@kernel.org, Nicolas.Ferre@microchip.com,
> > alexandre.belloni@bootlin.com, claudiu.beznea@tuxon.dev, arnd@arndb.de,
> > Durai.ManickamKR@microchip.com, linux-gpio@vger.kernel.org,
> > devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
> > linux-kernel@vger.kernel.org
> >
> >
> > On Wed, Jun 26, 2024 at 08:32:41AM +0000,Manikandan.M@microchip.com wrote:
> >> On 25/06/24 10:04 pm, Conor Dooley wrote:
> >>> Re: [PATCH v2 4/5] dt-bindings: gpio: convert Atmel GPIO to json-schema
> >>> From: Conor Dooley<conor@kernel.org>
> >>> On Tue, Jun 25, 2024 at 10:05:24AM +0530, Manikandan Muralidharan wrote:
> >>>> Convert the Atmel GPIO controller binding document to DT schema format
> >>>> using json-schema.
> >>>> The compatible string "microchip,sam9x7-gpio" is added as well.
> >>>>
> >>>> Signed-off-by: Manikandan Muralidharan<manikandan.m@microchip.com>
> >>>> ---
> >>>> changes in v2:
> >>>> - Fix bot errors with 'make dt_binding_check', missed to add
> >>>> "atmel,at91rm9200-gpio" as separate compatible for devices that uses it
> >>>> - Remove label from example
> >>>> - Add default entry for #gpio-lines property
> >>>> - Add new compatible string details in commit message
> >>>> ---
> >>>> .../bindings/gpio/atmel,at91rm9200-gpio.yaml | 81 +++++++++++++++++++
> >>>> .../devicetree/bindings/gpio/gpio_atmel.txt | 31 -------
> >>>> 2 files changed, 81 insertions(+), 31 deletions(-)
> >>>> create mode 100644 Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml
> >>>> delete mode 100644 Documentation/devicetree/bindings/gpio/gpio_atmel.txt
> >>>>
> >>>> diff --git a/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml b/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml
> >>>> new file mode 100644
> >>>> index 000000000000..3dd70933ed8e
> >>>> --- /dev/null
> >>>> +++ b/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml
> >>>> @@ -0,0 +1,81 @@
> >>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> >>>> +%YAML 1.2
> >>>> +---
> >>>> +$id:http://devicetree.org/schemas/gpio/atmel,at91rm9200-gpio.yaml#
> >>>> +$schema:http://devicetree.org/meta-schemas/core.yaml#
> >>>> +
> >>>> +title: Microchip GPIO controller (PIO)
> >>>> +
> >>>> +maintainers:
> >>>> + - Manikandan Muralidharan<manikandan.m@microchip.com>
> >>>> +
> >>>> +properties:
> >>>> + compatible:
> >>>> + oneOf:
> >>>> + - items:
> >>>> + - enum:
> >>>> + - atmel,at91sam9x5-gpio
> >>>> + - microchip,sam9x60-gpio
> >>>> + - const: atmel,at91rm9200-gpio
> >>>> + - items:
> >>>> + - enum:
> >>>> + - microchip,sam9x7-gpio
> >>>> + - const: microchip,sam9x60-gpio
> >>>> + - const: atmel,at91rm9200-gpio
> >>> It's worth pointing out that this is required, because the driver
> >>> implements a different set of ops for the sam9x60. There's not just more
> >>> of them, they're different too.
> >>> Are the sam9x60 and at91rm9200 are actually compatible, or is the
> >>> fallback here some mistake that originated in the dts?
> >>>
> >> The PIO3 pinctrl driver uses the compatible "atmel,at91rm9200-gpio" to
> >> find the number of active GPIO banks and also to differentiate them from
> >> the pinmux child nodes.The driver probe fails if the at91rm9200 is not
> >> present in the GPIO bank compatible property list.
> >> For sam9x7, "microchip,sam9x60-gpio" is used as the fallback compatible
> >> and "atmel,at91rm9200-gpio" is added by default to avoid probe issues
> >> and help find the number of GPIO banks by the driver.
> > That's unfortunately not what I asked. Forget about
> > at91_pinctrl_child_count() for a minute and answer the question again:
> > Are the sam9x60 and at91rm9200 actually compatible?
> >
> > Hints:
> > - Do the registers that are in the at91rm9200 have the same behaviour in
> > the sam9x60?
> The registers in at91rm9200 have the same behavior as sam9x60 expect
> that the former supports only 2 Peripheral function per pin while
> sam9x60 supports 4.
> > - Are the new registers in sam9x60 optional, so that if all sam9x60 code
> > was deleted from the driver, the driver would still work for the subset
> > of features that the at91rm9200 already supports?
> at91rm9200 function will work for sam9x60 but not up-to its full
> potential.The new registers in sam9x60 for drive-strength, slew-rate,
> debounce, pull-down will help drive the the current pinmux configs for
> sam9x60/9x7 board DT.
Right. The compatible setup makes sense then, just an explanation for
why should go into your commit message.
Thanks,
Conor.
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 4/5] dt-bindings: gpio: convert Atmel GPIO to json-schema
2024-06-27 15:42 ` Conor Dooley
@ 2024-06-27 15:44 ` Conor Dooley
0 siblings, 0 replies; 16+ messages in thread
From: Conor Dooley @ 2024-06-27 15:44 UTC (permalink / raw)
To: Manikandan.M
Cc: linus.walleij, brgl, robh, krzk+dt, conor+dt, Nicolas.Ferre,
alexandre.belloni, claudiu.beznea, arnd, Durai.ManickamKR,
linux-gpio, devicetree, linux-arm-kernel, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 2609 bytes --]
On Thu, Jun 27, 2024 at 04:42:24PM +0100, Conor Dooley wrote:
> > >>>> +properties:
> > >>>> + compatible:
> > >>>> + oneOf:
> > >>>> + - items:
> > >>>> + - enum:
> > >>>> + - atmel,at91sam9x5-gpio
> > >>>> + - microchip,sam9x60-gpio
> > >>>> + - const: atmel,at91rm9200-gpio
> > >>>> + - items:
> > >>>> + - enum:
> > >>>> + - microchip,sam9x7-gpio
> > >>>> + - const: microchip,sam9x60-gpio
> > >>>> + - const: atmel,at91rm9200-gpio
> > >>> It's worth pointing out that this is required, because the driver
> > >>> implements a different set of ops for the sam9x60. There's not just more
> > >>> of them, they're different too.
> > >>> Are the sam9x60 and at91rm9200 are actually compatible, or is the
> > >>> fallback here some mistake that originated in the dts?
> > >>>
> > >> The PIO3 pinctrl driver uses the compatible "atmel,at91rm9200-gpio" to
> > >> find the number of active GPIO banks and also to differentiate them from
> > >> the pinmux child nodes.The driver probe fails if the at91rm9200 is not
> > >> present in the GPIO bank compatible property list.
> > >> For sam9x7, "microchip,sam9x60-gpio" is used as the fallback compatible
> > >> and "atmel,at91rm9200-gpio" is added by default to avoid probe issues
> > >> and help find the number of GPIO banks by the driver.
> > > That's unfortunately not what I asked. Forget about
> > > at91_pinctrl_child_count() for a minute and answer the question again:
> > > Are the sam9x60 and at91rm9200 actually compatible?
> > >
> > > Hints:
> > > - Do the registers that are in the at91rm9200 have the same behaviour in
> > > the sam9x60?
> > The registers in at91rm9200 have the same behavior as sam9x60 expect
> > that the former supports only 2 Peripheral function per pin while
> > sam9x60 supports 4.
> > > - Are the new registers in sam9x60 optional, so that if all sam9x60 code
> > > was deleted from the driver, the driver would still work for the subset
> > > of features that the at91rm9200 already supports?
> > at91rm9200 function will work for sam9x60 but not up-to its full
> > potential.The new registers in sam9x60 for drive-strength, slew-rate,
> > debounce, pull-down will help drive the the current pinmux configs for
> > sam9x60/9x7 board DT.
>
> Right. The compatible setup makes sense then, just an explanation for
> why should go into your commit message.
Gah, I forgot to say, with that:
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Thanks,
Conor.
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v2 5/5] dt-bindings: pinctrl: Convert Atmel PIO3 pinctrl to json-schema
2024-06-25 4:35 [PATCH v2 0/5] Convert Atmel PIO3 Pinctrl and GPIO bindings to yaml Manikandan Muralidharan
` (3 preceding siblings ...)
2024-06-25 4:35 ` [PATCH v2 4/5] dt-bindings: gpio: convert Atmel GPIO to json-schema Manikandan Muralidharan
@ 2024-06-25 4:35 ` Manikandan Muralidharan
2024-07-01 15:03 ` Rob Herring
2024-06-26 12:08 ` [PATCH v2 0/5] Convert Atmel PIO3 Pinctrl and GPIO bindings to yaml Linus Walleij
5 siblings, 1 reply; 16+ messages in thread
From: Manikandan Muralidharan @ 2024-06-25 4:35 UTC (permalink / raw)
To: linus.walleij, brgl, robh, krzk+dt, conor+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea, arnd, durai.manickamkr,
linux-gpio, devicetree, linux-arm-kernel, linux-kernel
Cc: manikandan.m
Convert Atmel PIO3 pinctrl binding document to DT schema format
json-schema.
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
---
changes in v2:
- Fix bot errors by fixing issues in 4/5
- remove qoutes from $ref
---
.../bindings/pinctrl/atmel,at91-pinctrl.txt | 178 ----------------
.../pinctrl/atmel,at91rm9200-pinctrl.yaml | 194 ++++++++++++++++++
2 files changed, 194 insertions(+), 178 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
create mode 100644 Documentation/devicetree/bindings/pinctrl/atmel,at91rm9200-pinctrl.yaml
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
deleted file mode 100644
index 0aa1a53012d6..000000000000
--- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
+++ /dev/null
@@ -1,178 +0,0 @@
-* Atmel AT91 Pinmux Controller
-
-The AT91 Pinmux Controller, enables the IC
-to share one PAD to several functional blocks. The sharing is done by
-multiplexing the PAD input/output signals. For each PAD there are up to
-8 muxing options (called periph modes). Since different modules require
-different PAD settings (like pull up, keeper, etc) the controller controls
-also the PAD settings parameters.
-
-Please refer to pinctrl-bindings.txt in this directory for details of the
-common pinctrl bindings used by client devices, including the meaning of the
-phrase "pin configuration node".
-
-Atmel AT91 pin configuration node is a node of a group of pins which can be
-used for a specific device or function. This node represents both mux and config
-of the pins in that group. The 'pins' selects the function mode(also named pin
-mode) this pin can work on and the 'config' configures various pad settings
-such as pull-up, multi drive, etc.
-
-Required properties for iomux controller:
-- compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl"
- or "atmel,sama5d3-pinctrl" or "microchip,sam9x60-pinctrl"
- or "microchip,sam9x7-pinctrl", "microchip,sam9x60-pinctrl"
-- atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
- configured in this periph mode. All the periph and bank need to be describe.
-
-How to create such array:
-
-Each column will represent the possible peripheral of the pinctrl
-Each line will represent a pio bank
-
-Take an example on the 9260
-Peripheral: 2 ( A and B)
-Bank: 3 (A, B and C)
-=>
-
- /* A B */
- 0xffffffff 0xffc00c3b /* pioA */
- 0xffffffff 0x7fff3ccf /* pioB */
- 0xffffffff 0x007fffff /* pioC */
-
-For each peripheral/bank we will describe in a u32 if a pin can be
-configured in it by putting 1 to the pin bit (1 << pin)
-
-Let's take the pioA on peripheral B
-From the datasheet Table 10-2.
-Peripheral B
-PA0 MCDB0
-PA1 MCCDB
-PA2
-PA3 MCDB3
-PA4 MCDB2
-PA5 MCDB1
-PA6
-PA7
-PA8
-PA9
-PA10 ETX2
-PA11 ETX3
-PA12
-PA13
-PA14
-PA15
-PA16
-PA17
-PA18
-PA19
-PA20
-PA21
-PA22 ETXER
-PA23 ETX2
-PA24 ETX3
-PA25 ERX2
-PA26 ERX3
-PA27 ERXCK
-PA28 ECRS
-PA29 ECOL
-PA30 RXD4
-PA31 TXD4
-
-=> 0xffc00c3b
-
-Required properties for pin configuration node:
-- atmel,pins: 4 integers array, represents a group of pins mux and config
- setting. The format is atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
- The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B...
- PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...
-
-Bits used for CONFIG:
-PULL_UP (1 << 0): indicate this pin needs a pull up.
-MULTIDRIVE (1 << 1): indicate this pin needs to be configured as multi-drive.
- Multi-drive is equivalent to open-drain type output.
-DEGLITCH (1 << 2): indicate this pin needs deglitch.
-PULL_DOWN (1 << 3): indicate this pin needs a pull down.
-DIS_SCHMIT (1 << 4): indicate this pin needs to the disable schmitt trigger.
-DRIVE_STRENGTH (3 << 5): indicate the drive strength of the pin using the
- following values:
- 00 - No change (reset state value kept)
- 01 - Low
- 10 - Medium
- 11 - High
-OUTPUT (1 << 7): indicate this pin need to be configured as an output.
-OUTPUT_VAL (1 << 8): output val (1 = high, 0 = low)
-SLEWRATE (1 << 9): slew rate of the pin: 0 = disable, 1 = enable
-DEBOUNCE (1 << 16): indicate this pin needs debounce.
-DEBOUNCE_VAL (0x3fff << 17): debounce value.
-
-NOTE:
-Some requirements for using atmel,at91rm9200-pinctrl binding:
-1. We have pin function node defined under at91 controller node to represent
- what pinmux functions this SoC supports.
-2. The driver can use the function node's name and pin configuration node's
- name describe the pin function and group hierarchy.
- For example, Linux at91 pinctrl driver takes the function node's name
- as the function name and pin configuration node's name as group name to
- create the map table.
-3. Each pin configuration node should have a phandle, devices can set pins
- configurations by referring to the phandle of that pin configuration node.
-4. The gpio controller must be describe in the pinctrl simple-bus.
-
-For each bank the required properties are:
-- compatible: "atmel,at91sam9x5-gpio" or "atmel,at91rm9200-gpio" or
- "microchip,sam9x60-gpio"
- or "microchip,sam9x7-gpio", "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio"
-- reg: physical base address and length of the controller's registers
-- interrupts: interrupt outputs from the controller
-- interrupt-controller: marks the device node as an interrupt controller
-- #interrupt-cells: should be 2; refer to ../interrupt-controller/interrupts.txt
- for more details.
-- gpio-controller
-- #gpio-cells: should be 2; the first cell is the GPIO number and the second
- cell specifies GPIO flags as defined in <dt-bindings/gpio/gpio.h>.
-- clocks: bank clock
-
-Examples:
-
-pinctrl@fffff400 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
- reg = <0xfffff400 0x600>;
-
- pioA: gpio@fffff400 {
- compatible = "atmel,at91sam9x5-gpio";
- reg = <0xfffff400 0x200>;
- interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
- };
-
- atmel,mux-mask = <
- /* A B */
- 0xffffffff 0xffc00c3b /* pioA */
- 0xffffffff 0x7fff3ccf /* pioB */
- 0xffffffff 0x007fffff /* pioC */
- >;
-
- /* shared pinctrl settings */
- dbgu {
- pinctrl_dbgu: dbgu-0 {
- atmel,pins =
- <1 14 0x1 0x0 /* PB14 periph A */
- 1 15 0x1 0x1>; /* PB15 periph A with pullup */
- };
- };
-};
-
-dbgu: serial@fffff200 {
- compatible = "atmel,at91sam9260-usart";
- reg = <0xfffff200 0x200>;
- interrupts = <1 4 7>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_dbgu>;
-};
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91rm9200-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/atmel,at91rm9200-pinctrl.yaml
new file mode 100644
index 000000000000..0ed71e22384c
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91rm9200-pinctrl.yaml
@@ -0,0 +1,194 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/atmel,at91rm9200-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip PIO3 Pinmux Controller
+
+maintainers:
+ - Manikandan Muralidharan <manikandan.m@microchip.com>
+
+description:
+ The AT91 Pinmux Controller, enables the IC to share one PAD to several
+ functional blocks. The sharing is done by multiplexing the PAD input/output
+ signals. For each PAD there are up to 8 muxing options (called periph modes).
+ Since different modules require different PAD settings (like pull up, keeper,
+ etc) the controller controls also the PAD settings parameters.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - atmel,at91rm9200-pinctrl
+ - atmel,at91sam9x5-pinctrl
+ - atmel,sama5d3-pinctrl
+ - microchip,sam9x60-pinctrl
+ - const: simple-mfd
+ - items:
+ - enum:
+ - microchip,sam9x7-pinctrl
+ - const: microchip,sam9x60-pinctrl
+ - const: simple-mfd
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 1
+
+ ranges: true
+
+ atmel,mux-mask:
+ $ref: /schemas/types.yaml#/definitions/uint32-matrix
+ description: |
+ Array of mask (periph per bank) to describe if a pin can be
+ configured in this periph mode. All the periph and bank need to
+ be described.
+
+ #How to create such array:
+
+ Each column will represent the possible peripheral of the pinctrl
+ Each line will represent a pio bank
+
+ #Example:
+
+ In at91sam9260.dtsi,
+ Peripheral: 2 ( A and B)
+ Bank: 3 (A, B and C)
+
+ # A B
+ 0xffffffff 0xffc00c3b # pioA
+ 0xffffffff 0x7fff3ccf # pioB
+ 0xffffffff 0x007fffff # pioC
+
+ For each peripheral/bank we will describe in a u32 if a pin can be
+ configured in it by putting 1 to the pin bit (1 << pin)
+
+ Let's take the pioA on peripheral B whose value is 0xffc00c3b
+ From the datasheet Table 10-2.
+ Peripheral B
+ PA0 MCDB0
+ PA1 MCCDB
+ PA2
+ PA3 MCDB3
+ PA4 MCDB2
+ PA5 MCDB1
+ PA6
+ PA7
+ PA8
+ PA9
+ PA10 ETX2
+ PA11 ETX3
+ PA12
+ PA13
+ PA14
+ PA15
+ PA16
+ PA17
+ PA18
+ PA19
+ PA20
+ PA21
+ PA22 ETXER
+ PA23 ETX2
+ PA24 ETX3
+ PA25 ERX2
+ PA26 ERX3
+ PA27 ERXCK
+ PA28 ECRS
+ PA29 ECOL
+ PA30 RXD4
+ PA31 TXD4
+
+patternProperties:
+ '^[a-z0-9-_]+$':
+ description:
+ A pinctrl node should contain at least one subnode representing the
+ pinctrl group available on the machine.
+ additionalProperties: false
+
+ patternProperties:
+ '^[a-z0-9-_]+$':
+ type: object
+ properties:
+ atmel,pins:
+ $ref: /schemas/types.yaml#/definitions/uint32-matrix
+ description: |
+ Each entry consists of 4 integers and represents the pins
+ mux and config setting.The format is
+ atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
+ Supported pin number and mux varies for different SoCs, and
+ are defined in <include/dt-bindings/pinctrl/at91.h>.
+ items:
+ items:
+ - description:
+ Pin bank
+ - description:
+ Pin bank index
+ - description:
+ Peripheral function
+ - description:
+ Pad configuration
+
+ required:
+ - atmel,pins
+
+ additionalProperties: false
+
+ 'gpio@[0-9a-f]*$':
+ $ref: "/schemas/gpio/atmel,at91rm9200-gpio.yaml"
+ unevaluatedProperties: false
+
+allOf:
+ - $ref: pinctrl.yaml#
+
+required:
+ - compatible
+ - ranges
+ - "#address-cells"
+ - "#size-cells"
+ - atmel,mux-mask
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/at91.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/pinctrl/at91.h>
+
+ pinctrl@fffff400 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "atmel,at91rm9200-pinctrl", "simple-mfd";
+ ranges = <0xfffff400 0xfffff400 0x600>;
+
+ atmel,mux-mask = <
+ /* A B */
+ 0xffffffff 0xffc00c3b /* pioA */
+ 0xffffffff 0x7fff3ccf /* pioB */
+ 0xffffffff 0x007fffff /* pioC */
+ >;
+
+ dbgu {
+ pinctrl_dbgu: dbgu-0 {
+ atmel,pins =
+ <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+ AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ pioA: gpio@fffff400 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff400 0x200>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
+ };
+ };
+...
--
2.25.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH v2 5/5] dt-bindings: pinctrl: Convert Atmel PIO3 pinctrl to json-schema
2024-06-25 4:35 ` [PATCH v2 5/5] dt-bindings: pinctrl: Convert Atmel PIO3 pinctrl " Manikandan Muralidharan
@ 2024-07-01 15:03 ` Rob Herring
2024-07-02 4:54 ` Manikandan.M
2024-07-09 9:21 ` Manikandan.M
0 siblings, 2 replies; 16+ messages in thread
From: Rob Herring @ 2024-07-01 15:03 UTC (permalink / raw)
To: Manikandan Muralidharan
Cc: linus.walleij, brgl, krzk+dt, conor+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea, arnd, durai.manickamkr,
linux-gpio, devicetree, linux-arm-kernel, linux-kernel
On Tue, Jun 25, 2024 at 10:05:25AM +0530, Manikandan Muralidharan wrote:
> Convert Atmel PIO3 pinctrl binding document to DT schema format
> json-schema.
>
> Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
> ---
> changes in v2:
>
> - Fix bot errors by fixing issues in 4/5
> - remove qoutes from $ref
> ---
> .../bindings/pinctrl/atmel,at91-pinctrl.txt | 178 ----------------
> .../pinctrl/atmel,at91rm9200-pinctrl.yaml | 194 ++++++++++++++++++
> 2 files changed, 194 insertions(+), 178 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
> create mode 100644 Documentation/devicetree/bindings/pinctrl/atmel,at91rm9200-pinctrl.yaml
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
> deleted file mode 100644
> index 0aa1a53012d6..000000000000
> --- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
> +++ /dev/null
> @@ -1,178 +0,0 @@
> -* Atmel AT91 Pinmux Controller
> -
> -The AT91 Pinmux Controller, enables the IC
> -to share one PAD to several functional blocks. The sharing is done by
> -multiplexing the PAD input/output signals. For each PAD there are up to
> -8 muxing options (called periph modes). Since different modules require
> -different PAD settings (like pull up, keeper, etc) the controller controls
> -also the PAD settings parameters.
> -
> -Please refer to pinctrl-bindings.txt in this directory for details of the
> -common pinctrl bindings used by client devices, including the meaning of the
> -phrase "pin configuration node".
> -
> -Atmel AT91 pin configuration node is a node of a group of pins which can be
> -used for a specific device or function. This node represents both mux and config
> -of the pins in that group. The 'pins' selects the function mode(also named pin
> -mode) this pin can work on and the 'config' configures various pad settings
> -such as pull-up, multi drive, etc.
> -
> -Required properties for iomux controller:
> -- compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl"
> - or "atmel,sama5d3-pinctrl" or "microchip,sam9x60-pinctrl"
> - or "microchip,sam9x7-pinctrl", "microchip,sam9x60-pinctrl"
> -- atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
> - configured in this periph mode. All the periph and bank need to be describe.
> -
> -How to create such array:
> -
> -Each column will represent the possible peripheral of the pinctrl
> -Each line will represent a pio bank
> -
> -Take an example on the 9260
> -Peripheral: 2 ( A and B)
> -Bank: 3 (A, B and C)
> -=>
> -
> - /* A B */
> - 0xffffffff 0xffc00c3b /* pioA */
> - 0xffffffff 0x7fff3ccf /* pioB */
> - 0xffffffff 0x007fffff /* pioC */
> -
> -For each peripheral/bank we will describe in a u32 if a pin can be
> -configured in it by putting 1 to the pin bit (1 << pin)
> -
> -Let's take the pioA on peripheral B
> -From the datasheet Table 10-2.
> -Peripheral B
> -PA0 MCDB0
> -PA1 MCCDB
> -PA2
> -PA3 MCDB3
> -PA4 MCDB2
> -PA5 MCDB1
> -PA6
> -PA7
> -PA8
> -PA9
> -PA10 ETX2
> -PA11 ETX3
> -PA12
> -PA13
> -PA14
> -PA15
> -PA16
> -PA17
> -PA18
> -PA19
> -PA20
> -PA21
> -PA22 ETXER
> -PA23 ETX2
> -PA24 ETX3
> -PA25 ERX2
> -PA26 ERX3
> -PA27 ERXCK
> -PA28 ECRS
> -PA29 ECOL
> -PA30 RXD4
> -PA31 TXD4
> -
> -=> 0xffc00c3b
> -
> -Required properties for pin configuration node:
> -- atmel,pins: 4 integers array, represents a group of pins mux and config
> - setting. The format is atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
> - The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B...
> - PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...
> -
> -Bits used for CONFIG:
> -PULL_UP (1 << 0): indicate this pin needs a pull up.
> -MULTIDRIVE (1 << 1): indicate this pin needs to be configured as multi-drive.
> - Multi-drive is equivalent to open-drain type output.
> -DEGLITCH (1 << 2): indicate this pin needs deglitch.
> -PULL_DOWN (1 << 3): indicate this pin needs a pull down.
> -DIS_SCHMIT (1 << 4): indicate this pin needs to the disable schmitt trigger.
> -DRIVE_STRENGTH (3 << 5): indicate the drive strength of the pin using the
> - following values:
> - 00 - No change (reset state value kept)
> - 01 - Low
> - 10 - Medium
> - 11 - High
> -OUTPUT (1 << 7): indicate this pin need to be configured as an output.
> -OUTPUT_VAL (1 << 8): output val (1 = high, 0 = low)
> -SLEWRATE (1 << 9): slew rate of the pin: 0 = disable, 1 = enable
> -DEBOUNCE (1 << 16): indicate this pin needs debounce.
> -DEBOUNCE_VAL (0x3fff << 17): debounce value.
> -
> -NOTE:
> -Some requirements for using atmel,at91rm9200-pinctrl binding:
> -1. We have pin function node defined under at91 controller node to represent
> - what pinmux functions this SoC supports.
> -2. The driver can use the function node's name and pin configuration node's
> - name describe the pin function and group hierarchy.
> - For example, Linux at91 pinctrl driver takes the function node's name
> - as the function name and pin configuration node's name as group name to
> - create the map table.
> -3. Each pin configuration node should have a phandle, devices can set pins
> - configurations by referring to the phandle of that pin configuration node.
> -4. The gpio controller must be describe in the pinctrl simple-bus.
> -
> -For each bank the required properties are:
> -- compatible: "atmel,at91sam9x5-gpio" or "atmel,at91rm9200-gpio" or
> - "microchip,sam9x60-gpio"
> - or "microchip,sam9x7-gpio", "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio"
> -- reg: physical base address and length of the controller's registers
> -- interrupts: interrupt outputs from the controller
> -- interrupt-controller: marks the device node as an interrupt controller
> -- #interrupt-cells: should be 2; refer to ../interrupt-controller/interrupts.txt
> - for more details.
> -- gpio-controller
> -- #gpio-cells: should be 2; the first cell is the GPIO number and the second
> - cell specifies GPIO flags as defined in <dt-bindings/gpio/gpio.h>.
> -- clocks: bank clock
> -
> -Examples:
> -
> -pinctrl@fffff400 {
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges;
> - compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
> - reg = <0xfffff400 0x600>;
> -
> - pioA: gpio@fffff400 {
> - compatible = "atmel,at91sam9x5-gpio";
> - reg = <0xfffff400 0x200>;
> - interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - interrupt-controller;
> - #interrupt-cells = <2>;
> - clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
> - };
> -
> - atmel,mux-mask = <
> - /* A B */
> - 0xffffffff 0xffc00c3b /* pioA */
> - 0xffffffff 0x7fff3ccf /* pioB */
> - 0xffffffff 0x007fffff /* pioC */
> - >;
> -
> - /* shared pinctrl settings */
> - dbgu {
> - pinctrl_dbgu: dbgu-0 {
> - atmel,pins =
> - <1 14 0x1 0x0 /* PB14 periph A */
> - 1 15 0x1 0x1>; /* PB15 periph A with pullup */
> - };
> - };
> -};
> -
> -dbgu: serial@fffff200 {
> - compatible = "atmel,at91sam9260-usart";
> - reg = <0xfffff200 0x200>;
> - interrupts = <1 4 7>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_dbgu>;
> -};
> diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91rm9200-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/atmel,at91rm9200-pinctrl.yaml
> new file mode 100644
> index 000000000000..0ed71e22384c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91rm9200-pinctrl.yaml
> @@ -0,0 +1,194 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pinctrl/atmel,at91rm9200-pinctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip PIO3 Pinmux Controller
> +
> +maintainers:
> + - Manikandan Muralidharan <manikandan.m@microchip.com>
> +
> +description:
> + The AT91 Pinmux Controller, enables the IC to share one PAD to several
> + functional blocks. The sharing is done by multiplexing the PAD input/output
> + signals. For each PAD there are up to 8 muxing options (called periph modes).
> + Since different modules require different PAD settings (like pull up, keeper,
> + etc) the controller controls also the PAD settings parameters.
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - atmel,at91rm9200-pinctrl
> + - atmel,at91sam9x5-pinctrl
> + - atmel,sama5d3-pinctrl
> + - microchip,sam9x60-pinctrl
> + - const: simple-mfd
> + - items:
> + - enum:
> + - microchip,sam9x7-pinctrl
> + - const: microchip,sam9x60-pinctrl
> + - const: simple-mfd
> +
> + '#address-cells':
> + const: 1
> +
> + '#size-cells':
> + const: 1
> +
> + ranges: true
> +
> + atmel,mux-mask:
> + $ref: /schemas/types.yaml#/definitions/uint32-matrix
Is there no constraint on the dimensions? Always sets of 2 or 3 entries?
Maybe better to not specify because the tools have some issues if the
dimensions are variable.
> + description: |
> + Array of mask (periph per bank) to describe if a pin can be
> + configured in this periph mode. All the periph and bank need to
> + be described.
> +
> + #How to create such array:
> +
> + Each column will represent the possible peripheral of the pinctrl
> + Each line will represent a pio bank
> +
> + #Example:
> +
> + In at91sam9260.dtsi,
> + Peripheral: 2 ( A and B)
> + Bank: 3 (A, B and C)
> +
> + # A B
> + 0xffffffff 0xffc00c3b # pioA
> + 0xffffffff 0x7fff3ccf # pioB
> + 0xffffffff 0x007fffff # pioC
> +
> + For each peripheral/bank we will describe in a u32 if a pin can be
> + configured in it by putting 1 to the pin bit (1 << pin)
> +
> + Let's take the pioA on peripheral B whose value is 0xffc00c3b
> + From the datasheet Table 10-2.
> + Peripheral B
> + PA0 MCDB0
> + PA1 MCCDB
> + PA2
> + PA3 MCDB3
> + PA4 MCDB2
> + PA5 MCDB1
> + PA6
> + PA7
> + PA8
> + PA9
> + PA10 ETX2
> + PA11 ETX3
> + PA12
> + PA13
> + PA14
> + PA15
> + PA16
> + PA17
> + PA18
> + PA19
> + PA20
> + PA21
> + PA22 ETXER
> + PA23 ETX2
> + PA24 ETX3
> + PA25 ERX2
> + PA26 ERX3
> + PA27 ERXCK
> + PA28 ECRS
> + PA29 ECOL
> + PA30 RXD4
> + PA31 TXD4
> +
> +patternProperties:
> + '^[a-z0-9-_]+$':
> + description:
> + A pinctrl node should contain at least one subnode representing the
> + pinctrl group available on the machine.
type: object
> + additionalProperties: false
> +
> + patternProperties:
> + '^[a-z0-9-_]+$':
> + type: object
> + properties:
> + atmel,pins:
> + $ref: /schemas/types.yaml#/definitions/uint32-matrix
> + description: |
> + Each entry consists of 4 integers and represents the pins
> + mux and config setting.The format is
> + atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
> + Supported pin number and mux varies for different SoCs, and
> + are defined in <include/dt-bindings/pinctrl/at91.h>.
> + items:
> + items:
> + - description:
> + Pin bank
> + - description:
> + Pin bank index
> + - description:
> + Peripheral function
> + - description:
> + Pad configuration
> +
> + required:
> + - atmel,pins
> +
> + additionalProperties: false
> +
> + 'gpio@[0-9a-f]*$':
'*' means 0 or more. You need '+' for 1 or more
> + $ref: "/schemas/gpio/atmel,at91rm9200-gpio.yaml"
Don't need quotes. yamllint should have told you this.
> + unevaluatedProperties: false
> +
> +allOf:
> + - $ref: pinctrl.yaml#
> +
> +required:
> + - compatible
> + - ranges
> + - "#address-cells"
> + - "#size-cells"
> + - atmel,mux-mask
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/at91.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/pinctrl/at91.h>
> +
> + pinctrl@fffff400 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "atmel,at91rm9200-pinctrl", "simple-mfd";
> + ranges = <0xfffff400 0xfffff400 0x600>;
> +
> + atmel,mux-mask = <
> + /* A B */
> + 0xffffffff 0xffc00c3b /* pioA */
> + 0xffffffff 0x7fff3ccf /* pioB */
> + 0xffffffff 0x007fffff /* pioC */
> + >;
> +
> + dbgu {
> + pinctrl_dbgu: dbgu-0 {
> + atmel,pins =
> + <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
> + AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> + };
> +
> + pioA: gpio@fffff400 {
> + compatible = "atmel,at91rm9200-gpio";
> + reg = <0xfffff400 0x200>;
> + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
> + };
> + };
> +...
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH v2 5/5] dt-bindings: pinctrl: Convert Atmel PIO3 pinctrl to json-schema
2024-07-01 15:03 ` Rob Herring
@ 2024-07-02 4:54 ` Manikandan.M
2024-07-09 9:21 ` Manikandan.M
1 sibling, 0 replies; 16+ messages in thread
From: Manikandan.M @ 2024-07-02 4:54 UTC (permalink / raw)
To: robh
Cc: linus.walleij, brgl, krzk+dt, conor+dt, Nicolas.Ferre,
alexandre.belloni, claudiu.beznea, arnd, Durai.ManickamKR,
linux-gpio, devicetree, linux-arm-kernel, linux-kernel
Hi Rob,
On 01/07/24 8:33 pm, Rob Herring wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Tue, Jun 25, 2024 at 10:05:25AM +0530, Manikandan Muralidharan wrote:
>> Convert Atmel PIO3 pinctrl binding document to DT schema format
>> json-schema.
>>
>> Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
>> ---
>> changes in v2:
>>
>> - Fix bot errors by fixing issues in 4/5
>> - remove qoutes from $ref
>> ---
>> .../bindings/pinctrl/atmel,at91-pinctrl.txt | 178 ----------------
>> .../pinctrl/atmel,at91rm9200-pinctrl.yaml | 194 ++++++++++++++++++
>> 2 files changed, 194 insertions(+), 178 deletions(-)
>> delete mode 100644 Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
>> create mode 100644 Documentation/devicetree/bindings/pinctrl/atmel,at91rm9200-pinctrl.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
>> deleted file mode 100644
>> index 0aa1a53012d6..000000000000
>> --- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
>> +++ /dev/null
>> @@ -1,178 +0,0 @@
>> -* Atmel AT91 Pinmux Controller
>> -
>> -The AT91 Pinmux Controller, enables the IC
>> -to share one PAD to several functional blocks. The sharing is done by
>> -multiplexing the PAD input/output signals. For each PAD there are up to
>> -8 muxing options (called periph modes). Since different modules require
>> -different PAD settings (like pull up, keeper, etc) the controller controls
>> -also the PAD settings parameters.
>> -
>> -Please refer to pinctrl-bindings.txt in this directory for details of the
>> -common pinctrl bindings used by client devices, including the meaning of the
>> -phrase "pin configuration node".
>> -
>> -Atmel AT91 pin configuration node is a node of a group of pins which can be
>> -used for a specific device or function. This node represents both mux and config
>> -of the pins in that group. The 'pins' selects the function mode(also named pin
>> -mode) this pin can work on and the 'config' configures various pad settings
>> -such as pull-up, multi drive, etc.
>> -
>> -Required properties for iomux controller:
>> -- compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl"
>> - or "atmel,sama5d3-pinctrl" or "microchip,sam9x60-pinctrl"
>> - or "microchip,sam9x7-pinctrl", "microchip,sam9x60-pinctrl"
>> -- atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
>> - configured in this periph mode. All the periph and bank need to be describe.
>> -
>> -How to create such array:
>> -
>> -Each column will represent the possible peripheral of the pinctrl
>> -Each line will represent a pio bank
>> -
>> -Take an example on the 9260
>> -Peripheral: 2 ( A and B)
>> -Bank: 3 (A, B and C)
>> -=>
>> -
>> - /* A B */
>> - 0xffffffff 0xffc00c3b /* pioA */
>> - 0xffffffff 0x7fff3ccf /* pioB */
>> - 0xffffffff 0x007fffff /* pioC */
>> -
>> -For each peripheral/bank we will describe in a u32 if a pin can be
>> -configured in it by putting 1 to the pin bit (1 << pin)
>> -
>> -Let's take the pioA on peripheral B
>> -From the datasheet Table 10-2.
>> -Peripheral B
>> -PA0 MCDB0
>> -PA1 MCCDB
>> -PA2
>> -PA3 MCDB3
>> -PA4 MCDB2
>> -PA5 MCDB1
>> -PA6
>> -PA7
>> -PA8
>> -PA9
>> -PA10 ETX2
>> -PA11 ETX3
>> -PA12
>> -PA13
>> -PA14
>> -PA15
>> -PA16
>> -PA17
>> -PA18
>> -PA19
>> -PA20
>> -PA21
>> -PA22 ETXER
>> -PA23 ETX2
>> -PA24 ETX3
>> -PA25 ERX2
>> -PA26 ERX3
>> -PA27 ERXCK
>> -PA28 ECRS
>> -PA29 ECOL
>> -PA30 RXD4
>> -PA31 TXD4
>> -
>> -=> 0xffc00c3b
>> -
>> -Required properties for pin configuration node:
>> -- atmel,pins: 4 integers array, represents a group of pins mux and config
>> - setting. The format is atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
>> - The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B...
>> - PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...
>> -
>> -Bits used for CONFIG:
>> -PULL_UP (1 << 0): indicate this pin needs a pull up.
>> -MULTIDRIVE (1 << 1): indicate this pin needs to be configured as multi-drive.
>> - Multi-drive is equivalent to open-drain type output.
>> -DEGLITCH (1 << 2): indicate this pin needs deglitch.
>> -PULL_DOWN (1 << 3): indicate this pin needs a pull down.
>> -DIS_SCHMIT (1 << 4): indicate this pin needs to the disable schmitt trigger.
>> -DRIVE_STRENGTH (3 << 5): indicate the drive strength of the pin using the
>> - following values:
>> - 00 - No change (reset state value kept)
>> - 01 - Low
>> - 10 - Medium
>> - 11 - High
>> -OUTPUT (1 << 7): indicate this pin need to be configured as an output.
>> -OUTPUT_VAL (1 << 8): output val (1 = high, 0 = low)
>> -SLEWRATE (1 << 9): slew rate of the pin: 0 = disable, 1 = enable
>> -DEBOUNCE (1 << 16): indicate this pin needs debounce.
>> -DEBOUNCE_VAL (0x3fff << 17): debounce value.
>> -
>> -NOTE:
>> -Some requirements for using atmel,at91rm9200-pinctrl binding:
>> -1. We have pin function node defined under at91 controller node to represent
>> - what pinmux functions this SoC supports.
>> -2. The driver can use the function node's name and pin configuration node's
>> - name describe the pin function and group hierarchy.
>> - For example, Linux at91 pinctrl driver takes the function node's name
>> - as the function name and pin configuration node's name as group name to
>> - create the map table.
>> -3. Each pin configuration node should have a phandle, devices can set pins
>> - configurations by referring to the phandle of that pin configuration node.
>> -4. The gpio controller must be describe in the pinctrl simple-bus.
>> -
>> -For each bank the required properties are:
>> -- compatible: "atmel,at91sam9x5-gpio" or "atmel,at91rm9200-gpio" or
>> - "microchip,sam9x60-gpio"
>> - or "microchip,sam9x7-gpio", "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio"
>> -- reg: physical base address and length of the controller's registers
>> -- interrupts: interrupt outputs from the controller
>> -- interrupt-controller: marks the device node as an interrupt controller
>> -- #interrupt-cells: should be 2; refer to ../interrupt-controller/interrupts.txt
>> - for more details.
>> -- gpio-controller
>> -- #gpio-cells: should be 2; the first cell is the GPIO number and the second
>> - cell specifies GPIO flags as defined in <dt-bindings/gpio/gpio.h>.
>> -- clocks: bank clock
>> -
>> -Examples:
>> -
>> -pinctrl@fffff400 {
>> - #address-cells = <1>;
>> - #size-cells = <1>;
>> - ranges;
>> - compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
>> - reg = <0xfffff400 0x600>;
>> -
>> - pioA: gpio@fffff400 {
>> - compatible = "atmel,at91sam9x5-gpio";
>> - reg = <0xfffff400 0x200>;
>> - interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
>> - #gpio-cells = <2>;
>> - gpio-controller;
>> - interrupt-controller;
>> - #interrupt-cells = <2>;
>> - clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
>> - };
>> -
>> - atmel,mux-mask = <
>> - /* A B */
>> - 0xffffffff 0xffc00c3b /* pioA */
>> - 0xffffffff 0x7fff3ccf /* pioB */
>> - 0xffffffff 0x007fffff /* pioC */
>> - >;
>> -
>> - /* shared pinctrl settings */
>> - dbgu {
>> - pinctrl_dbgu: dbgu-0 {
>> - atmel,pins =
>> - <1 14 0x1 0x0 /* PB14 periph A */
>> - 1 15 0x1 0x1>; /* PB15 periph A with pullup */
>> - };
>> - };
>> -};
>> -
>> -dbgu: serial@fffff200 {
>> - compatible = "atmel,at91sam9260-usart";
>> - reg = <0xfffff200 0x200>;
>> - interrupts = <1 4 7>;
>> - pinctrl-names = "default";
>> - pinctrl-0 = <&pinctrl_dbgu>;
>> -};
>> diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91rm9200-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/atmel,at91rm9200-pinctrl.yaml
>> new file mode 100644
>> index 000000000000..0ed71e22384c
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91rm9200-pinctrl.yaml
>> @@ -0,0 +1,194 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/pinctrl/atmel,at91rm9200-pinctrl.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Microchip PIO3 Pinmux Controller
>> +
>> +maintainers:
>> + - Manikandan Muralidharan <manikandan.m@microchip.com>
>> +
>> +description:
>> + The AT91 Pinmux Controller, enables the IC to share one PAD to several
>> + functional blocks. The sharing is done by multiplexing the PAD input/output
>> + signals. For each PAD there are up to 8 muxing options (called periph modes).
>> + Since different modules require different PAD settings (like pull up, keeper,
>> + etc) the controller controls also the PAD settings parameters.
>> +
>> +properties:
>> + compatible:
>> + oneOf:
>> + - items:
>> + - enum:
>> + - atmel,at91rm9200-pinctrl
>> + - atmel,at91sam9x5-pinctrl
>> + - atmel,sama5d3-pinctrl
>> + - microchip,sam9x60-pinctrl
>> + - const: simple-mfd
>> + - items:
>> + - enum:
>> + - microchip,sam9x7-pinctrl
>> + - const: microchip,sam9x60-pinctrl
>> + - const: simple-mfd
>> +
>> + '#address-cells':
>> + const: 1
>> +
>> + '#size-cells':
>> + const: 1
>> +
>> + ranges: true
>> +
>> + atmel,mux-mask:
>> + $ref: /schemas/types.yaml#/definitions/uint32-matrix
>
> Is there no constraint on the dimensions? Always sets of 2 or 3 entries?
>
> Maybe better to not specify because the tools have some issues if the
> dimensions are variable.
>
Yes the mux values are either set of 2 or 3 based on the SoC variants.
Let me what should be omitted here to avoid issues from tools.
>> + description: |
>> + Array of mask (periph per bank) to describe if a pin can be
>> + configured in this periph mode. All the periph and bank need to
>> + be described.
>> +
>> + #How to create such array:
>> +
>> + Each column will represent the possible peripheral of the pinctrl
>> + Each line will represent a pio bank
>> +
>> + #Example:
>> +
>> + In at91sam9260.dtsi,
>> + Peripheral: 2 ( A and B)
>> + Bank: 3 (A, B and C)
>> +
>> + # A B
>> + 0xffffffff 0xffc00c3b # pioA
>> + 0xffffffff 0x7fff3ccf # pioB
>> + 0xffffffff 0x007fffff # pioC
>> +
>> + For each peripheral/bank we will describe in a u32 if a pin can be
>> + configured in it by putting 1 to the pin bit (1 << pin)
>> +
>> + Let's take the pioA on peripheral B whose value is 0xffc00c3b
>> + From the datasheet Table 10-2.
>> + Peripheral B
>> + PA0 MCDB0
>> + PA1 MCCDB
>> + PA2
>> + PA3 MCDB3
>> + PA4 MCDB2
>> + PA5 MCDB1
>> + PA6
>> + PA7
>> + PA8
>> + PA9
>> + PA10 ETX2
>> + PA11 ETX3
>> + PA12
>> + PA13
>> + PA14
>> + PA15
>> + PA16
>> + PA17
>> + PA18
>> + PA19
>> + PA20
>> + PA21
>> + PA22 ETXER
>> + PA23 ETX2
>> + PA24 ETX3
>> + PA25 ERX2
>> + PA26 ERX3
>> + PA27 ERXCK
>> + PA28 ECRS
>> + PA29 ECOL
>> + PA30 RXD4
>> + PA31 TXD4
>> +
>> +patternProperties:
>> + '^[a-z0-9-_]+$':
>> + description:
>> + A pinctrl node should contain at least one subnode representing the
>> + pinctrl group available on the machine.
>
> type: object
>
>> + additionalProperties: false
>> +
>> + patternProperties:
>> + '^[a-z0-9-_]+$':
>> + type: object
>> + properties:
>> + atmel,pins:
>> + $ref: /schemas/types.yaml#/definitions/uint32-matrix
>> + description: |
>> + Each entry consists of 4 integers and represents the pins
>> + mux and config setting.The format is
>> + atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
>> + Supported pin number and mux varies for different SoCs, and
>> + are defined in <include/dt-bindings/pinctrl/at91.h>.
>> + items:
>> + items:
>> + - description:
>> + Pin bank
>> + - description:
>> + Pin bank index
>> + - description:
>> + Peripheral function
>> + - description:
>> + Pad configuration
>> +
>> + required:
>> + - atmel,pins
>> +
>> + additionalProperties: false
>> +
>> + 'gpio@[0-9a-f]*$':
>
> '*' means 0 or more. You need '+' for 1 or more
>
>> + $ref: "/schemas/gpio/atmel,at91rm9200-gpio.yaml"
>
> Don't need quotes. yamllint should have told you this.
>
>> + unevaluatedProperties: false
>> +
>> +allOf:
>> + - $ref: pinctrl.yaml#
>> +
>> +required:
>> + - compatible
>> + - ranges
>> + - "#address-cells"
>> + - "#size-cells"
>> + - atmel,mux-mask
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + #include <dt-bindings/clock/at91.h>
>> + #include <dt-bindings/interrupt-controller/irq.h>
>> + #include <dt-bindings/pinctrl/at91.h>
>> +
>> + pinctrl@fffff400 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "atmel,at91rm9200-pinctrl", "simple-mfd";
>> + ranges = <0xfffff400 0xfffff400 0x600>;
>> +
>> + atmel,mux-mask = <
>> + /* A B */
>> + 0xffffffff 0xffc00c3b /* pioA */
>> + 0xffffffff 0x7fff3ccf /* pioB */
>> + 0xffffffff 0x007fffff /* pioC */
>> + >;
>> +
>> + dbgu {
>> + pinctrl_dbgu: dbgu-0 {
>> + atmel,pins =
>> + <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>> + AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> + };
>> +
>> + pioA: gpio@fffff400 {
>> + compatible = "atmel,at91rm9200-gpio";
>> + reg = <0xfffff400 0x200>;
>> + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
>> + #gpio-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
>> + };
>> + };
>> +...
>> --
>> 2.25.1
>>
--
Thanks and Regards,
Manikandan M.
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH v2 5/5] dt-bindings: pinctrl: Convert Atmel PIO3 pinctrl to json-schema
2024-07-01 15:03 ` Rob Herring
2024-07-02 4:54 ` Manikandan.M
@ 2024-07-09 9:21 ` Manikandan.M
1 sibling, 0 replies; 16+ messages in thread
From: Manikandan.M @ 2024-07-09 9:21 UTC (permalink / raw)
To: robh
Cc: linus.walleij, brgl, krzk+dt, conor+dt, Nicolas.Ferre,
alexandre.belloni, claudiu.beznea, arnd, Durai.ManickamKR,
linux-gpio, devicetree, linux-arm-kernel, linux-kernel
Hi Rob,
On 01/07/24 8:33 pm, Rob Herring wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Tue, Jun 25, 2024 at 10:05:25AM +0530, Manikandan Muralidharan wrote:
>> Convert Atmel PIO3 pinctrl binding document to DT schema format
>> json-schema.
>>
>> Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
>> ---
>> changes in v2:
>>
>> - Fix bot errors by fixing issues in 4/5
>> - remove qoutes from $ref
>> ---
>> .../bindings/pinctrl/atmel,at91-pinctrl.txt | 178 ----------------
>> .../pinctrl/atmel,at91rm9200-pinctrl.yaml | 194 ++++++++++++++++++
>> 2 files changed, 194 insertions(+), 178 deletions(-)
>> delete mode 100644 Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
>> create mode 100644 Documentation/devicetree/bindings/pinctrl/atmel,at91rm9200-pinctrl.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
>> deleted file mode 100644
>> index 0aa1a53012d6..000000000000
>> --- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
>> +++ /dev/null
>> @@ -1,178 +0,0 @@
>> -* Atmel AT91 Pinmux Controller
>> -
>> -The AT91 Pinmux Controller, enables the IC
>> -to share one PAD to several functional blocks. The sharing is done by
>> -multiplexing the PAD input/output signals. For each PAD there are up to
>> -8 muxing options (called periph modes). Since different modules require
>> -different PAD settings (like pull up, keeper, etc) the controller controls
>> -also the PAD settings parameters.
>> -
>> -Please refer to pinctrl-bindings.txt in this directory for details of the
>> -common pinctrl bindings used by client devices, including the meaning of the
>> -phrase "pin configuration node".
>> -
>> +
[ .. ]
>> +patternProperties:
>> + '^[a-z0-9-_]+$':
>> + description:
>> + A pinctrl node should contain at least one subnode representing the
>> + pinctrl group available on the machine.
>
> type: object
>
I tried to add the "type: object" for the above regex pattern and got
hit by DTC_CHK errors,
pinctrl@fffff400: compatible: ['atmel,at91rm9200-pinctrl', 'simple-mfd']
is not of type 'object'
from schema $id:
http://devicetree.org/schemas/pinctrl/atmel,at91rm9200-pinctrl.yaml#
pinctrl@fffff400: ranges: [[0, 1073872896, 12288]] is not of type 'object'
from schema $id:
http://devicetree.org/schemas/pinctrl/atmel,at91rm9200-pinctrl.yaml#
The pinctrl subnode string in the at91 DT's takes any format,
combination of lowercase alphabets or combination of alphabets +
numbers or with some spl characters like '-' or '_' .
No fixed regex format is defined for pinctrl subnode group.
Referring to other SoC yaml files, I have removed the regex for pinmux
subnode in v3 + addressing the other comments.
Kindly have a look, TIA.
>> + additionalProperties: false
>> +
>> + patternProperties:
>> + '^[a-z0-9-_]+$':
>> + type: object
>> + properties:
>> + atmel,pins:
>> + $ref: /schemas/types.yaml#/definitions/uint32-matrix
>> + description: |
>> + Each entry consists of 4 integers and represents the pins
>> + mux and config setting.The format is
>> + atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
>> + Supported pin number and mux varies for different SoCs, and
>> + are defined in <include/dt-bindings/pinctrl/at91.h>.
>> + items:
>> + items:
>> + - description:
>> + Pin bank
>> + - description:
>> + Pin bank index
>> + - description:
>> + Peripheral function
>> + - description:
>> + Pad configuration
>> +
>> + required:
>> + - atmel,pins
>> +
>> + additionalProperties: false
>> +
>> + 'gpio@[0-9a-f]*$':
>
> '*' means 0 or more. You need '+' for 1 or more
>
>> + $ref: "/schemas/gpio/atmel,at91rm9200-gpio.yaml"
>
> Don't need quotes. yamllint should have told you this.
>
>> + unevaluatedProperties: false
>> +
>> +allOf:
>> + - $ref: pinctrl.yaml#
>> +
>> +required:
>> + - compatible
>> + - ranges
>> + - "#address-cells"
>> + - "#size-cells"
>> + - atmel,mux-mask
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + #include <dt-bindings/clock/at91.h>
>> + #include <dt-bindings/interrupt-controller/irq.h>
>> + #include <dt-bindings/pinctrl/at91.h>
>> +
>> + pinctrl@fffff400 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "atmel,at91rm9200-pinctrl", "simple-mfd";
>> + ranges = <0xfffff400 0xfffff400 0x600>;
>> +
>> + atmel,mux-mask = <
>> + /* A B */
>> + 0xffffffff 0xffc00c3b /* pioA */
>> + 0xffffffff 0x7fff3ccf /* pioB */
>> + 0xffffffff 0x007fffff /* pioC */
>> + >;
>> +
>> + dbgu {
>> + pinctrl_dbgu: dbgu-0 {
>> + atmel,pins =
>> + <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>> + AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> + };
>> +
>> + pioA: gpio@fffff400 {
>> + compatible = "atmel,at91rm9200-gpio";
>> + reg = <0xfffff400 0x200>;
>> + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
>> + #gpio-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
>> + };
>> + };
>> +...
>> --
>> 2.25.1
>>
--
Thanks and Regards,
Manikandan M.
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 0/5] Convert Atmel PIO3 Pinctrl and GPIO bindings to yaml
2024-06-25 4:35 [PATCH v2 0/5] Convert Atmel PIO3 Pinctrl and GPIO bindings to yaml Manikandan Muralidharan
` (4 preceding siblings ...)
2024-06-25 4:35 ` [PATCH v2 5/5] dt-bindings: pinctrl: Convert Atmel PIO3 pinctrl " Manikandan Muralidharan
@ 2024-06-26 12:08 ` Linus Walleij
5 siblings, 0 replies; 16+ messages in thread
From: Linus Walleij @ 2024-06-26 12:08 UTC (permalink / raw)
To: Manikandan Muralidharan
Cc: brgl, robh, krzk+dt, conor+dt, nicolas.ferre, alexandre.belloni,
claudiu.beznea, arnd, durai.manickamkr, linux-gpio, devicetree,
linux-arm-kernel, linux-kernel
Hi Manikandan,
thanks for working on AT91!
On Tue, Jun 25, 2024 at 6:35 AM Manikandan Muralidharan
<manikandan.m@microchip.com> wrote:
> This patch series cleans-up the compatible property of PIO3 Pinctrl
> and GPIO bank nodes in DT and includes the text to yaml conversion of
> Atmel PIO3 Pinctrl and GPIO bindings.
The patches:
Acked-by: Linus Walleij <linus.walleij@linaro.org>
I assume it will be merged through the SoC tree.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 16+ messages in thread