From: <VaibhaavRam.TL@microchip.com>
To: <gregkh@linuxfoundation.org>
Cc: <linux-gpio@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<UNGLinuxDriver@microchip.com>, <arnd@arndb.de>,
<Tharunkumar.Pasumarthi@microchip.com>
Subject: Re: [PATCH v8 char-misc-next 3/5] misc: microchip: pci1xxxx: Add EEPROM Functionality to read and write into EEPROM bin sysfs
Date: Thu, 30 Mar 2023 05:28:43 +0000 [thread overview]
Message-ID: <f999539280139b7085721803f12f836c201edf20.camel@microchip.com> (raw)
In-Reply-To: <ZCQMh_TbPyLGhTD2@kroah.com>
On Wed, 2023-03-29 at 12:01 +0200, Greg KH wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> On Tue, Mar 28, 2023 at 08:10:06PM +0530, Vaibhaav Ram T.L wrote:
> > From: Kumaravel Thiagarajan <kumaravel.thiagarajan@microchip.com>
> >
> > Microchip's pci1xxxx is an unmanaged PCIe3.1a switch for consumer,
> > industrial, and automotive applications. This switch integrates OTP
> > and EEPROM to enable customization of the part in the field.
> > This patch adds EEPROM functionality to support the same.
>
> Again, why not use the in-kernel eeprom api instead?
Unlike other in-Kernel EEPROM APIs, this EEPROM is not accessible
through any of the i2c/spi buses available to the kernel.
It is only accessible through the register interface available in the
EEPROM controller of the PCI1XXXX device.
The architecture of the device was explained @
https://lore.kernel.org/all/Y+9HOdHGqmPP%2FUde@kroah.com/
>
> thanks,
>
> greg k-h
next prev parent reply other threads:[~2023-03-30 5:28 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20230328144008.4113-1-vaibhaavram.tl@microchip.com>
[not found] ` <20230328144008.4113-2-vaibhaavram.tl@microchip.com>
2023-03-29 9:59 ` [PATCH v8 char-misc-next 1/5] misc: microchip: pci1xxxx: Fix error handling path in probe function Greg KH
2023-03-30 5:19 ` VaibhaavRam.TL
[not found] ` <20230328144008.4113-3-vaibhaavram.tl@microchip.com>
2023-03-29 10:01 ` [PATCH v8 char-misc-next 2/5] misc: microchip: pci1xxxx: Add OTP Functionality to read and write into OTP bin sysfs Greg KH
2023-03-30 5:27 ` VaibhaavRam.TL
[not found] ` <20230328144008.4113-4-vaibhaavram.tl@microchip.com>
2023-03-29 10:01 ` [PATCH v8 char-misc-next 3/5] misc: microchip: pci1xxxx: Add EEPROM Functionality to read and write into EEPROM " Greg KH
2023-03-30 5:28 ` VaibhaavRam.TL [this message]
2023-03-30 7:57 ` Greg KH
2023-03-30 9:51 ` Michael Walle
2023-03-30 17:21 ` Kumaravel.Thiagarajan
[not found] ` <20230328144008.4113-5-vaibhaavram.tl@microchip.com>
2023-03-29 10:02 ` [PATCH v8 char-misc-next 4/5] misc: microchip: pci1xxxx: Load auxiliary driver for OTP/EEPROM auxiliary device Greg KH
2023-03-30 5:29 ` VaibhaavRam.TL
[not found] ` <20230328144008.4113-6-vaibhaavram.tl@microchip.com>
2023-03-29 10:03 ` [PATCH v8 char-misc-next 5/5] misc: microchip: pci1xxxx: Add documentation for sysfs bin attributes Greg KH
2023-03-30 5:37 ` VaibhaavRam.TL
2023-03-29 10:03 ` [PATCH v8 char-misc-next 0/5] Fix error handling in probe Greg KH
2023-03-30 5:38 ` VaibhaavRam.TL
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