From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: "Niklas Söderlund" <niklas.soderlund+renesas@ragnatech.se>,
geert+renesas@glider.be, linux-renesas-soc@vger.kernel.org,
linux-gpio@vger.kernel.org
Cc: laurent.pinchart@ideasonboard.com, linus.walleij@linaro.org
Subject: Re: [PATCH 3/4] pinctrl: sh-pfc: r8a7795: Add group for AVB MDIO and MII pins
Date: Wed, 14 Sep 2016 12:05:32 +0300 [thread overview]
Message-ID: <fce28dc4-f227-5e27-d31c-a6b5bca1c471@cogentembedded.com> (raw)
In-Reply-To: <20160913140314.22035-4-niklas.soderlund+renesas@ragnatech.se>
On 9/13/2016 5:03 PM, Niklas Söderlund wrote:
> Group the AVB pins into similar groups found in other sh-pfc drivers.
> The pins can not be muxed between functions other then AVB but there
> drive strength can be controlled.
>
> The group avb_mdc containing ADV_MDC and ADV_MDIO are on other SoCs
> called avb_mdio. In pfc-r8a7795 the adv_mdc group already existed and
^^^^^^^ avb_mdc?
> is in use in DT. Therefor the ADV_MDIO pin to the existing group
Therefore. And you missed a verb.
> instead of renaming it.
>
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 30 +++++++++++++++++++++++++++---
> 1 file changed, 27 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
> index 4a60f15..7b9a355 100644
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
[...]
> static const unsigned int can0_data_a_pins[] = {
> @@ -3632,6 +3654,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
> SH_PFC_PIN_GROUP(avb_avtp_capture_a),
> SH_PFC_PIN_GROUP(avb_avtp_match_b),
> SH_PFC_PIN_GROUP(avb_avtp_capture_b),
> + SH_PFC_PIN_GROUP(avb_mii),
> SH_PFC_PIN_GROUP(can0_data_a),
> SH_PFC_PIN_GROUP(can0_data_b),
> SH_PFC_PIN_GROUP(can1_data),
> @@ -3928,6 +3951,7 @@ static const char * const avb_groups[] = {
> "avb_avtp_capture_a",
> "avb_avtp_match_b",
> "avb_avtp_capture_b",
> + "avb_mii",
I'd prefer if this group preceded the capture/match groups.
[...]
MBR, Sergei
next prev parent reply other threads:[~2016-09-14 9:05 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-13 14:03 [PATCH 0/4] pinctrl: sh-pfc: r8a7795: Support none GPIO pins with configurable drive-strength Niklas Söderlund
2016-09-13 14:03 ` [PATCH 1/4] pinctrl: sh-pfc: Support named pins with custom configuration Niklas Söderlund
2016-09-13 14:28 ` Laurent Pinchart
2016-10-04 19:08 ` Geert Uytterhoeven
2016-09-13 14:03 ` [PATCH 2/4] pinctrl: sh-pfc: r8a7795: Support none GPIO pins with configurable drive-strength Niklas Söderlund
2016-10-04 19:13 ` Geert Uytterhoeven
2016-10-05 8:33 ` Niklas Söderlund
2016-10-05 9:51 ` Geert Uytterhoeven
2016-10-05 10:12 ` Laurent Pinchart
2016-10-06 9:27 ` Niklas Söderlund
2016-09-13 14:03 ` [PATCH 3/4] pinctrl: sh-pfc: r8a7795: Add group for AVB MDIO and MII pins Niklas Söderlund
2016-09-14 9:05 ` Sergei Shtylyov [this message]
2016-10-05 7:41 ` Geert Uytterhoeven
2016-09-13 14:03 ` [PATCH 4/4] pinctrl: sh-pfc: r8a7795: Add group for QSPI0 and QSPI1 pins Niklas Söderlund
2016-10-05 7:33 ` Geert Uytterhoeven
2016-10-04 19:09 ` [PATCH 0/4] pinctrl: sh-pfc: r8a7795: Support none GPIO pins with configurable drive-strength Geert Uytterhoeven
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