[PATCH v2] support i.MX93 truly available GPIO pins

[PATCH v2] support i.MX93 truly available GPIO pins

[Hector Palacios]

All four GPIO ports of i.MX93 SoC show 32 pins available, but
not every port has 32 pins.
Add support on the GPIO driver to 'ngpios' property and set
the truly available pins on the SoC device tree.

v2
* Add 'ngpios' property to DT binding for proper validation

Hector Palacios (2):
      gpio: vf610: add support to DT 'ngpios' property
      arm64: dts: imx93: specify available 'ngpios' per GPIO port

 Documentation/devicetree/bindings/gpio/gpio-vf610.yaml | 6 ++++++
 arch/arm64/boot/dts/freescale/imx93.dtsi               | 4 ++++
 drivers/gpio/gpio-vf610.c                              | 7 ++++++-
 3 files changed, 16 insertions(+), 1 deletion(-)

[PATCH v2 1/2] gpio: vf610: add support to DT 'ngpios' property

[Hector Palacios]

Default to hardcoded VF610_GPIO_PER_PORT (32 pins) but allow optional
generic 'ngpios' property to be specified from the device tree.

Signed-off-by: Hector Palacios <hector.palacios@digi.com>
---
 Documentation/devicetree/bindings/gpio/gpio-vf610.yaml | 6 ++++++
 drivers/gpio/gpio-vf610.c                              | 7 ++++++-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
index a27f92950257..ba4ebdbc5546 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
+++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
@@ -65,6 +65,12 @@ properties:
     minItems: 1
     maxItems: 4
 
+  ngpios:
+    description: The number of GPIO pins of the port
+    minimum: 1
+    maximum: 32
+    default: 32
+
 patternProperties:
   "^.+-hog(-[0-9]+)?$":
     type: object
diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c
index 07e5e6323e86..4abdf75e9a0a 100644
--- a/drivers/gpio/gpio-vf610.c
+++ b/drivers/gpio/gpio-vf610.c
@@ -276,6 +276,7 @@ static int vf610_gpio_probe(struct platform_device *pdev)
 	struct vf610_gpio_port *port;
 	struct gpio_chip *gc;
 	struct gpio_irq_chip *girq;
+	u32 ngpios;
 	int i;
 	int ret;
 	bool dual_base;
@@ -353,7 +354,11 @@ static int vf610_gpio_probe(struct platform_device *pdev)
 	gc = &port->gc;
 	gc->parent = dev;
 	gc->label = dev_name(dev);
-	gc->ngpio = VF610_GPIO_PER_PORT;
+	ret = device_property_read_u32(dev, "ngpios", &ngpios);
+	if (ret || ngpios > VF610_GPIO_PER_PORT)
+		gc->ngpio = VF610_GPIO_PER_PORT;
+	else
+		gc->ngpio = (u16)ngpios;
 	gc->base = -1;
 
 	gc->request = gpiochip_generic_request;

[PATCH v2 2/2] arm64: dts: imx93: specify available 'ngpios' per GPIO port

[Hector Palacios]

According to NXP HRM for i.MX93, the following GPIO pins are available:
- GPIO1: 16 pins (0..15)
- GPIO2: 30 pins (0..29)
- GPIO3: 32 pins (0..31)
- GPIO4: 30 pins (0..29)

Signed-off-by: Hector Palacios <hector.palacios@digi.com>
---
 arch/arm64/boot/dts/freescale/imx93.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 34c0540276d1..7eb2cab7c749 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -970,6 +970,7 @@ gpio2: gpio@43810000 {
 				 <&clk IMX93_CLK_GPIO2_GATE>;
 			clock-names = "gpio", "port";
 			gpio-ranges = <&iomuxc 0 4 30>;
+			ngpios = <30>;
 		};
 
 		gpio3: gpio@43820000 {
@@ -986,6 +987,7 @@ gpio3: gpio@43820000 {
 			clock-names = "gpio", "port";
 			gpio-ranges = <&iomuxc 0 84 8>, <&iomuxc 8 66 18>,
 				      <&iomuxc 26 34 2>, <&iomuxc 28 0 4>;
+			ngpios = <32>;
 		};
 
 		gpio4: gpio@43830000 {
@@ -1001,6 +1003,7 @@ gpio4: gpio@43830000 {
 				 <&clk IMX93_CLK_GPIO4_GATE>;
 			clock-names = "gpio", "port";
 			gpio-ranges = <&iomuxc 0 38 28>, <&iomuxc 28 36 2>;
+			ngpios = <30>;
 		};
 
 		gpio1: gpio@47400000 {
@@ -1016,6 +1019,7 @@ gpio1: gpio@47400000 {
 				 <&clk IMX93_CLK_GPIO1_GATE>;
 			clock-names = "gpio", "port";
 			gpio-ranges = <&iomuxc 0 92 16>;
+			ngpios = <16>;
 		};
 
 		ocotp: efuse@47510000 {

Re: [PATCH v2 2/2] arm64: dts: imx93: specify available 'ngpios' per GPIO port

[Alexander Stein]

Hi Hector,

thanks for the patch.

Am Montag, 15. Januar 2024, 14:16:05 CET schrieb Hector Palacios:
> According to NXP HRM for i.MX93, the following GPIO pins are available:
> - GPIO1: 16 pins (0..15)

Mh, RM Rev4 (12/2023) says:
>  Bit[31:17] should be Reserved for GPIO1

So GPIO1 has the range 0..16

> - GPIO2: 30 pins (0..29)
> - GPIO3: 32 pins (0..31)
> - GPIO4: 30 pins (0..29)

RM Rev4 (12/2023) says:
> Bit[31:28] should be Reserved for GPIO4

So GPIO4 would be the range 0..27

Where did you get your numbers from?

Best regards,
Alexander

> 
> Signed-off-by: Hector Palacios <hector.palacios@digi.com>
> ---
>  arch/arm64/boot/dts/freescale/imx93.dtsi | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi
> b/arch/arm64/boot/dts/freescale/imx93.dtsi index 34c0540276d1..7eb2cab7c749
> 100644
> --- a/arch/arm64/boot/dts/freescale/imx93.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
> @@ -970,6 +970,7 @@ gpio2: gpio@43810000 {
>  				 <&clk IMX93_CLK_GPIO2_GATE>;
>  			clock-names = "gpio", "port";
>  			gpio-ranges = <&iomuxc 0 4 30>;
> +			ngpios = <30>;
>  		};
> 
>  		gpio3: gpio@43820000 {
> @@ -986,6 +987,7 @@ gpio3: gpio@43820000 {
>  			clock-names = "gpio", "port";
>  			gpio-ranges = <&iomuxc 0 84 8>, <&iomuxc 8 66 
18>,
>  				      <&iomuxc 26 34 2>, <&iomuxc 28 0 
4>;
> +			ngpios = <32>;
>  		};
> 
>  		gpio4: gpio@43830000 {
> @@ -1001,6 +1003,7 @@ gpio4: gpio@43830000 {
>  				 <&clk IMX93_CLK_GPIO4_GATE>;
>  			clock-names = "gpio", "port";
>  			gpio-ranges = <&iomuxc 0 38 28>, <&iomuxc 28 36 
2>;
> +			ngpios = <30>;
>  		};
> 
>  		gpio1: gpio@47400000 {
> @@ -1016,6 +1019,7 @@ gpio1: gpio@47400000 {
>  				 <&clk IMX93_CLK_GPIO1_GATE>;
>  			clock-names = "gpio", "port";
>  			gpio-ranges = <&iomuxc 0 92 16>;
> +			ngpios = <16>;
>  		};
> 
>  		ocotp: efuse@47510000 {


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Re: [PATCH v2 2/2] arm64: dts: imx93: specify available 'ngpios' per GPIO port

[Hector Palacios]

Hi Alexander,

On 1/15/24 14:30, Alexander Stein wrote:
> Hi Hector,
> 
> thanks for the patch.
> 
> Am Montag, 15. Januar 2024, 14:16:05 CET schrieb Hector Palacios:
>> According to NXP HRM for i.MX93, the following GPIO pins are available:
>> - GPIO1: 16 pins (0..15)
> 
> Mh, RM Rev4 (12/2023) says:
>>   Bit[31:17] should be Reserved for GPIO1
> 
> So GPIO1 has the range 0..16
> 
>> - GPIO2: 30 pins (0..29)
>> - GPIO3: 32 pins (0..31)
>> - GPIO4: 30 pins (0..29)
> 
> RM Rev4 (12/2023) says:
>> Bit[31:28] should be Reserved for GPIO4
> 
> So GPIO4 would be the range 0..27
> 
> Where did you get your numbers from?

I also saw what you point out about the HRM but when cross-checking with 
the IOMUXC topic (Chapter 27) to verify what pads can work as GPIO for 
each of the ports, I found you can configure pads for
- GPIO1_IO00..GPIO1_IO15
- GPIO2_IO00..GPIO2_IO29
- GPIO3_IO00..GPIO3_IO31
- GPIO4_IO00..GPIO4_IO29

which doesn't exactly match the note about the reserved bits.
I consider the IOMUXC topic more reliable but it would definitely be 
better if someone from NXP could clarify.

Regards
-- 
Héctor Palacios

> 
>>
>> Signed-off-by: Hector Palacios <hector.palacios@digi.com>
>> ---
>>   arch/arm64/boot/dts/freescale/imx93.dtsi | 4 ++++
>>   1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi
>> b/arch/arm64/boot/dts/freescale/imx93.dtsi index 34c0540276d1..7eb2cab7c749
>> 100644
>> --- a/arch/arm64/boot/dts/freescale/imx93.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
>> @@ -970,6 +970,7 @@ gpio2: gpio@43810000 {
>>                                 <&clk IMX93_CLK_GPIO2_GATE>;
>>                        clock-names = "gpio", "port";
>>                        gpio-ranges = <&iomuxc 0 4 30>;
>> +                     ngpios = <30>;
>>                };
>>
>>                gpio3: gpio@43820000 {
>> @@ -986,6 +987,7 @@ gpio3: gpio@43820000 {
>>                        clock-names = "gpio", "port";
>>                        gpio-ranges = <&iomuxc 0 84 8>, <&iomuxc 8 66
> 18>,
>>                                      <&iomuxc 26 34 2>, <&iomuxc 28 0
> 4>;
>> +                     ngpios = <32>;
>>                };
>>
>>                gpio4: gpio@43830000 {
>> @@ -1001,6 +1003,7 @@ gpio4: gpio@43830000 {
>>                                 <&clk IMX93_CLK_GPIO4_GATE>;
>>                        clock-names = "gpio", "port";
>>                        gpio-ranges = <&iomuxc 0 38 28>, <&iomuxc 28 36
> 2>;
>> +                     ngpios = <30>;
>>                };
>>
>>                gpio1: gpio@47400000 {
>> @@ -1016,6 +1019,7 @@ gpio1: gpio@47400000 {
>>                                 <&clk IMX93_CLK_GPIO1_GATE>;
>>                        clock-names = "gpio", "port";
>>                        gpio-ranges = <&iomuxc 0 92 16>;
>> +                     ngpios = <16>;
>>                };
>>
>>                ocotp: efuse@47510000 {
> 

Re: [PATCH v2 1/2] gpio: vf610: add support to DT 'ngpios' property

[Krzysztof Kozlowski]

On 15/01/2024 14:16, Hector Palacios wrote:
> Default to hardcoded VF610_GPIO_PER_PORT (32 pins) but allow optional
> generic 'ngpios' property to be specified from the device tree.

You need to explain why.

Subject:
Please use subject prefixes matching the subsystem. You can get them for
example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
your patch is touching.

> 
> Signed-off-by: Hector Palacios <hector.palacios@digi.com>
> ---
>  Documentation/devicetree/bindings/gpio/gpio-vf610.yaml | 6 ++++++

Please use scripts/get_maintainers.pl to get a list of necessary people
and lists to CC (and consider --no-git-fallback argument). It might
happen, that command when run on an older kernel, gives you outdated
entries. Therefore please be sure you base your patches on recent Linux
kernel.

Please run scripts/checkpatch.pl and fix reported warnings. Some
warnings can be ignored, but the code here looks like it needs a fix.
Feel free to get in touch if the warning is not clear.

Bindings are always separate...


>  drivers/gpio/gpio-vf610.c                              | 7 ++++++-
>  2 files changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
> index a27f92950257..ba4ebdbc5546 100644
> --- a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
> +++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
> @@ -65,6 +65,12 @@ properties:
>      minItems: 1
>      maxItems: 4
>  
> +  ngpios:
> +    description: The number of GPIO pins of the port

Skip description, this is a generic property.

> +    minimum: 1
> +    maximum: 32
> +    default: 32


Best regards,
Krzysztof

RE: [PATCH v2 2/2] arm64: dts: imx93: specify available 'ngpios' per GPIO port

[Bough Chen]

> -----Original Message-----
> From: Hector Palacios <hector.palacios@digi.com>
> Sent: 2024年1月15日 23:42
> To: Alexander Stein <alexander.stein@ew.tq-group.com>;
> linus.walleij@linaro.org; brgl@bgdev.pl; robh+dt@kernel.org
> Cc: stefan@agner.ch; linux-gpio@vger.kernel.org; devicetree@vger.kernel.org;
> Peng Fan <peng.fan@nxp.com>; Bough Chen <haibo.chen@nxp.com>
> Subject: Re: [PATCH v2 2/2] arm64: dts: imx93: specify available 'ngpios' per
> GPIO port
> 
> Hi Alexander,
> 
> On 1/15/24 14:30, Alexander Stein wrote:
> > Hi Hector,
> >
> > thanks for the patch.
> >
> > Am Montag, 15. Januar 2024, 14:16:05 CET schrieb Hector Palacios:
> >> According to NXP HRM for i.MX93, the following GPIO pins are available:
> >> - GPIO1: 16 pins (0..15)
> >
> > Mh, RM Rev4 (12/2023) says:
> >>   Bit[31:17] should be Reserved for GPIO1
> >
> > So GPIO1 has the range 0..16
> >
> >> - GPIO2: 30 pins (0..29)
> >> - GPIO3: 32 pins (0..31)
> >> - GPIO4: 30 pins (0..29)
> >
> > RM Rev4 (12/2023) says:
> >> Bit[31:28] should be Reserved for GPIO4
> >
> > So GPIO4 would be the range 0..27
> >
> > Where did you get your numbers from?
> 
> I also saw what you point out about the HRM but when cross-checking with the
> IOMUXC topic (Chapter 27) to verify what pads can work as GPIO for each of the
> ports, I found you can configure pads for
> - GPIO1_IO00..GPIO1_IO15
> - GPIO2_IO00..GPIO2_IO29
> - GPIO3_IO00..GPIO3_IO31
> - GPIO4_IO00..GPIO4_IO29
> 
> which doesn't exactly match the note about the reserved bits.
> I consider the IOMUXC topic more reliable but it would definitely be better if
> someone from NXP could clarify.

Hi All,

I just confirm with IP team, they use the IOMUX to implement RTL code. So IOMUX is reliable.
The following are correct.
 - GPIO1_IO00..GPIO1_IO15
 - GPIO2_IO00..GPIO2_IO29
 - GPIO3_IO00..GPIO3_IO31
 - GPIO4_IO00..GPIO4_IO29

I will ask the Doc team to update the reserved bits to align with the IOMUX.

Best Regards
Haibo Chen
> 
> Regards
> --
> Héctor Palacios
> 
> >
> >>
> >> Signed-off-by: Hector Palacios <hector.palacios@digi.com>
> >> ---
> >>   arch/arm64/boot/dts/freescale/imx93.dtsi | 4 ++++
> >>   1 file changed, 4 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi
> >> b/arch/arm64/boot/dts/freescale/imx93.dtsi index
> >> 34c0540276d1..7eb2cab7c749
> >> 100644
> >> --- a/arch/arm64/boot/dts/freescale/imx93.dtsi
> >> +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
> >> @@ -970,6 +970,7 @@ gpio2: gpio@43810000 {
> >>                                 <&clk IMX93_CLK_GPIO2_GATE>;
> >>                        clock-names = "gpio", "port";
> >>                        gpio-ranges = <&iomuxc 0 4 30>;
> >> +                     ngpios = <30>;
> >>                };
> >>
> >>                gpio3: gpio@43820000 { @@ -986,6 +987,7 @@ gpio3:
> >> gpio@43820000 {
> >>                        clock-names = "gpio", "port";
> >>                        gpio-ranges = <&iomuxc 0 84 8>, <&iomuxc 8
> 66
> > 18>,
> >>                                      <&iomuxc 26 34 2>,
> <&iomuxc 28 0
> > 4>;
> >> +                     ngpios = <32>;
> >>                };
> >>
> >>                gpio4: gpio@43830000 { @@ -1001,6 +1003,7 @@
> gpio4:
> >> gpio@43830000 {
> >>                                 <&clk IMX93_CLK_GPIO4_GATE>;
> >>                        clock-names = "gpio", "port";
> >>                        gpio-ranges = <&iomuxc 0 38 28>, <&iomuxc 28
> >> 36
> > 2>;
> >> +                     ngpios = <30>;
> >>                };
> >>
> >>                gpio1: gpio@47400000 { @@ -1016,6 +1019,7 @@
> gpio1:
> >> gpio@47400000 {
> >>                                 <&clk IMX93_CLK_GPIO1_GATE>;
> >>                        clock-names = "gpio", "port";
> >>                        gpio-ranges = <&iomuxc 0 92 16>;
> >> +                     ngpios = <16>;
> >>                };
> >>
> >>                ocotp: efuse@47510000 {
> >