* Re: [PATCH V5 16/18] soc/tegra: pmc: Configure deep sleep control settings
From: Dmitry Osipenko @ 2019-06-29 13:00 UTC (permalink / raw)
To: Sowjanya Komatineni, thierry.reding, jonathanh, tglx, jason,
marc.zyngier, linus.walleij, stefan, mark.rutland
Cc: pdeschrijver, pgaikwad, sboyd, linux-clk, linux-gpio, jckuo,
josephl, talho, linux-tegra, linux-kernel, mperttunen, spatra,
robh+dt, devicetree
In-Reply-To: <1561687972-19319-17-git-send-email-skomatineni@nvidia.com>
28.06.2019 5:12, Sowjanya Komatineni пишет:
> Tegra210 and prior Tegra chips have deep sleep entry and wakeup related
> timings which are platform specific that should be configured before
> entering into deep sleep.
>
> Below are the timing specific configurations for deep sleep entry and
> wakeup.
> - Core rail power-on stabilization timer
> - OSC clock stabilization timer after SOC rail power is stabilized.
> - Core power off time is the minimum wake delay to keep the system
> in deep sleep state irrespective of any quick wake event.
>
> These values depends on the discharge time of regulators and turn OFF
> time of the PMIC to allow the complete system to finish entering into
> deep sleep state.
>
> These values vary based on the platform design and are specified
> through the device tree.
>
> This patch has implementation to configure these timings which are must
> to have for proper deep sleep and wakeup operations.
>
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> ---
> drivers/soc/tegra/pmc.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
> index ed83c0cd09a3..7e4a8f04f4c4 100644
> --- a/drivers/soc/tegra/pmc.c
> +++ b/drivers/soc/tegra/pmc.c
> @@ -89,6 +89,8 @@
>
> #define PMC_CPUPWRGOOD_TIMER 0xc8
> #define PMC_CPUPWROFF_TIMER 0xcc
> +#define PMC_COREPWRGOOD_TIMER 0x3c
> +#define PMC_COREPWROFF_TIMER 0xe0
>
> #define PMC_PWR_DET_VALUE 0xe4
>
> @@ -2291,6 +2293,7 @@ static const struct tegra_pmc_regs tegra20_pmc_regs = {
> static void tegra20_pmc_init(struct tegra_pmc *pmc)
> {
> u32 value;
> + unsigned long osc, pmu, off;
>
> /* Always enable CPU power request */
> value = tegra_pmc_readl(pmc, PMC_CNTRL);
> @@ -2316,6 +2319,15 @@ static void tegra20_pmc_init(struct tegra_pmc *pmc)
> value = tegra_pmc_readl(pmc, PMC_CNTRL);
> value |= PMC_CNTRL_SYSCLK_OE;
> tegra_pmc_writel(pmc, value, PMC_CNTRL);
> +
> + osc = DIV_ROUND_UP_ULL(pmc->core_osc_time * 8192, 1000000);
> + pmu = DIV_ROUND_UP_ULL(pmc->core_pmu_time * 32768, 1000000);
> + off = DIV_ROUND_UP_ULL(pmc->core_off_time * 32768, 1000000);
IIUC, the first argument shall be explicitly of a type "long long", shouldn't it?
Otherwise the multiplication will overflow before division happens.
Thus:
osc = DIV_ROUND_UP_ULL((u64)pmc->core_osc_time * 8192, 1000000);
pmu = DIV_ROUND_UP_ULL((u64)pmc->core_pmu_time * 32768, 1000000);
off = DIV_ROUND_UP_ULL((u64)pmc->core_off_time * 32768, 1000000);
Also, could you please tell what of the above multiplications could overflow u32 in
the first place? Maybe DIV_ROUND_UP_ULL isn't needed at all and DIV_ROUND_UP could be
use instead?
^ permalink raw reply
* Re: [PATCH V5 02/18] pinctrl: tegra: Add suspend and resume support
From: Dmitry Osipenko @ 2019-06-29 12:38 UTC (permalink / raw)
To: Sowjanya Komatineni, thierry.reding, jonathanh, tglx, jason,
marc.zyngier, linus.walleij, stefan, mark.rutland
Cc: pdeschrijver, pgaikwad, sboyd, linux-clk, linux-gpio, jckuo,
josephl, talho, linux-tegra, linux-kernel, mperttunen, spatra,
robh+dt, devicetree
In-Reply-To: <99403cb1-aaef-4dd4-68a0-67864ca7ce6c@nvidia.com>
29.06.2019 2:00, Sowjanya Komatineni пишет:
>
> On 6/28/19 5:05 AM, Dmitry Osipenko wrote:
>> 28.06.2019 14:56, Dmitry Osipenko пишет:
>>> 28.06.2019 5:12, Sowjanya Komatineni пишет:
>>>> This patch adds support for Tegra pinctrl driver suspend and resume.
>>>>
>>>> During suspend, context of all pinctrl registers are stored and
>>>> on resume they are all restored to have all the pinmux and pad
>>>> configuration for normal operation.
>>>>
>>>> Acked-by: Thierry Reding <treding@nvidia.com>
>>>> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
>>>> ---
>>>> int tegra_pinctrl_probe(struct platform_device *pdev,
>>>> const struct tegra_pinctrl_soc_data *soc_data);
>>>> #endif
>>>> diff --git a/drivers/pinctrl/tegra/pinctrl-tegra210.c
>>>> b/drivers/pinctrl/tegra/pinctrl-tegra210.c
>>>> index 0b56ad5c9c1c..edd3f4606cdb 100644
>>>> --- a/drivers/pinctrl/tegra/pinctrl-tegra210.c
>>>> +++ b/drivers/pinctrl/tegra/pinctrl-tegra210.c
>>>> @@ -1571,6 +1571,7 @@ static struct platform_driver tegra210_pinctrl_driver = {
>>>> .driver = {
>>>> .name = "tegra210-pinctrl",
>>>> .of_match_table = tegra210_pinctrl_of_match,
>>>> + .pm = &tegra_pinctrl_pm,
>>>> },
>>>> .probe = tegra210_pinctrl_probe,
>>>> };
>>>>
>>> Could you please address my comments in the next revision if there will be one?
>>>
>> Also, what about adding ".pm' for other Tegras? I'm sure Jon could test them for you.
>
> This series is for Tegra210 SC7 entry/exit along with clocks and pinctrl suspend
> resume needed for Tegra210 basic sc7 entry and exit.
>
> This includes pinctrl, pmc changes, clock-tegra210 driver changes all w.r.t Tegra210
> platforms specific.
>
> Suspend/resume support for other Tegras will be in separate patch series.
Okay, fair enough.
^ permalink raw reply
* [PATCH][next] gpio: bd70528: remove redundant assignment to variable ret
From: Colin King @ 2019-06-29 12:33 UTC (permalink / raw)
To: Linus Walleij, Bartosz Golaszewski, linux-gpio
Cc: kernel-janitors, linux-kernel
From: Colin Ian King <colin.king@canonical.com>
Variable ret is being initialized with a value that is never read
and ret is being re-assigned a little later on. The assignment is
redundant and hence can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
---
drivers/gpio/gpio-bd70528.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-bd70528.c b/drivers/gpio/gpio-bd70528.c
index 633422b430b4..0c1ead12d883 100644
--- a/drivers/gpio/gpio-bd70528.c
+++ b/drivers/gpio/gpio-bd70528.c
@@ -153,7 +153,7 @@ static int bd70528_gpio_get_i(struct bd70528_gpio *bdgpio, unsigned int offset)
static int bd70528_gpio_get(struct gpio_chip *chip, unsigned int offset)
{
- int ret = -EINVAL;
+ int ret;
struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
/*
--
2.20.1
^ permalink raw reply related
* Re: [GIT PULL] pin control fixes for v5.2
From: pr-tracker-bot @ 2019-06-29 9:30 UTC (permalink / raw)
To: Linus Walleij
Cc: Linus Torvalds, open list:GPIO SUBSYSTEM, linux-kernel, Phil Reid,
Alexandre Belloni, Nicolas Boichat
In-Reply-To: <CACRpkdaiMrQyaxrLhy=Az5SCoz_C3NWRSYiQFqr=_BsD+qugMQ@mail.gmail.com>
The pull request you sent on Fri, 28 Jun 2019 10:35:45 +0100:
> git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git tags/pinctrl-v5.2-3
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/061913712d6ab77c77192584912afdbd8267c54c
Thank you!
--
Deet-doot-dot, I am a bot.
https://korg.wiki.kernel.org/userdoc/prtracker
^ permalink raw reply
* Re: [PATCH V5 02/18] pinctrl: tegra: Add suspend and resume support
From: Sowjanya Komatineni @ 2019-06-28 23:00 UTC (permalink / raw)
To: Dmitry Osipenko, thierry.reding, jonathanh, tglx, jason,
marc.zyngier, linus.walleij, stefan, mark.rutland
Cc: pdeschrijver, pgaikwad, sboyd, linux-clk, linux-gpio, jckuo,
josephl, talho, linux-tegra, linux-kernel, mperttunen, spatra,
robh+dt, devicetree
In-Reply-To: <ca8199af-43db-c878-a93f-66c275acf864@gmail.com>
On 6/28/19 5:05 AM, Dmitry Osipenko wrote:
> 28.06.2019 14:56, Dmitry Osipenko пишет:
>> 28.06.2019 5:12, Sowjanya Komatineni пишет:
>>> This patch adds support for Tegra pinctrl driver suspend and resume.
>>>
>>> During suspend, context of all pinctrl registers are stored and
>>> on resume they are all restored to have all the pinmux and pad
>>> configuration for normal operation.
>>>
>>> Acked-by: Thierry Reding <treding@nvidia.com>
>>> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
>>> ---
>>> int tegra_pinctrl_probe(struct platform_device *pdev,
>>> const struct tegra_pinctrl_soc_data *soc_data);
>>> #endif
>>> diff --git a/drivers/pinctrl/tegra/pinctrl-tegra210.c b/drivers/pinctrl/tegra/pinctrl-tegra210.c
>>> index 0b56ad5c9c1c..edd3f4606cdb 100644
>>> --- a/drivers/pinctrl/tegra/pinctrl-tegra210.c
>>> +++ b/drivers/pinctrl/tegra/pinctrl-tegra210.c
>>> @@ -1571,6 +1571,7 @@ static struct platform_driver tegra210_pinctrl_driver = {
>>> .driver = {
>>> .name = "tegra210-pinctrl",
>>> .of_match_table = tegra210_pinctrl_of_match,
>>> + .pm = &tegra_pinctrl_pm,
>>> },
>>> .probe = tegra210_pinctrl_probe,
>>> };
>>>
>> Could you please address my comments in the next revision if there will be one?
>>
> Also, what about adding ".pm' for other Tegras? I'm sure Jon could test them for you.
This series is for Tegra210 SC7 entry/exit along with clocks and pinctrl
suspend resume needed for Tegra210 basic sc7 entry and exit.
This includes pinctrl, pmc changes, clock-tegra210 driver changes all
w.r.t Tegra210 platforms specific.
Suspend/resume support for other Tegras will be in separate patch series.
thanks
Sowjanya
^ permalink raw reply
* Re: [PATCH 24/39] docs: driver-model: move it to the driver-api book
From: Jeff Kirsher @ 2019-06-28 18:53 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Linux Doc Mailing List
Cc: Mauro Carvalho Chehab, linux-kernel, Jonathan Corbet,
Linus Walleij, Bartosz Golaszewski, Jean Delvare, Guenter Roeck,
Harry Wei, Alex Shi, Greg Kroah-Hartman, Rafael J. Wysocki,
David S. Miller, David Kershner, Julia Lawall, Gilles Muller,
Nicolas Palix, Michal Marek, linux-gpio, linux-hwmon,
intel-wired-lan, netdev, sparmaintainer, devel, cocci
In-Reply-To: <920ff36c66233113b1825ab504fe675ed5a5bd7b.1561724493.git.mchehab+samsung@kernel.org>
[-- Attachment #1: Type: text/plain, Size: 2907 bytes --]
On Fri, 2019-06-28 at 09:30 -0300, Mauro Carvalho Chehab wrote:
> The audience for the Kernel driver-model is clearly Kernel hackers.
>
> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
For the 'ice' driver changes.
> ---
> Documentation/{ => driver-api}/driver-model/binding.rst | 0
> Documentation/{ => driver-api}/driver-model/bus.rst | 0
> Documentation/{ => driver-api}/driver-model/class.rst | 0
> .../{ => driver-api}/driver-model/design-patterns.rst | 0
> Documentation/{ => driver-api}/driver-model/device.rst | 0
> Documentation/{ => driver-api}/driver-model/devres.rst | 0
> Documentation/{ => driver-api}/driver-model/driver.rst | 0
> Documentation/{ => driver-api}/driver-model/index.rst | 2 --
> Documentation/{ => driver-api}/driver-model/overview.rst | 0
> Documentation/{ => driver-api}/driver-model/platform.rst | 0
> Documentation/{ => driver-api}/driver-model/porting.rst | 2 +-
> Documentation/driver-api/gpio/driver.rst | 2 +-
> Documentation/driver-api/index.rst | 1 +
> Documentation/eisa.txt | 4 ++--
> Documentation/filesystems/sysfs.txt | 2 +-
> Documentation/hwmon/submitting-patches.rst | 2 +-
> Documentation/translations/zh_CN/filesystems/sysfs.txt | 2 +-
> drivers/base/platform.c | 2 +-
> drivers/gpio/gpio-cs5535.c | 2 +-
> drivers/net/ethernet/intel/ice/ice_main.c | 2 +-
> drivers/staging/unisys/Documentation/overview.txt | 4 ++--
> include/linux/device.h | 2 +-
> include/linux/platform_device.h | 2 +-
> scripts/coccinelle/free/devm_free.cocci | 2 +-
> 24 files changed, 16 insertions(+), 17 deletions(-)
> rename Documentation/{ => driver-api}/driver-model/binding.rst (100%)
> rename Documentation/{ => driver-api}/driver-model/bus.rst (100%)
> rename Documentation/{ => driver-api}/driver-model/class.rst (100%)
> rename Documentation/{ => driver-api}/driver-model/design-patterns.rst
> (100%)
> rename Documentation/{ => driver-api}/driver-model/device.rst (100%)
> rename Documentation/{ => driver-api}/driver-model/devres.rst (100%)
> rename Documentation/{ => driver-api}/driver-model/driver.rst (100%)
> rename Documentation/{ => driver-api}/driver-model/index.rst (96%)
> rename Documentation/{ => driver-api}/driver-model/overview.rst (100%)
> rename Documentation/{ => driver-api}/driver-model/platform.rst (100%)
> rename Documentation/{ => driver-api}/driver-model/porting.rst (99%)
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply
* Re: [RFC/RFT v2 00/14] arm64: g12a: add support for DVFS
From: Kevin Hilman @ 2019-06-28 18:13 UTC (permalink / raw)
To: Neil Armstrong, jbrunet
Cc: linux-arm-kernel, linux-amlogic, linux-kernel, linux-clk,
martin.blumenstingl, linux-gpio, Neil Armstrong
In-Reply-To: <20190626090632.7540-1-narmstrong@baylibre.com>
Neil Armstrong <narmstrong@baylibre.com> writes:
> The G12A/G12B Socs embeds a specific clock tree for each CPU cluster :
> cpu_clk / cpub_clk
> | \- cpu_clk_dyn
> | | \- cpu_clk_premux0
> | | |- cpu_clk_postmux0
> | | | |- cpu_clk_dyn0_div
> | | | \- xtal/fclk_div2/fclk_div3
> | | \- xtal/fclk_div2/fclk_div3
> | \- cpu_clk_premux1
> | |- cpu_clk_postmux1
> | | |- cpu_clk_dyn1_div
> | | \- xtal/fclk_div2/fclk_div3
> | \- xtal/fclk_div2/fclk_div3
> \ sys_pll / sys1_pll
>
> This patchset adds notifiers on cpu_clk / cpub_clk, cpu_clk_dyn,
> cpu_clk_premux0 and sys_pll / sys1_pll to permit change frequency of
> the CPU clock in a safe way as recommended by the vendor Documentation
> and reference code.
>
> This patchset :
> - introduces needed core and meson clk changes
> - adds support for the G12B second cluster clock measurer ids
> - protects clock measurer from cooncurent measures
> - adds the clock notifiers
> - moves the G12A DT to a common g12a-common dtsi
> - adds the G12A and G12B OPPs
> - enables DVFS on all supported boards
>
> Dependencies:
> - PWM AO input order fix at [1]
> - PWM enhancements from Martin at [2]
>
> Changes since RFT/RFC v1 at [3]:
> - Added EXPORT_SYMBOL_GPL() to clk_hw_set_parent
> - Added missing static to g12b_cpub_clk_mux0_div_ops and g12a_cpu_clk_mux_nb
> - Simplified g12a_cpu_clk_mux_notifier_cb() without switch/case
> - Fixed typo in "this the current path" in g12a.c
> - Fixed G12B dtsi by adding back the sdio quirk
> - Fixed G12A dtsi unwanted sdio quirk removal
> - Fixed various checkpatch errors
>
> [1] https://patchwork.kernel.org/patch/11006835/
> [2] https://patchwork.kernel.org/patch/11006835/
> [3] https://patchwork.kernel.org/cover/11006929/
>
> Neil Armstrong (14):
> pinctrl: meson-g12a: add pwm_a on GPIOE_2 pinmux
> clk: core: introduce clk_hw_set_parent()
> clk: meson: regmap: export regmap_div ops functions
> clk: meson: eeclk: add setup callback
> soc: amlogic: meson-clk-measure: protect measure with a mutex
> soc: amlogic: meson-clk-measure: add G12B second cluster cpu clk
> clk: meson: g12a: add notifiers to handle cpu clock change
> clk: meson: g12a: expose CPUB clock ID for G12B
> arm64: dts: move common G12A & G12B modes to meson-g12-common.dtsi
> arm64: dts: meson-g12-common: add pwm_a on GPIOE_2 pinmux
> arm64: dts: meson-g12a: add cpus OPP table
> arm64: dts: meson-g12a: enable DVFS on G12A boards
> arm64: dts: meson-g12b: add cpus OPP tables
> arm64: dts: meson-g12b-odroid-n2: enable DVFS
The DT files don't apply cleanly to my tree (v5.3/dt64 branch). Could
you rebase:
Then I can put into my testing branch, which gets included in 'integ'
and it will be easier for others to test.
Kevin
^ permalink raw reply
* Re: [RFC/RFT v2 12/14] arm64: dts: meson-g12a: enable DVFS on G12A boards
From: Kevin Hilman @ 2019-06-28 18:08 UTC (permalink / raw)
To: Neil Armstrong, jbrunet
Cc: linux-arm-kernel, linux-amlogic, linux-kernel, linux-clk,
martin.blumenstingl, linux-gpio, Neil Armstrong
In-Reply-To: <20190626090632.7540-13-narmstrong@baylibre.com>
Neil Armstrong <narmstrong@baylibre.com> writes:
> Enable DVFS for the U200, SEI520 and X96-Max Amlogic G12A based board
> by setting the clock, OPP and supply for each CPU cores.
>
> The CPU cluster power supply can achieve 0.73V to 1.01V using a PWM
> output clocked at 800KHz with an inverse duty-cycle.
>
> DVFS has been tested by running the arm64 cpuburn at [1] and cycling
> between all the possible cpufreq translations and checking the final
> frequency using the clock-measurer, script at [2].
>
> [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S
> [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[...]
> @@ -297,6 +316,34 @@
> status = "okay";
> };
>
> +&cpu0 {
> + cpu-supply = <&vddcpu>;
> + operating-points-v2 = <&cpu_opp_table>;
> + clocks = <&clkc CLKID_CPU_CLK>;
> + clock-latency = <50000>;
> +};
> +
> +&cpu1 {
> + cpu-supply = <&vddcpu>;
> + operating-points-v2 = <&cpu_opp_table>;
> + clocks = <&clkc CLKID_CPU_CLK>;
> + clock-latency = <50000>;
> +};
> +
> +&cpu2 {
> + cpu-supply = <&vddcpu>;
> + operating-points-v2 = <&cpu_opp_table>;
> + clocks = <&clkc CLKID_CPU_CLK>;
> + clock-latency = <50000>;
> +};
> +
> +&cpu3 {
> + cpu-supply = <&vddcpu>;
> + operating-points-v2 = <&cpu_opp_table>;
> + clocks = <&clkc CLKID_CPU_CLK>;
> + clock-latency = <50000>;
> +};
Just curious where this max clock transtion (clock-latency) value came
from. Were you able to measure that somehow?
Kevin
^ permalink raw reply
* Re: [RFC/RFT v2 01/14] pinctrl: meson-g12a: add pwm_a on GPIOE_2 pinmux
From: Kevin Hilman @ 2019-06-28 17:59 UTC (permalink / raw)
To: Neil Armstrong, jbrunet
Cc: linux-arm-kernel, linux-amlogic, linux-kernel, linux-clk,
martin.blumenstingl, linux-gpio, Neil Armstrong
In-Reply-To: <20190626090632.7540-2-narmstrong@baylibre.com>
Neil Armstrong <narmstrong@baylibre.com> writes:
> Add the missing pinmux for the pwm_a function on the GPIOE_2 pin.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
^ permalink raw reply
* Re: [RFC/RFT v2 06/14] soc: amlogic: meson-clk-measure: add G12B second cluster cpu clk
From: Kevin Hilman @ 2019-06-28 17:58 UTC (permalink / raw)
To: Neil Armstrong, jbrunet
Cc: linux-arm-kernel, linux-amlogic, linux-kernel, linux-clk,
martin.blumenstingl, linux-gpio, Neil Armstrong
In-Reply-To: <20190626090632.7540-7-narmstrong@baylibre.com>
Neil Armstrong <narmstrong@baylibre.com> writes:
> Add the G12B second CPU cluster CPU and SYS_PLL measure IDs.
>
> These IDs returns 0Hz on G12A.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
^ permalink raw reply
* Re: [RFC/RFT v2 05/14] soc: amlogic: meson-clk-measure: protect measure with a mutex
From: Kevin Hilman @ 2019-06-28 17:57 UTC (permalink / raw)
To: Neil Armstrong, jbrunet
Cc: linux-arm-kernel, linux-amlogic, linux-kernel, linux-clk,
martin.blumenstingl, linux-gpio, Neil Armstrong
In-Reply-To: <20190626090632.7540-6-narmstrong@baylibre.com>
Neil Armstrong <narmstrong@baylibre.com> writes:
> In order to protect clock measuring when multiple process asks for
> a mesure, protect the main measure function with mutexes.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
^ permalink raw reply
* [PATCH][next] gpio: bd70528: fix spelling misstake "debouce" -> "debounce"
From: Colin King @ 2019-06-28 16:14 UTC (permalink / raw)
To: Matti Vaittinen, Lee Jones, Linus Walleij, Bartosz Golaszewski,
linux-gpio
Cc: kernel-janitors, linux-kernel
From: Colin Ian King <colin.king@canonical.com>
There is a spelling mistake in a dev_err message. Fix it.
Signed-off-by: Colin Ian King <colin.king@canonical.com>
---
drivers/gpio/gpio-bd70528.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-bd70528.c b/drivers/gpio/gpio-bd70528.c
index fd85605d2dab..633422b430b4 100644
--- a/drivers/gpio/gpio-bd70528.c
+++ b/drivers/gpio/gpio-bd70528.c
@@ -36,7 +36,7 @@ static int bd70528_set_debounce(struct bd70528_gpio *bdgpio,
break;
default:
dev_err(bdgpio->chip.dev,
- "Invalid debouce value %u\n", debounce);
+ "Invalid debounce value %u\n", debounce);
return -EINVAL;
}
return regmap_update_bits(bdgpio->chip.regmap, GPIO_IN_REG(offset),
--
2.20.1
^ permalink raw reply related
* Re: [PATCH 1/4 v1] gpio: Add support for hierarchical IRQ domains
From: Lina Iyer @ 2019-06-28 15:58 UTC (permalink / raw)
To: Linus Walleij
Cc: open list:GPIO SUBSYSTEM, Bartosz Golaszewski, Thomas Gleixner,
Marc Zyngier, Jon Hunter, Sowjanya Komatineni, Bitan Biswas,
linux-tegra, David Daney, Masahiro Yamada, Brian Masney,
Thierry Reding
In-Reply-To: <CACRpkdbxicUbg9NSaYsRMQG0Qo-WysdU07qD_T3rDEe7cjCcUw@mail.gmail.com>
Hi Linus,
On Fri, Jun 28 2019 at 03:15 -0600, Linus Walleij wrote:
>Hi Lina,
>
>thanks for your comments!
>
>On Wed, Jun 26, 2019 at 10:09 PM Lina Iyer <ilina@codeaurora.org> wrote:
>
>> Thanks for the patch Linus. I was running into the warning in
>> gpiochip_set_irq_hooks(), because it was called from two places.
>> Hopefully, this will fix that as well. I will give it a try.
>
>That's usually when creating two irqchips from a static config.
>The most common solution is to put struct irq_chip into the
>driver state container and assign all functions dynamically so
>the irqchip is a "live" struct if you see how I mean. This is
>needed because the gpiolib irqchip core will augment some
>of the pointers in the irqchip, so if that is done twice, it feels
>a bit shaky.
>
Yeah, I realized what was happening. I have fixed it in my drivers.
>> On Mon, Jun 24 2019 at 07:29 -0600, Linus Walleij wrote:
>
>> >+ girq->num_parents = 1;
>> >+ girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents),
>> >+ GFP_KERNEL);
>>
>> Could this be folded into the gpiolib?
>
>It is part of the existing API for providing an irq_chip along
>with the gpio_chip but you are right, it's kludgy. I do have
>a patch like this, making the parents a static sized field
>simply:
>https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git/commit/?h=devel-gpio-irqchip
>
>So I might go on this approach. (In a separate patch.)
>
>> >+ /* Get a pointer to the gpio_irq_chip */
>> >+ girq = &g->gc.irq;
>> >+ girq->chip = &g->irq;
>> >+ girq->default_type = IRQ_TYPE_NONE;
>> >+ girq->handler = handle_bad_irq;
>> >+ girq->fwnode = g->fwnode;
>> >+ girq->parent_domain = parent;
>> >+ girq->child_to_parent_hwirq = my_gpio_child_to_parent_hwirq;
>> >+
>> Should be the necessary, if the driver implements it's own .alloc?
>
>The idea is that when using GPIOLIB_IRQCHIP and
>IRQ_DOMAIN_HIERARCHY together, the drivers utilizing
>GPIOLIB_IRQCHIP will rely on the .alloc() and .translate()
>implementations in gpiolib so the ambition is that these should
>cover all hierarchical use cases.
>
>> >+static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
>> >+{
>> >+ if (!gc->irq.parent_domain) {
>> >+ chip_err(gc, "missing parent irqdomain\n");
>> >+ return -EINVAL;
>> >+ }
>> >+
>> >+ if (!gc->irq.parent_domain ||
>> >+ !gc->irq.child_to_parent_hwirq ||
>>
>> This should probably be validated if the .ops have not been set.
>
>Yeah the idea here is a pretty imperialistic one: the gpiolib
>always provide the ops for hierarchical IRQ. The library
>implementation should cover all needs of all consumers,
>for the hierarchical case.
>
>I might be wrong, but then I need to see some example
>of hierarchies that need something more than what the
>gpiolib core is providing and idiomatic enough that it can't
>be rewritten and absolutely must have its own ops.
>
Here is an example of what I am working on [1]. The series is based on
this patch. What I want to point out is the .alloc function. The TLMM
irqchip's parent could be a PDC or a MPM depending on the QCOM SoC
architecture. They behave differently. The PDC takes over for the GPIO
and handles the monitoring etc, while the MPM comes into play only after
the SoC is in low power therefore TLMM needs to do its job. The way to
cleanly support both of themis to have our own .alloc functions to help
understand the the wakeup-parent irqchip's behavior.
Since I need my own .ops, it makes the function below irrelevant to
gpiolib. While I would still need a function to translate to parent
hwirq, I don't see it any beneficial to gpiolib.
thanks,
Lina
>> >+ int (*child_to_parent_hwirq)(struct gpio_chip *chip,
>> >+ unsigned int child_hwirq,
>> >+ unsigned int child_type,
>> >+ unsigned int *parent_hwirq,
>> >+ unsigned int *parent_type);
>>
>> Would irq_fwspec(s) be better than passing all these arguments around?
>
>I looked over these three drivers that I patched in the series
>and they all seemed to need pretty much these arguments,
>so wrapping it into fwspec would probably just make all
>drivers have to unwrap them to get child (I guess not parent)
>back out.
>
>But we can patch it later if it proves this is too much arguments
>for some drivers. Its the right amount for those I changed,
>AFAICT.
>
>Yours,
>Linus Walleij
[1]. https://github.com/i-lina/linux/commits/gpio2-2
^ permalink raw reply
* Re: [PATCH v2 2/8] dt-bindings: pinctrl: aspeed: Convert AST2400 bindings to json-schema
From: Rob Herring @ 2019-06-28 15:46 UTC (permalink / raw)
To: Andrew Jeffery
Cc: open list:GPIO SUBSYSTEM, Ryan Chen, Linus Walleij, Mark Rutland,
Joel Stanley, linux-aspeed, OpenBMC Maillist, devicetree,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
linux-kernel@vger.kernel.org, Johnny Huang
In-Reply-To: <20190628023838.15426-3-andrew@aj.id.au>
On Thu, Jun 27, 2019 at 8:39 PM Andrew Jeffery <andrew@aj.id.au> wrote:
>
> Convert ASPEED pinctrl bindings to DT schema format using json-schema
>
> Cc: Johnny Huang <johnny_huang@aspeedtech.com>
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> ---
> In v2:
>
> * Enforce function/group names in bindings
> * Move description above properties
> * Simplify specification of compatible
> * Cleanup license specification
>
> .../pinctrl/aspeed,ast2400-pinctrl.txt | 80 ------------------
> .../pinctrl/aspeed,ast2400-pinctrl.yaml | 81 +++++++++++++++++++
> 2 files changed, 81 insertions(+), 80 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.txt
> create mode 100644 Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v2 3/8] dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema
From: Rob Herring @ 2019-06-28 15:46 UTC (permalink / raw)
To: Andrew Jeffery
Cc: open list:GPIO SUBSYSTEM, Ryan Chen, Linus Walleij, Mark Rutland,
Joel Stanley, linux-aspeed, OpenBMC Maillist, devicetree,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
linux-kernel@vger.kernel.org, Johnny Huang
In-Reply-To: <20190628023838.15426-4-andrew@aj.id.au>
On Thu, Jun 27, 2019 at 8:39 PM Andrew Jeffery <andrew@aj.id.au> wrote:
>
> Convert ASPEED pinctrl bindings to DT schema format using json-schema.
>
> Cc: Johnny Huang <johnny_huang@aspeedtech.com>
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> ---
> In v2:
>
> * Enforce function/group names in bindings
> * Move description above properties
> * Simplify specification of compatible
> * Cleanup license specification
>
> .../pinctrl/aspeed,ast2500-pinctrl.txt | 119 ----------------
> .../pinctrl/aspeed,ast2500-pinctrl.yaml | 134 ++++++++++++++++++
> 2 files changed, 134 insertions(+), 119 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.txt
> create mode 100644 Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH 39/39] docs: gpio: add sysfs interface to the admin-guide
From: Mauro Carvalho Chehab @ 2019-06-28 12:30 UTC (permalink / raw)
To: Linux Doc Mailing List
Cc: Mauro Carvalho Chehab, Mauro Carvalho Chehab, linux-kernel,
Jonathan Corbet, Linus Walleij, Bartosz Golaszewski,
Rafael J. Wysocki, Len Brown, Harry Wei, Alex Shi, linux-gpio,
linux-acpi
In-Reply-To: <cover.1561724493.git.mchehab+samsung@kernel.org>
While this is stated as obsoleted, the sysfs interface described
there is still valid, and belongs to the admin-guide.
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
---
Documentation/ABI/obsolete/sysfs-gpio | 2 +-
Documentation/{ => admin-guide}/gpio/index.rst | 2 +-
Documentation/{ => admin-guide}/gpio/sysfs.rst | 0
Documentation/admin-guide/index.rst | 1 +
Documentation/firmware-guide/acpi/enumeration.rst | 2 +-
Documentation/translations/zh_CN/gpio.txt | 4 ++--
MAINTAINERS | 2 +-
7 files changed, 7 insertions(+), 6 deletions(-)
rename Documentation/{ => admin-guide}/gpio/index.rst (78%)
rename Documentation/{ => admin-guide}/gpio/sysfs.rst (100%)
diff --git a/Documentation/ABI/obsolete/sysfs-gpio b/Documentation/ABI/obsolete/sysfs-gpio
index 40d41ea1a3f5..e0d4e5e2dd90 100644
--- a/Documentation/ABI/obsolete/sysfs-gpio
+++ b/Documentation/ABI/obsolete/sysfs-gpio
@@ -11,7 +11,7 @@ Description:
Kernel code may export it for complete or partial access.
GPIOs are identified as they are inside the kernel, using integers in
- the range 0..INT_MAX. See Documentation/gpio for more information.
+ the range 0..INT_MAX. See Documentation/admin-guide/gpio for more information.
/sys/class/gpio
/export ... asks the kernel to export a GPIO to userspace
diff --git a/Documentation/gpio/index.rst b/Documentation/admin-guide/gpio/index.rst
similarity index 78%
rename from Documentation/gpio/index.rst
rename to Documentation/admin-guide/gpio/index.rst
index 09a4a553f434..a244ba4e87d5 100644
--- a/Documentation/gpio/index.rst
+++ b/Documentation/admin-guide/gpio/index.rst
@@ -1,4 +1,4 @@
-:orphan:
+.. SPDX-License-Identifier: GPL-2.0
====
gpio
diff --git a/Documentation/gpio/sysfs.rst b/Documentation/admin-guide/gpio/sysfs.rst
similarity index 100%
rename from Documentation/gpio/sysfs.rst
rename to Documentation/admin-guide/gpio/sysfs.rst
diff --git a/Documentation/admin-guide/index.rst b/Documentation/admin-guide/index.rst
index 2c20607e90cd..367097abec78 100644
--- a/Documentation/admin-guide/index.rst
+++ b/Documentation/admin-guide/index.rst
@@ -90,6 +90,7 @@ configure specific aspects of kernel behavior to your liking.
cputopology
device-mapper/index
efi-stub
+ gpio/index
highuid
hw_random
iostats
diff --git a/Documentation/firmware-guide/acpi/enumeration.rst b/Documentation/firmware-guide/acpi/enumeration.rst
index 1252617b520f..0a72b6321f5f 100644
--- a/Documentation/firmware-guide/acpi/enumeration.rst
+++ b/Documentation/firmware-guide/acpi/enumeration.rst
@@ -316,7 +316,7 @@ specifies the path to the controller. In order to use these GPIOs in Linux
we need to translate them to the corresponding Linux GPIO descriptors.
There is a standard GPIO API for that and is documented in
-Documentation/gpio/.
+Documentation/admin-guide/gpio/.
In the above example we can get the corresponding two GPIO descriptors with
a code like this::
diff --git a/Documentation/translations/zh_CN/gpio.txt b/Documentation/translations/zh_CN/gpio.txt
index 4cb1ba8b8fed..a23ee14fc927 100644
--- a/Documentation/translations/zh_CN/gpio.txt
+++ b/Documentation/translations/zh_CN/gpio.txt
@@ -1,4 +1,4 @@
-Chinese translated version of Documentation/gpio
+Chinese translated version of Documentation/admin-guide/gpio
If you have any comment or update to the content, please contact the
original document maintainer directly. However, if you have a problem
@@ -10,7 +10,7 @@ Maintainer: Grant Likely <grant.likely@secretlab.ca>
Linus Walleij <linus.walleij@linaro.org>
Chinese maintainer: Fu Wei <tekkamanninja@gmail.com>
---------------------------------------------------------------------
-Documentation/gpio 的中文翻译
+Documentation/admin-guide/gpio 的中文翻译
如果想评论或更新本文的内容，请直接联系原文档的维护者。如果你使用英文
交流有困难的话，也可以向中文版维护者求助。如果本翻译更新不及时或者翻
diff --git a/MAINTAINERS b/MAINTAINERS
index cda68bbd9d1c..a49698b3becd 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6812,7 +6812,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git
S: Maintained
F: Documentation/devicetree/bindings/gpio/
F: Documentation/driver-api/gpio/
-F: Documentation/gpio/
+F: Documentation/admin-guide/gpio/
F: Documentation/ABI/testing/gpio-cdev
F: Documentation/ABI/obsolete/sysfs-gpio
F: drivers/gpio/
--
2.21.0
^ permalink raw reply related
* [PATCH 24/39] docs: driver-model: move it to the driver-api book
From: Mauro Carvalho Chehab @ 2019-06-28 12:30 UTC (permalink / raw)
To: Linux Doc Mailing List
Cc: Mauro Carvalho Chehab, Mauro Carvalho Chehab, linux-kernel,
Jonathan Corbet, Linus Walleij, Bartosz Golaszewski, Jean Delvare,
Guenter Roeck, Harry Wei, Alex Shi, Greg Kroah-Hartman,
Rafael J. Wysocki, Jeff Kirsher, David S. Miller, David Kershner,
Julia Lawall, Gilles Muller, Nicolas Palix, Michal Marek,
linux-gpio, linux-hwmon, intel-wired-lan, netdev, sparmaintainer,
devel, cocci
In-Reply-To: <cover.1561724493.git.mchehab+samsung@kernel.org>
The audience for the Kernel driver-model is clearly Kernel hackers.
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
---
Documentation/{ => driver-api}/driver-model/binding.rst | 0
Documentation/{ => driver-api}/driver-model/bus.rst | 0
Documentation/{ => driver-api}/driver-model/class.rst | 0
.../{ => driver-api}/driver-model/design-patterns.rst | 0
Documentation/{ => driver-api}/driver-model/device.rst | 0
Documentation/{ => driver-api}/driver-model/devres.rst | 0
Documentation/{ => driver-api}/driver-model/driver.rst | 0
Documentation/{ => driver-api}/driver-model/index.rst | 2 --
Documentation/{ => driver-api}/driver-model/overview.rst | 0
Documentation/{ => driver-api}/driver-model/platform.rst | 0
Documentation/{ => driver-api}/driver-model/porting.rst | 2 +-
Documentation/driver-api/gpio/driver.rst | 2 +-
Documentation/driver-api/index.rst | 1 +
Documentation/eisa.txt | 4 ++--
Documentation/filesystems/sysfs.txt | 2 +-
Documentation/hwmon/submitting-patches.rst | 2 +-
Documentation/translations/zh_CN/filesystems/sysfs.txt | 2 +-
drivers/base/platform.c | 2 +-
drivers/gpio/gpio-cs5535.c | 2 +-
drivers/net/ethernet/intel/ice/ice_main.c | 2 +-
drivers/staging/unisys/Documentation/overview.txt | 4 ++--
include/linux/device.h | 2 +-
include/linux/platform_device.h | 2 +-
scripts/coccinelle/free/devm_free.cocci | 2 +-
24 files changed, 16 insertions(+), 17 deletions(-)
rename Documentation/{ => driver-api}/driver-model/binding.rst (100%)
rename Documentation/{ => driver-api}/driver-model/bus.rst (100%)
rename Documentation/{ => driver-api}/driver-model/class.rst (100%)
rename Documentation/{ => driver-api}/driver-model/design-patterns.rst (100%)
rename Documentation/{ => driver-api}/driver-model/device.rst (100%)
rename Documentation/{ => driver-api}/driver-model/devres.rst (100%)
rename Documentation/{ => driver-api}/driver-model/driver.rst (100%)
rename Documentation/{ => driver-api}/driver-model/index.rst (96%)
rename Documentation/{ => driver-api}/driver-model/overview.rst (100%)
rename Documentation/{ => driver-api}/driver-model/platform.rst (100%)
rename Documentation/{ => driver-api}/driver-model/porting.rst (99%)
diff --git a/Documentation/driver-model/binding.rst b/Documentation/driver-api/driver-model/binding.rst
similarity index 100%
rename from Documentation/driver-model/binding.rst
rename to Documentation/driver-api/driver-model/binding.rst
diff --git a/Documentation/driver-model/bus.rst b/Documentation/driver-api/driver-model/bus.rst
similarity index 100%
rename from Documentation/driver-model/bus.rst
rename to Documentation/driver-api/driver-model/bus.rst
diff --git a/Documentation/driver-model/class.rst b/Documentation/driver-api/driver-model/class.rst
similarity index 100%
rename from Documentation/driver-model/class.rst
rename to Documentation/driver-api/driver-model/class.rst
diff --git a/Documentation/driver-model/design-patterns.rst b/Documentation/driver-api/driver-model/design-patterns.rst
similarity index 100%
rename from Documentation/driver-model/design-patterns.rst
rename to Documentation/driver-api/driver-model/design-patterns.rst
diff --git a/Documentation/driver-model/device.rst b/Documentation/driver-api/driver-model/device.rst
similarity index 100%
rename from Documentation/driver-model/device.rst
rename to Documentation/driver-api/driver-model/device.rst
diff --git a/Documentation/driver-model/devres.rst b/Documentation/driver-api/driver-model/devres.rst
similarity index 100%
rename from Documentation/driver-model/devres.rst
rename to Documentation/driver-api/driver-model/devres.rst
diff --git a/Documentation/driver-model/driver.rst b/Documentation/driver-api/driver-model/driver.rst
similarity index 100%
rename from Documentation/driver-model/driver.rst
rename to Documentation/driver-api/driver-model/driver.rst
diff --git a/Documentation/driver-model/index.rst b/Documentation/driver-api/driver-model/index.rst
similarity index 96%
rename from Documentation/driver-model/index.rst
rename to Documentation/driver-api/driver-model/index.rst
index 9f85d579ce56..755016422269 100644
--- a/Documentation/driver-model/index.rst
+++ b/Documentation/driver-api/driver-model/index.rst
@@ -1,5 +1,3 @@
-:orphan:
-
============
Driver Model
============
diff --git a/Documentation/driver-model/overview.rst b/Documentation/driver-api/driver-model/overview.rst
similarity index 100%
rename from Documentation/driver-model/overview.rst
rename to Documentation/driver-api/driver-model/overview.rst
diff --git a/Documentation/driver-model/platform.rst b/Documentation/driver-api/driver-model/platform.rst
similarity index 100%
rename from Documentation/driver-model/platform.rst
rename to Documentation/driver-api/driver-model/platform.rst
diff --git a/Documentation/driver-model/porting.rst b/Documentation/driver-api/driver-model/porting.rst
similarity index 99%
rename from Documentation/driver-model/porting.rst
rename to Documentation/driver-api/driver-model/porting.rst
index ae4bf843c1d6..931ea879af3f 100644
--- a/Documentation/driver-model/porting.rst
+++ b/Documentation/driver-api/driver-model/porting.rst
@@ -9,7 +9,7 @@ Patrick Mochel
Overview
-Please refer to `Documentation/driver-model/*.rst` for definitions of
+Please refer to `Documentation/driver-api/driver-model/*.rst` for definitions of
various driver types and concepts.
Most of the work of porting devices drivers to the new model happens
diff --git a/Documentation/driver-api/gpio/driver.rst b/Documentation/driver-api/gpio/driver.rst
index 349f2dc33029..921c71a3d683 100644
--- a/Documentation/driver-api/gpio/driver.rst
+++ b/Documentation/driver-api/gpio/driver.rst
@@ -399,7 +399,7 @@ symbol:
will pass the struct gpio_chip* for the chip to all IRQ callbacks, so the
callbacks need to embed the gpio_chip in its state container and obtain a
pointer to the container using container_of().
- (See Documentation/driver-model/design-patterns.rst)
+ (See Documentation/driver-api/driver-model/design-patterns.rst)
- gpiochip_irqchip_add_nested(): adds a nested cascaded irqchip to a gpiochip,
as discussed above regarding different types of cascaded irqchips. The
diff --git a/Documentation/driver-api/index.rst b/Documentation/driver-api/index.rst
index fea0034afa56..93d187bf4853 100644
--- a/Documentation/driver-api/index.rst
+++ b/Documentation/driver-api/index.rst
@@ -14,6 +14,7 @@ available subsections can be seen below.
.. toctree::
:maxdepth: 2
+ driver-model/index
basics
infrastructure
early-userspace/index
diff --git a/Documentation/eisa.txt b/Documentation/eisa.txt
index f388545a85a7..c07565ba57da 100644
--- a/Documentation/eisa.txt
+++ b/Documentation/eisa.txt
@@ -103,7 +103,7 @@ id_table an array of NULL terminated EISA id strings,
(driver_data).
driver a generic driver, such as described in
- Documentation/driver-model/driver.rst. Only .name,
+ Documentation/driver-api/driver-model/driver.rst. Only .name,
.probe and .remove members are mandatory.
=============== ====================================================
@@ -152,7 +152,7 @@ state set of flags indicating the state of the device. Current
flags are EISA_CONFIG_ENABLED and EISA_CONFIG_FORCED.
res set of four 256 bytes I/O regions allocated to this device
dma_mask DMA mask set from the parent device.
-dev generic device (see Documentation/driver-model/device.rst)
+dev generic device (see Documentation/driver-api/driver-model/device.rst)
======== ============================================================
You can get the 'struct eisa_device' from 'struct device' using the
diff --git a/Documentation/filesystems/sysfs.txt b/Documentation/filesystems/sysfs.txt
index 5b5311f9358d..ddf15b1b0d5a 100644
--- a/Documentation/filesystems/sysfs.txt
+++ b/Documentation/filesystems/sysfs.txt
@@ -319,7 +319,7 @@ quick way to lookup the sysfs interface for a device from the result of
a stat(2) operation.
More information can driver-model specific features can be found in
-Documentation/driver-model/.
+Documentation/driver-api/driver-model/.
TODO: Finish this section.
diff --git a/Documentation/hwmon/submitting-patches.rst b/Documentation/hwmon/submitting-patches.rst
index d5b05d3e54ba..452fc28d8e0b 100644
--- a/Documentation/hwmon/submitting-patches.rst
+++ b/Documentation/hwmon/submitting-patches.rst
@@ -89,7 +89,7 @@ increase the chances of your change being accepted.
console. Excessive logging can seriously affect system performance.
* Use devres functions whenever possible to allocate resources. For rationale
- and supported functions, please see Documentation/driver-model/devres.rst.
+ and supported functions, please see Documentation/driver-api/driver-model/devres.rst.
If a function is not supported by devres, consider using devm_add_action().
* If the driver has a detect function, make sure it is silent. Debug messages
diff --git a/Documentation/translations/zh_CN/filesystems/sysfs.txt b/Documentation/translations/zh_CN/filesystems/sysfs.txt
index 452271dda141..ee1f37da5b23 100644
--- a/Documentation/translations/zh_CN/filesystems/sysfs.txt
+++ b/Documentation/translations/zh_CN/filesystems/sysfs.txt
@@ -288,7 +288,7 @@ dev/ 包含两个子目录： char/ 和 block/。在这两个子目录中，有
中相应的设备。/sys/dev 提供一个通过一个 stat(2) 操作结果，查找
设备 sysfs 接口快捷的方法。
-更多有关 driver-model 的特性信息可以在 Documentation/driver-model/
+更多有关 driver-model 的特性信息可以在 Documentation/driver-api/driver-model/
中找到。
diff --git a/drivers/base/platform.c b/drivers/base/platform.c
index 713903290385..506a0175a5a7 100644
--- a/drivers/base/platform.c
+++ b/drivers/base/platform.c
@@ -5,7 +5,7 @@
* Copyright (c) 2002-3 Patrick Mochel
* Copyright (c) 2002-3 Open Source Development Labs
*
- * Please see Documentation/driver-model/platform.rst for more
+ * Please see Documentation/driver-api/driver-model/platform.rst for more
* information.
*/
diff --git a/drivers/gpio/gpio-cs5535.c b/drivers/gpio/gpio-cs5535.c
index 3611a0571667..53b24e3ae7de 100644
--- a/drivers/gpio/gpio-cs5535.c
+++ b/drivers/gpio/gpio-cs5535.c
@@ -41,7 +41,7 @@ MODULE_PARM_DESC(mask, "GPIO channel mask.");
/*
* FIXME: convert this singleton driver to use the state container
- * design pattern, see Documentation/driver-model/design-patterns.rst
+ * design pattern, see Documentation/driver-api/driver-model/design-patterns.rst
*/
static struct cs5535_gpio_chip {
struct gpio_chip chip;
diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c
index 41c90f2ddb31..63db08d9bafa 100644
--- a/drivers/net/ethernet/intel/ice/ice_main.c
+++ b/drivers/net/ethernet/intel/ice/ice_main.c
@@ -2286,7 +2286,7 @@ ice_probe(struct pci_dev *pdev, const struct pci_device_id __always_unused *ent)
struct ice_hw *hw;
int err;
- /* this driver uses devres, see Documentation/driver-model/devres.rst */
+ /* this driver uses devres, see Documentation/driver-api/driver-model/devres.rst */
err = pcim_enable_device(pdev);
if (err)
return err;
diff --git a/drivers/staging/unisys/Documentation/overview.txt b/drivers/staging/unisys/Documentation/overview.txt
index 9ab30af265a5..f8a4144b239c 100644
--- a/drivers/staging/unisys/Documentation/overview.txt
+++ b/drivers/staging/unisys/Documentation/overview.txt
@@ -15,7 +15,7 @@ normally be unsharable, specifically:
* visorinput - keyboard and mouse
These drivers conform to the standard Linux bus/device model described
-within Documentation/driver-model/, and utilize a driver named visorbus to
+within Documentation/driver-api/driver-model/, and utilize a driver named visorbus to
present the virtual busses involved. Drivers in the 'visor*' driver set are
commonly referred to as "guest drivers" or "client drivers". All drivers
except visorbus expose a device of a specific usable class to the Linux guest
@@ -141,7 +141,7 @@ called automatically by the visorbus driver at appropriate times:
-----------------------------------
Because visorbus is a standard Linux bus driver in the model described in
-Documentation/driver-model/, the hierarchy of s-Par virtual devices is
+Documentation/driver-api/driver-model/, the hierarchy of s-Par virtual devices is
published in the sysfs tree beneath /bus/visorbus/, e.g.,
/sys/bus/visorbus/devices/ might look like:
diff --git a/include/linux/device.h b/include/linux/device.h
index 4f65c424e5fd..93b12aec9bff 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -6,7 +6,7 @@
* Copyright (c) 2004-2009 Greg Kroah-Hartman <gregkh@suse.de>
* Copyright (c) 2008-2009 Novell Inc.
*
- * See Documentation/driver-model/ for more information.
+ * See Documentation/driver-api/driver-model/ for more information.
*/
#ifndef _DEVICE_H_
diff --git a/include/linux/platform_device.h b/include/linux/platform_device.h
index beb25f277889..9bc36b589827 100644
--- a/include/linux/platform_device.h
+++ b/include/linux/platform_device.h
@@ -4,7 +4,7 @@
*
* Copyright (c) 2001-2003 Patrick Mochel <mochel@osdl.org>
*
- * See Documentation/driver-model/ for more information.
+ * See Documentation/driver-api/driver-model/ for more information.
*/
#ifndef _PLATFORM_DEVICE_H_
diff --git a/scripts/coccinelle/free/devm_free.cocci b/scripts/coccinelle/free/devm_free.cocci
index fefd0331a2de..441799b5359b 100644
--- a/scripts/coccinelle/free/devm_free.cocci
+++ b/scripts/coccinelle/free/devm_free.cocci
@@ -3,7 +3,7 @@
/// functions. Values allocated using the devm_functions are freed when
/// the device is detached, and thus the use of the standard freeing
/// function would cause a double free.
-/// See Documentation/driver-model/devres.rst for more information.
+/// See Documentation/driver-api/driver-model/devres.rst for more information.
///
/// A difficulty of detecting this problem is that the standard freeing
/// function might be called from a different function than the one
--
2.21.0
^ permalink raw reply related
* Re: [PATCH V5 02/18] pinctrl: tegra: Add suspend and resume support
From: Dmitry Osipenko @ 2019-06-28 12:05 UTC (permalink / raw)
To: Sowjanya Komatineni, thierry.reding, jonathanh, tglx, jason,
marc.zyngier, linus.walleij, stefan, mark.rutland
Cc: pdeschrijver, pgaikwad, sboyd, linux-clk, linux-gpio, jckuo,
josephl, talho, linux-tegra, linux-kernel, mperttunen, spatra,
robh+dt, devicetree
In-Reply-To: <0409f478-e425-4e7f-5fff-8c3a94f47ee8@gmail.com>
28.06.2019 14:56, Dmitry Osipenko пишет:
> 28.06.2019 5:12, Sowjanya Komatineni пишет:
>> This patch adds support for Tegra pinctrl driver suspend and resume.
>>
>> During suspend, context of all pinctrl registers are stored and
>> on resume they are all restored to have all the pinmux and pad
>> configuration for normal operation.
>>
>> Acked-by: Thierry Reding <treding@nvidia.com>
>> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
>> ---
>> int tegra_pinctrl_probe(struct platform_device *pdev,
>> const struct tegra_pinctrl_soc_data *soc_data);
>> #endif
>> diff --git a/drivers/pinctrl/tegra/pinctrl-tegra210.c b/drivers/pinctrl/tegra/pinctrl-tegra210.c
>> index 0b56ad5c9c1c..edd3f4606cdb 100644
>> --- a/drivers/pinctrl/tegra/pinctrl-tegra210.c
>> +++ b/drivers/pinctrl/tegra/pinctrl-tegra210.c
>> @@ -1571,6 +1571,7 @@ static struct platform_driver tegra210_pinctrl_driver = {
>> .driver = {
>> .name = "tegra210-pinctrl",
>> .of_match_table = tegra210_pinctrl_of_match,
>> + .pm = &tegra_pinctrl_pm,
>> },
>> .probe = tegra210_pinctrl_probe,
>> };
>>
>
> Could you please address my comments in the next revision if there will be one?
>
Also, what about adding ".pm' for other Tegras? I'm sure Jon could test them for you.
^ permalink raw reply
* Re: [PATCH V5 02/18] pinctrl: tegra: Add suspend and resume support
From: Dmitry Osipenko @ 2019-06-28 11:56 UTC (permalink / raw)
To: Sowjanya Komatineni, thierry.reding, jonathanh, tglx, jason,
marc.zyngier, linus.walleij, stefan, mark.rutland
Cc: pdeschrijver, pgaikwad, sboyd, linux-clk, linux-gpio, jckuo,
josephl, talho, linux-tegra, linux-kernel, mperttunen, spatra,
robh+dt, devicetree
In-Reply-To: <1561687972-19319-3-git-send-email-skomatineni@nvidia.com>
28.06.2019 5:12, Sowjanya Komatineni пишет:
> This patch adds support for Tegra pinctrl driver suspend and resume.
>
> During suspend, context of all pinctrl registers are stored and
> on resume they are all restored to have all the pinmux and pad
> configuration for normal operation.
>
> Acked-by: Thierry Reding <treding@nvidia.com>
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> ---
> drivers/pinctrl/tegra/pinctrl-tegra.c | 52 ++++++++++++++++++++++++++++++++
> drivers/pinctrl/tegra/pinctrl-tegra.h | 3 ++
> drivers/pinctrl/tegra/pinctrl-tegra210.c | 1 +
> 3 files changed, 56 insertions(+)
>
> diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c
> index 34596b246578..e7c0a1011cba 100644
> --- a/drivers/pinctrl/tegra/pinctrl-tegra.c
> +++ b/drivers/pinctrl/tegra/pinctrl-tegra.c
> @@ -621,6 +621,43 @@ static void tegra_pinctrl_clear_parked_bits(struct tegra_pmx *pmx)
> }
> }
>
> +static int tegra_pinctrl_suspend(struct device *dev)
> +{
> + struct tegra_pmx *pmx = dev_get_drvdata(dev);
> + u32 *backup_regs = pmx->backup_regs;
> + u32 *regs;
> + unsigned int i, j;
In general it's better not to use "j" in conjunction with "i" because they look
similar and I seen quite a lot of bugs caused by unnoticed typos like that. So I'm
suggesting to use "i, k" for clarity.
> +
> + for (i = 0; i < pmx->nbanks; i++) {
> + regs = pmx->regs[i];
> + for (j = 0; j < pmx->reg_bank_size[i] / 4; j++)
> + *backup_regs++ = readl(regs++);
Please use readl_relaxed(), we don't need memory barriers here.
> + }
> +
> + return pinctrl_force_sleep(pmx->pctl);
> +}
> +
> +static int tegra_pinctrl_resume(struct device *dev)
> +{
> + struct tegra_pmx *pmx = dev_get_drvdata(dev);
> + u32 *backup_regs = pmx->backup_regs;
> + u32 *regs;
> + unsigned int i, j;
> +
> + for (i = 0; i < pmx->nbanks; i++) {
> + regs = pmx->regs[i];> + for (j = 0; j < pmx->reg_bank_size[i] / 4; j++)
> + writel(*backup_regs++, regs++);
Same for writel_relaxed(), memory barrier is inserted *before* the write to ensure
that all previous memory stores are completed. IOREMAP'ed memory is strongly-ordered,
memory barriers are not needed here.
> + }
> +
> + return 0;
> +}
> +
> +const struct dev_pm_ops tegra_pinctrl_pm = {
> + .suspend = &tegra_pinctrl_suspend,
> + .resume = &tegra_pinctrl_resume
> +};
> +
> static bool gpio_node_has_range(const char *compatible)
> {
> struct device_node *np;
> @@ -645,6 +682,7 @@ int tegra_pinctrl_probe(struct platform_device *pdev,
> int i;
> const char **group_pins;
> int fn, gn, gfn;
> + unsigned long backup_regs_size = 0;
>
> pmx = devm_kzalloc(&pdev->dev, sizeof(*pmx), GFP_KERNEL);
> if (!pmx)
> @@ -697,6 +735,7 @@ int tegra_pinctrl_probe(struct platform_device *pdev,
> res = platform_get_resource(pdev, IORESOURCE_MEM, i);
> if (!res)
> break;
> + backup_regs_size += resource_size(res);
> }
> pmx->nbanks = i;
>
> @@ -705,11 +744,24 @@ int tegra_pinctrl_probe(struct platform_device *pdev,
> if (!pmx->regs)
> return -ENOMEM;
>
> + pmx->reg_bank_size = devm_kcalloc(&pdev->dev, pmx->nbanks,
> + sizeof(*pmx->reg_bank_size),
> + GFP_KERNEL);
> + if (!pmx->reg_bank_size)
> + return -ENOMEM;
It looks to me that we don't really need to churn with this allocation because the
bank sizes are already a part of the platform driver's description.
We could add a simple helper function that retrieves the bank sizes, like this:
static unsigned int tegra_pinctrl_bank_size(struct device *dev,
unsigned int bank_id)
{
struct platform_device *pdev;
struct resource *res;
pdev = to_platform_device(dev);
res = platform_get_resource(pdev, IORESOURCE_MEM, bank_id);
return resource_size(res) / 4;
}
> + pmx->backup_regs = devm_kzalloc(&pdev->dev, backup_regs_size,
> + GFP_KERNEL);
> + if (!pmx->backup_regs)
> + return -ENOMEM;
> +
> for (i = 0; i < pmx->nbanks; i++) {
> res = platform_get_resource(pdev, IORESOURCE_MEM, i);
> pmx->regs[i] = devm_ioremap_resource(&pdev->dev, res);
> if (IS_ERR(pmx->regs[i]))
> return PTR_ERR(pmx->regs[i]);
> +
> + pmx->reg_bank_size[i] = resource_size(res);
> }
>
> pmx->pctl = devm_pinctrl_register(&pdev->dev, &tegra_pinctrl_desc, pmx);
> diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.h b/drivers/pinctrl/tegra/pinctrl-tegra.h
> index 287702660783..55456f8d44cf 100644
> --- a/drivers/pinctrl/tegra/pinctrl-tegra.h
> +++ b/drivers/pinctrl/tegra/pinctrl-tegra.h
> @@ -17,6 +17,8 @@ struct tegra_pmx {
>
> int nbanks;
> void __iomem **regs;
> + size_t *reg_bank_size;
> + u32 *backup_regs;
> };
>
> enum tegra_pinconf_param {
> @@ -193,6 +195,7 @@ struct tegra_pinctrl_soc_data {
> bool drvtype_in_mux;
> };
>
> +extern const struct dev_pm_ops tegra_pinctrl_pm;
Please add a newline here.
> int tegra_pinctrl_probe(struct platform_device *pdev,
> const struct tegra_pinctrl_soc_data *soc_data);
> #endif
> diff --git a/drivers/pinctrl/tegra/pinctrl-tegra210.c b/drivers/pinctrl/tegra/pinctrl-tegra210.c
> index 0b56ad5c9c1c..edd3f4606cdb 100644
> --- a/drivers/pinctrl/tegra/pinctrl-tegra210.c
> +++ b/drivers/pinctrl/tegra/pinctrl-tegra210.c
> @@ -1571,6 +1571,7 @@ static struct platform_driver tegra210_pinctrl_driver = {
> .driver = {
> .name = "tegra210-pinctrl",
> .of_match_table = tegra210_pinctrl_of_match,
> + .pm = &tegra_pinctrl_pm,
> },
> .probe = tegra210_pinctrl_probe,
> };
>
Could you please address my comments in the next revision if there will be one?
^ permalink raw reply
* Re: [PATCH 1/4 v1] gpio: Add support for hierarchical IRQ domains
From: Linus Walleij @ 2019-06-28 11:11 UTC (permalink / raw)
To: Brian Masney
Cc: open list:GPIO SUBSYSTEM, Bartosz Golaszewski, Thomas Gleixner,
Marc Zyngier, Lina Iyer, Jon Hunter, Sowjanya Komatineni,
Bitan Biswas, linux-tegra, David Daney, Masahiro Yamada,
Thierry Reding
In-Reply-To: <20190628104331.GB17335@onstation.org>
On Fri, Jun 28, 2019 at 11:43 AM Brian Masney <masneyb@onstation.org> wrote:
> I started to convert qcom's spmi-gpio over to this new API. I'm not done
> yet but I noticed that this new API assumes two cells for the parent,
> however spmi-gpio's parent (drivers/spmi/spmi-pmic-arb.c) expects four
> cells. See pmic_gpio_domain_alloc() in
> drivers/pinctrl/qcom/pinctrl-spmi-gpio.c for more details.
>
> What do you think about adding a function pointer to struct
> gpio_irq_chip that is used to populate the parent_fwspec?
I discussed this before with Lina and I naïvely thought we
would have only twocell irqchips... OK I was wrong and
Lina is right.
And I agree, let's put a function pointer for this in gpio_irq_chip
and add code so we default to twocell if it is not specified.
You can hack something up if you like and I will just put that
on top of my patch.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 1/4 v1] gpio: Add support for hierarchical IRQ domains
From: Brian Masney @ 2019-06-28 10:43 UTC (permalink / raw)
To: Linus Walleij
Cc: linux-gpio, Bartosz Golaszewski, Thomas Gleixner, Marc Zyngier,
Lina Iyer, Jon Hunter, Sowjanya Komatineni, Bitan Biswas,
linux-tegra, David Daney, Masahiro Yamada, Thierry Reding
In-Reply-To: <20190624132531.6184-1-linus.walleij@linaro.org>
On Mon, Jun 24, 2019 at 03:25:28PM +0200, Linus Walleij wrote:
> +static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
> + unsigned int irq,
> + unsigned int nr_irqs,
> + void *data)
> +{
> + struct gpio_chip *gc = d->host_data;
> + irq_hw_number_t hwirq;
> + unsigned int type = IRQ_TYPE_NONE;
> + struct irq_fwspec *fwspec = data;
> + int ret;
> + int i;
> +
> + chip_info(gc, "called %s\n", __func__);
> +
> + ret = gpiochip_hierarchy_irq_domain_translate(d, fwspec, &hwirq, &type);
> + if (ret)
> + return ret;
> +
> + chip_info(gc, "allocate IRQ %d..%d, hwirq %lu..%lu\n",
> + irq, irq + nr_irqs - 1,
> + hwirq, hwirq + nr_irqs - 1);
> +
> + for (i = 0; i < nr_irqs; i++) {
> + struct irq_fwspec parent_fwspec;
> + unsigned int parent_hwirq;
> + unsigned int parent_type;
> + struct gpio_irq_chip *girq = &gc->irq;
> +
> + ret = girq->child_to_parent_hwirq(gc, hwirq, type,
> + &parent_hwirq, &parent_type);
> + if (ret) {
> + chip_err(gc, "can't look up hwirq %lu\n", hwirq);
> + return ret;
> + }
> + chip_info(gc, "found parent hwirq %u\n", parent_hwirq);
> +
> + /*
> + * We set handle_bad_irq because the .set_type() should
> + * always be invoked and set the right type of handler.
> + */
> + irq_domain_set_info(d,
> + irq + i,
> + hwirq + i,
> + gc->irq.chip,
> + gc,
> + handle_bad_irq,
> + NULL, NULL);
> + irq_set_probe(irq + i);
> +
> + /*
> + * Create a IRQ fwspec to send up to the parent irqdomain:
> + * specify the hwirq we address on the parent and tie it
> + * all together up the chain.
> + */
> + parent_fwspec.fwnode = d->parent->fwnode;
> + parent_fwspec.param_count = 2;
> + parent_fwspec.param[0] = parent_hwirq;
> + /* This parent only handles asserted level IRQs */
> + parent_fwspec.param[1] = parent_type;
> + chip_info(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
> + irq + i, parent_hwirq);
> + ret = irq_domain_alloc_irqs_parent(d, irq + i, 1,
> + &parent_fwspec);
I started to convert qcom's spmi-gpio over to this new API. I'm not done
yet but I noticed that this new API assumes two cells for the parent,
however spmi-gpio's parent (drivers/spmi/spmi-pmic-arb.c) expects four
cells. See pmic_gpio_domain_alloc() in
drivers/pinctrl/qcom/pinctrl-spmi-gpio.c for more details.
What do you think about adding a function pointer to struct
gpio_irq_chip that is used to populate the parent_fwspec?
Brian
^ permalink raw reply
* [GIT PULL] pin control fixes for v5.2
From: Linus Walleij @ 2019-06-28 9:35 UTC (permalink / raw)
To: Linus Torvalds
Cc: open list:GPIO SUBSYSTEM, linux-kernel, Phil Reid,
Alexandre Belloni, Nicolas Boichat
Hi Linus,
sorry to bomb in fixes this late. Maybe I can comfort you
by saying it is only driver fixes, and mostly IRQ handling
which is something GPIO and pin control drivers never get
right. You think it works and then it doesn't.
It also took some time because we smoked out commit
message syntax issues in linux-next.
Please pull it in!
Yours,
Linus Walleij
The following changes since commit f2c7c76c5d0a443053e94adb9f0918fa2fb85c3a:
Linux 5.2-rc3 (2019-06-02 13:55:33 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git
tags/pinctrl-v5.2-3
for you to fetch changes up to 9d957a959bc8c3dfe37572ac8e99affb5a885965:
pinctrl: mediatek: Update cur_mask in mask/mask ops (2019-06-27
12:22:11 +0100)
----------------------------------------------------------------
Pin control fixes for the v5.2 cycle:
- Fix IRQ setup in the MCP23s08.
- Fix pin setup on pins > 31 in the Ocelot driver.
- Fix IRQs in the Mediatek driver.
----------------------------------------------------------------
Alexandre Belloni (2):
pinctrl: ocelot: fix gpio direction for pins after 31
pinctrl: ocelot: fix pinmuxing for pins after 31
Nicolas Boichat (2):
pinctrl: mediatek: Ignore interrupts that are wake only during resume
pinctrl: mediatek: Update cur_mask in mask/mask ops
Phil Reid (1):
pinctrl: mcp23s08: Fix add_data and irqchip_add_nested call order
drivers/pinctrl/mediatek/mtk-eint.c | 34 +++++++++++++++++++---------------
drivers/pinctrl/pinctrl-mcp23s08.c | 8 ++++----
drivers/pinctrl/pinctrl-ocelot.c | 18 ++++++++++--------
3 files changed, 33 insertions(+), 27 deletions(-)
^ permalink raw reply
* [PATCH V4 2/2] gpio: inverter: document the inverter bindings
From: Harish Jenny K N @ 2019-06-28 9:30 UTC (permalink / raw)
To: Linus Walleij, Bartosz Golaszewski, Rob Herring, Mark Rutland
Cc: devicetree, linux-gpio, Harish Jenny K N,
Balasubramani Vivekanandan
Document the device tree binding for the inverter gpio
controller to configure the polarity of the gpio pins
used by the consumers.
Signed-off-by: Harish Jenny K N <harish_kandiga@mentor.com>
---
.../devicetree/bindings/gpio/gpio-inverter.txt | 29 ++++++++++++++++++++++
1 file changed, 29 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/gpio-inverter.txt
diff --git a/Documentation/devicetree/bindings/gpio/gpio-inverter.txt b/Documentation/devicetree/bindings/gpio/gpio-inverter.txt
new file mode 100644
index 0000000..8bb6b2e
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-inverter.txt
@@ -0,0 +1,29 @@
+GPIO-INVERTER
+======
+This binding defines the gpio-inverter. The gpio-inverter is a driver that
+allows to properly describe the gpio polarities on the hardware.
+
+Please refer to gpio.txt for generic information regarding GPIO bindings.
+
+Required properties:
+- compatible : "gpio-inverter".
+- gpio-controller: Marks the port as GPIO controller.
+- #gpio-cells: One. This is the pin number.
+- inverted-gpios: Array of GPIO pins required from consumers, whose polarity
+ has to be inverted in the driver.
+Note: gpio flag should be set as GPIO_ACTIVE_HIGH. Using GPIO_ACTICE_LOW will
+cause double inversion.
+
+Optional properties:
+- gpio-line-names: Refer to gpio.txt for details regarding this property.
+
+Example:
+
+gpio_inv: gpio-inv {
+ compatible = "gpio-inverter";
+ gpio-controller;
+ #gpio-cells = <1>;
+ inverted-gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>,
+ <&gpio7 0 GPIO_ACTIVE_HIGH>, <&gpio7 1 GPIO_ACTIVE_HIGH>;
+ gpio-line-names = "JTAG_DNL_EN", "lvds-pwrdwn", "lcd-on";
+};
--
2.7.4
^ permalink raw reply related
* Re: [PATCH V4 1/2] gpio: inverter: Add Inverter controller for gpio configuration
From: Linus Walleij @ 2019-06-28 9:22 UTC (permalink / raw)
To: Harish Jenny K N
Cc: Bartosz Golaszewski, open list:GPIO SUBSYSTEM,
Balasubramani Vivekanandan
In-Reply-To: <d70eec4a-a2e3-f312-d3ef-4a2f653ec9de@mentor.com>
On Fri, Jun 28, 2019 at 10:16 AM Harish Jenny K N
<harish_kandiga@mentor.com> wrote:
> On 28/06/19 2:25 PM, Linus Walleij wrote:
> > We still need some review from the DT people before I
> > apply it.
>
> Are the DT people in the same mailing list or do I need to send review request separately ?
Ah I see why you don't get any review on that part.
Make sure to send the DT binding patch to
devicetree@vger.kernel.org
You can just resend that one patch if you like.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH V4 1/2] gpio: inverter: Add Inverter controller for gpio configuration
From: Harish Jenny K N @ 2019-06-28 9:15 UTC (permalink / raw)
To: Linus Walleij
Cc: Bartosz Golaszewski, open list:GPIO SUBSYSTEM,
Balasubramani Vivekanandan
In-Reply-To: <CACRpkdZQpr78=ZzBQEkbjS714W0HPEurO8haM8PpmpvYFivm-A@mail.gmail.com>
On 28/06/19 2:25 PM, Linus Walleij wrote:
> On Fri, Jun 28, 2019 at 6:20 AM Harish Jenny K N
> <harish_kandiga@mentor.com> wrote:
>
>> Provides a new inverter gpio controller to configure the polarity
>> of the gpio pins. This driver enables the consumers to directly
>> use the gpio pin without worrying about the hardware level
>> polarity configuration. Polarity configuration will be done by
>> the inverter gpio controller based on device tree information.
>>
>> Signed-off-by: Balasubramani Vivekanandan <balasubramani_vivekanandan@mentor.com>
>> Signed-off-by: Harish Jenny K N <harish_kandiga@mentor.com>
> This code is finished, very nice.
Thanks.
>
> We still need some review from the DT people before I
> apply it.
Are the DT people in the same mailing list or do I need to send review request separately ?
Regards,
Harish Jenny K N
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