* Re: [PATCH] pinctrl: rzn1: Add of_node_put() before return
From: Geert Uytterhoeven @ 2019-08-05 7:18 UTC (permalink / raw)
To: Nishka Dasgupta
Cc: Geert Uytterhoeven, Linus Walleij, Linux-Renesas,
open list:GPIO SUBSYSTEM, Linux Kernel Mailing List,
Phil Edworthy
In-Reply-To: <20190804154029.2749-1-nishkadg.linux@gmail.com>
CC Phil
On Sun, Aug 4, 2019 at 5:40 PM Nishka Dasgupta <nishkadg.linux@gmail.com> wrote:
> Each iteration of for_each_child_of_node puts the previous node, but in
> the case of a return from the middle of the loop, there is no put, thus
> causing a memory leak. Hence add an of_node_put before the return in
> three places.
> Issue found with Coccinelle.
>
> Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in sh-pfc-for-v5.4.
> ---
> drivers/pinctrl/pinctrl-rzn1.c | 12 +++++++++---
> 1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-rzn1.c b/drivers/pinctrl/pinctrl-rzn1.c
> index cc0e5aa9128a..0f6f8a10a53a 100644
> --- a/drivers/pinctrl/pinctrl-rzn1.c
> +++ b/drivers/pinctrl/pinctrl-rzn1.c
> @@ -412,8 +412,10 @@ static int rzn1_dt_node_to_map(struct pinctrl_dev *pctldev,
>
> for_each_child_of_node(np, child) {
> ret = rzn1_dt_node_to_map_one(pctldev, child, map, num_maps);
> - if (ret < 0)
> + if (ret < 0) {
> + of_node_put(child);
> return ret;
> + }
> }
>
> return 0;
> @@ -792,8 +794,10 @@ static int rzn1_pinctrl_parse_functions(struct device_node *np,
> grp = &ipctl->groups[ipctl->ngroups];
> grp->func = func->name;
> ret = rzn1_pinctrl_parse_groups(child, grp, ipctl);
> - if (ret < 0)
> + if (ret < 0) {
> + of_node_put(child);
> return ret;
> + }
> i++;
> ipctl->ngroups++;
> }
> @@ -838,8 +842,10 @@ static int rzn1_pinctrl_probe_dt(struct platform_device *pdev,
>
> for_each_child_of_node(np, child) {
> ret = rzn1_pinctrl_parse_functions(child, ipctl, i++);
> - if (ret < 0)
> + if (ret < 0) {
> + of_node_put(child);
> return ret;
> + }
> }
>
> return 0;
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH v1] gpio: mpc8xxx: Add new platforms GPIO DT node description
From: Hui Song @ 2019-08-05 7:10 UTC (permalink / raw)
To: Shawn Guo, Li Yang, Rob Herring, Mark Rutland, Linus Walleij,
Bartosz Golaszewski
Cc: linux-arm-kernel, devicetree, linux-kernel, linux-gpio, Song Hui
From: Song Hui <hui.song_1@nxp.com>
Update the NXP GPIO node dt-binding file for QorIQ and
Layerscape platforms, and add one more example with
ls1028a GPIO node.
Signed-off-by: Song Hui <hui.song_1@nxp.com>
---
Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
index 69d4616..fbe6d75 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
@@ -28,7 +28,7 @@ gpio0: gpio@1100 {
Example of gpio-controller node for a ls2080a SoC:
gpio0: gpio@2300000 {
- compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
+ compatible = "fsl,ls1028a-gpio","fsl,ls2080a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x2300000 0x0 0x10000>;
interrupts = <0 36 0x4>; /* Level high type */
gpio-controller;
--
2.9.5
^ permalink raw reply related
* Re: [PATCH 05/14] gpio: lpc32xx: allow building on non-lpc32xx targets
From: Bartosz Golaszewski @ 2019-08-05 8:27 UTC (permalink / raw)
To: Arnd Bergmann
Cc: soc, arm-soc, Vladimir Zapolskiy, Sylvain Lemieux, Russell King,
Gregory Clement, Linus Walleij, Jason Cooper, Andrew Lunn,
Sebastian Hesselbarth, David S. Miller, Greg Kroah-Hartman,
Alan Stern, Guenter Roeck, linux-gpio, netdev, linux-serial,
USB list, LINUXWATCHDOG, Lee Jones, LKML
In-Reply-To: <CAK8P3a3KpKvRKXY72toE_5eAp4ER_Mre0GX3guwGeQgsY2HX+g@mail.gmail.com>
pt., 2 sie 2019 o 13:20 Arnd Bergmann <arnd@arndb.de> napisał(a):
>
> On Fri, Aug 2, 2019 at 9:10 AM Bartosz Golaszewski
> <bgolaszewski@baylibre.com> wrote:
> > > -#include <mach/hardware.h>
> > > -#include <mach/platform.h>
> > > +#define _GPREG(x) (x)
> >
> > What purpose does this macro serve?
> >
> > >
> > > #define LPC32XX_GPIO_P3_INP_STATE _GPREG(0x000)
> > > #define LPC32XX_GPIO_P3_OUTP_SET _GPREG(0x004)
>
> In the existing code base, this macro converts a register offset to
> an __iomem pointer for a gpio register. I changed the definition of the
> macro here to keep the number of changes down, but I it's just
> as easy to remove it if you prefer.
Could you just add a comment so that it's clear at first glance?
>
> > > @@ -167,14 +166,26 @@ struct lpc32xx_gpio_chip {
> > > struct gpio_regs *gpio_grp;
> > > };
> > >
> > > +void __iomem *gpio_reg_base;
> >
> > Any reason why this can't be made part of struct lpc32xx_gpio_chip?
>
> It could be, but it's the same for each instance, and not known until
> probe() time, so the same pointer would need to be copied into each
> instance that is otherwise read-only.
>
> Let me know if you'd prefer me to rework these two things or leave
> them as they are.
I would prefer not to have global state in the driver, let's just
store the pointer in the data passed to gpiochip_add_data().
Bart
>
> > > +static inline u32 gpreg_read(unsigned long offset)
> >
> > Here and elsewhere: could you please keep the lpc32xx_gpio prefix for
> > all symbols?
>
> Sure.
>
> Arnd
^ permalink raw reply
* Re: [PATCH] gpiolib: Take MUX usage into account
From: Bartosz Golaszewski @ 2019-08-05 8:33 UTC (permalink / raw)
To: Ramon Fried; +Cc: Linus Walleij, linux-gpio, LKML, Stefan Wahren
In-Reply-To: <20190803133436.15016-1-rfried.dev@gmail.com>
sob., 3 sie 2019 o 15:34 Ramon Fried <rfried.dev@gmail.com> napisał(a):
>
> From: Stefan Wahren <stefan.wahren@i2se.com>
>
> The user space like gpioinfo only see the GPIO usage but not the
> MUX usage (e.g. I2C or SPI usage) of a pin. As a user we want to know which
> pin is free/safe to use. So take the MUX usage of strict pinmux controllers
> into account to get a more realistic view for ioctl GPIO_GET_LINEINFO_IOCTL.
>
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
> Tested-By: Ramon Fried <rfried.dev@gmail.com>
> Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
> ---
> Sending Stefan's RFC as patch, as I tested it and it seems to work,
> additionally, an accompanying fix was made by me to gpiolibd to fix a
> display error of the actual result:
> https://patchwork.ozlabs.org/patch/1139923/
>
> drivers/gpio/gpiolib.c | 3 ++-
> drivers/pinctrl/core.c | 23 +++++++++++++++++++++++
> drivers/pinctrl/pinmux.c | 18 ++++++++++++++++++
> drivers/pinctrl/pinmux.h | 7 +++++++
> include/linux/pinctrl/consumer.h | 6 ++++++
> 5 files changed, 56 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
> index e013d417a936..2fd9eee0b98c 100644
> --- a/drivers/gpio/gpiolib.c
> +++ b/drivers/gpio/gpiolib.c
> @@ -1082,7 +1082,8 @@ static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
> test_bit(FLAG_IS_HOGGED, &desc->flags) ||
> test_bit(FLAG_USED_AS_IRQ, &desc->flags) ||
> test_bit(FLAG_EXPORT, &desc->flags) ||
> - test_bit(FLAG_SYSFS, &desc->flags))
> + test_bit(FLAG_SYSFS, &desc->flags) ||
> + pinctrl_gpio_is_in_use(chip->base + lineinfo.line_offset))
> lineinfo.flags |= GPIOLINE_FLAG_KERNEL;
> if (test_bit(FLAG_IS_OUT, &desc->flags))
> lineinfo.flags |= GPIOLINE_FLAG_IS_OUT;
> diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c
> index a64849a9d1b0..0dd00c175eed 100644
> --- a/drivers/pinctrl/core.c
> +++ b/drivers/pinctrl/core.c
> @@ -759,6 +759,29 @@ int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
> return -EINVAL;
> }
>
> +bool pinctrl_gpio_is_in_use(unsigned gpio)
> +{
> + struct pinctrl_dev *pctldev;
> + struct pinctrl_gpio_range *range;
> + bool result;
> + int pin;
> +
> + if (pinctrl_get_device_gpio_range(gpio, &pctldev, &range))
> + return false;
> +
> + mutex_lock(&pctldev->mutex);
> +
> + /* Convert to the pin controllers number space */
> + pin = gpio_to_pin(range, gpio);
> +
> + result = pinmux_is_in_use(pctldev, pin);
> +
> + mutex_unlock(&pctldev->mutex);
> +
> + return result;
> +}
> +EXPORT_SYMBOL_GPL(pinctrl_gpio_is_in_use);
> +
> /**
> * pinctrl_gpio_request() - request a single pin to be used as GPIO
> * @gpio: the GPIO pin number from the GPIO subsystem number space
> diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c
> index 020e54f843f9..02d2751a4884 100644
> --- a/drivers/pinctrl/pinmux.c
> +++ b/drivers/pinctrl/pinmux.c
> @@ -70,6 +70,24 @@ int pinmux_validate_map(const struct pinctrl_map *map, int i)
> return 0;
> }
>
> +bool pinmux_is_in_use(struct pinctrl_dev *pctldev, unsigned pin)
> +{
> + struct pin_desc *desc = pin_desc_get(pctldev, pin);
> + const struct pinmux_ops *ops = pctldev->desc->pmxops;
> +
> + if (!desc) {
> + dev_err(pctldev->dev,
> + "pin %u is not registered so it cannot be requested\n",
> + pin);
> + return false;
> + }
> +
> + if (ops->strict && desc->mux_usecount)
> + return true;
> +
> + return ops->strict && !!desc->gpio_owner;
> +}
> +
> /**
> * pin_request() - request a single pin to be muxed in, typically for GPIO
> * @pin: the pin number in the global pin space
> diff --git a/drivers/pinctrl/pinmux.h b/drivers/pinctrl/pinmux.h
> index 794cb3a003ff..24ae61136803 100644
> --- a/drivers/pinctrl/pinmux.h
> +++ b/drivers/pinctrl/pinmux.h
> @@ -15,6 +15,8 @@ int pinmux_check_ops(struct pinctrl_dev *pctldev);
>
> int pinmux_validate_map(const struct pinctrl_map *map, int i);
>
> +bool pinmux_is_in_use(struct pinctrl_dev *pctldev, unsigned pin);
> +
> int pinmux_request_gpio(struct pinctrl_dev *pctldev,
> struct pinctrl_gpio_range *range,
> unsigned pin, unsigned gpio);
> @@ -42,6 +44,11 @@ static inline int pinmux_validate_map(const struct pinctrl_map *map, int i)
> return 0;
> }
>
> +static inline bool pinmux_is_in_use(struct pinctrl_dev *pctldev, unsigned pin)
> +{
> + return false;
> +}
> +
> static inline int pinmux_request_gpio(struct pinctrl_dev *pctldev,
> struct pinctrl_gpio_range *range,
> unsigned pin, unsigned gpio)
> diff --git a/include/linux/pinctrl/consumer.h b/include/linux/pinctrl/consumer.h
> index 86720a5a384f..d26826b057a1 100644
> --- a/include/linux/pinctrl/consumer.h
> +++ b/include/linux/pinctrl/consumer.h
> @@ -24,6 +24,7 @@ struct device;
> #ifdef CONFIG_PINCTRL
>
> /* External interface to pin control */
> +extern bool pinctrl_gpio_is_in_use(unsigned gpio);
> extern int pinctrl_gpio_request(unsigned gpio);
> extern void pinctrl_gpio_free(unsigned gpio);
> extern int pinctrl_gpio_direction_input(unsigned gpio);
> @@ -61,6 +62,11 @@ static inline int pinctrl_pm_select_idle_state(struct device *dev)
>
> #else /* !CONFIG_PINCTRL */
>
> +static inline bool pinctrl_gpio_is_in_use(unsigned gpio)
> +{
> + return 0;
> +}
> +
> static inline int pinctrl_gpio_request(unsigned gpio)
> {
> return 0;
> --
> 2.22.0
>
Looks good to me.
Linus: do you see any issues with that? If not, I can pick it up.
Bart
^ permalink raw reply
* Re: [PATCH] pinctrl: pinctrl-single: add header include guard
From: Linus Walleij @ 2019-08-05 9:09 UTC (permalink / raw)
To: Masahiro Yamada; +Cc: open list:GPIO SUBSYSTEM, linux-kernel@vger.kernel.org
In-Reply-To: <20190720115858.7015-1-yamada.masahiro@socionext.com>
On Sat, Jul 20, 2019 at 1:59 PM Masahiro Yamada
<yamada.masahiro@socionext.com> wrote:
> Add a header include guard just in case.
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Patch applied.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 2/2] [PATCH] gpio: Explicitly cast from __be16 to unsigned short
From: Linus Walleij @ 2019-08-05 9:10 UTC (permalink / raw)
To: Hennie Muller, Arnd Bergmann
Cc: Bartosz Golaszewski, open list:GPIO SUBSYSTEM,
linux-kernel@vger.kernel.org
In-Reply-To: <20190721125259.13990-2-hm@bitlabs.co.za>
On Sun, Jul 21, 2019 at 2:53 PM Hennie Muller <hm@bitlabs.co.za> wrote:
> cpu_to_be16 returns a __be16 value. This does not break anything
> but does cause sparse to generate unnecessary warnings.
>
> Signed-off-by: Hennie Muller <hm@bitlabs.co.za>
(...)
> - gbmsg->val = cpu_to_be16(dir << offset);
> - gbmsg->mask = cpu_to_be16(0x0001 << offset);
> + gbmsg->val = (__force u16)cpu_to_be16(dir << offset);
> + gbmsg->mask = (__force u16)cpu_to_be16(0x0001 << offset);
Ugh I don't understand this.
Arnd: you know this better than me: is this the right thing to do
to get rid of sparse warnings from the code?
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH v7 01/20] pinctrl: tegra: Add suspend and resume support
From: Linus Walleij @ 2019-08-05 9:20 UTC (permalink / raw)
To: Sowjanya Komatineni
Cc: thierry.reding@gmail.com, Jon Hunter, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Stefan Agner, Mark Rutland,
Peter De Schrijver, Prashant Gaikwad, Stephen Boyd, linux-clk,
open list:GPIO SUBSYSTEM, jckuo, Joseph Lo, talho, linux-tegra,
linux-kernel@vger.kernel.org, Mikko Perttunen, spatra,
Rob Herring, Dmitry Osipenko,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Rafael J. Wysocki, viresh kumar, Linux PM list
In-Reply-To: <1564607463-28802-2-git-send-email-skomatineni@nvidia.com>
On Wed, Jul 31, 2019 at 11:11 PM Sowjanya Komatineni
<skomatineni@nvidia.com> wrote:
> This patch adds support for Tegra pinctrl driver suspend and resume.
>
> During suspend, context of all pinctrl registers are stored and
> on resume they are all restored to have all the pinmux and pad
> configuration for normal operation.
>
> Acked-by: Thierry Reding <treding@nvidia.com>
> Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Patch applied to the pinctrl tree.
This patch seems finished.
Also if the rest don't get merged for v5.4 then at least this is so
your patch stack gets more shallow.
I hope it's fine to merge this separately, else tell me and I'll
pull it out.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH v7 02/20] pinctrl: tegra210: Add Tegra210 pinctrl pm ops
From: Linus Walleij @ 2019-08-05 9:21 UTC (permalink / raw)
To: Sowjanya Komatineni
Cc: thierry.reding@gmail.com, Jon Hunter, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Stefan Agner, Mark Rutland,
Peter De Schrijver, Prashant Gaikwad, Stephen Boyd, linux-clk,
open list:GPIO SUBSYSTEM, jckuo, Joseph Lo, talho, linux-tegra,
linux-kernel@vger.kernel.org, Mikko Perttunen, spatra,
Rob Herring, Dmitry Osipenko,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Rafael J. Wysocki, viresh kumar, Linux PM list
In-Reply-To: <1564607463-28802-3-git-send-email-skomatineni@nvidia.com>
On Wed, Jul 31, 2019 at 11:11 PM Sowjanya Komatineni
<skomatineni@nvidia.com> wrote:
> This patch adds suspend and resume functionality to Tegra210 pinctrl.
>
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Patch applied to the pinctrl tree.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH v2] arm64: dts: ls1028a: fix gpio nodes
From: Hui Song @ 2019-08-05 9:14 UTC (permalink / raw)
To: linux-devel
Cc: linux-arm-kernel, devicetree, linux-kernel, linux-gpio, Song Hui
From: Song Hui <hui.song_1@nxp.com>
Update the nodes to include little-endian
property to be consistent with the hardware.
Signed-off-by: Song Hui <hui.song_1@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index aef5b06..7ccbbfc 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -277,33 +277,36 @@
};
gpio1: gpio@2300000 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
reg = <0x0 0x2300000 0x0 0x10000>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
gpio2: gpio@2310000 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
reg = <0x0 0x2310000 0x0 0x10000>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
gpio3: gpio@2320000 {
- compatible = "fsl,qoriq-gpio";
+ compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
reg = <0x0 0x2320000 0x0 0x10000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ little-endian;
};
usb0: usb@3100000 {
--
2.9.5
^ permalink raw reply related
* [PATCH v1] gpio: mpc8xxx: Add new platforms GPIO DT node description
From: Hui Song @ 2019-08-05 9:14 UTC (permalink / raw)
To: linux-devel
Cc: linux-arm-kernel, devicetree, linux-kernel, linux-gpio, Song Hui
In-Reply-To: <20190805091432.9656-1-hui.song_1@nxp.com>
From: Song Hui <hui.song_1@nxp.com>
Update the NXP GPIO node dt-binding file for QorIQ and
Layerscape platforms, and add one more example with
ls1028a GPIO node.
Signed-off-by: Song Hui <hui.song_1@nxp.com>
---
Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
index 69d4616..fbe6d75 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
@@ -28,7 +28,7 @@ gpio0: gpio@1100 {
Example of gpio-controller node for a ls2080a SoC:
gpio0: gpio@2300000 {
- compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
+ compatible = "fsl,ls1028a-gpio","fsl,ls2080a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x2300000 0x0 0x10000>;
interrupts = <0 36 0x4>; /* Level high type */
gpio-controller;
--
2.9.5
^ permalink raw reply related
* Re: [PATCH 1/2] [PATCH] gpio: Replace usage of bare 'unsigned' with 'unsigned int'
From: Linus Walleij @ 2019-08-05 9:26 UTC (permalink / raw)
To: Hennie Muller
Cc: Phil Reid, Bartosz Golaszewski, open list:GPIO SUBSYSTEM,
linux-kernel@vger.kernel.org
In-Reply-To: <20190722045154.rp2sqr2mxdmfn5qj@manjaro-1>
On Mon, Jul 22, 2019 at 6:52 AM Hennie Muller <hm@bitlabs.co.za> wrote:
> On Mon, Jul 22, 2019 at 10:05:00AM +0800, Phil Reid wrote:
> > I've encountered these checkpatch warnings as well.
> >
> > However 'struct gpio_chip' callbacks define the function signatures
> > as 'unsigned', not 'unsigned int'. So I've also left them as is, to explicitly
> > match the struct definition.
> >
> > Be interested to know what the official take on this is.
> In hindsight, I saw most of the other gpio drivers follow the same
> convention as the viperboard driver. which means
> a) my changes add no value and just creates inconsistency.
> or
> b) there's an opportunity to fix up the rest of the gpio drivers as
> well? Which I'll be happy to do.
I think it is fine to fix this in drivers and we can fix the prototypes
as well.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 1/2] [PATCH] gpio: Replace usage of bare 'unsigned' with 'unsigned int'
From: Linus Walleij @ 2019-08-05 9:27 UTC (permalink / raw)
To: Hennie Muller
Cc: Bartosz Golaszewski, open list:GPIO SUBSYSTEM,
linux-kernel@vger.kernel.org
In-Reply-To: <20190721125259.13990-1-hm@bitlabs.co.za>
On Sun, Jul 21, 2019 at 2:53 PM Hennie Muller <hm@bitlabs.co.za> wrote:
> Fixes a couple of warnings by checkpatch and sparse.
>
> Signed-off-by: Hennie Muller <hm@bitlabs.co.za>
Patch applied.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 11/18] dt-bindings: pinctrl: bcm2835: Add brcm,bcm2711 compatible
From: Linus Walleij @ 2019-08-05 9:30 UTC (permalink / raw)
To: Stefan Wahren
Cc: Eric Anholt, Florian Fainelli, Ray Jui, Scott Branden,
Nicolas Saenz Julienne, Matthias Brugger, Rob Herring,
Mark Rutland, Michael Turquette, Stephen Boyd, Ulf Hansson,
Adrian Hunter, bcm-kernel-feedback-list, Linux ARM,
linux-rpi-kernel, open list:GPIO SUBSYSTEM, linux-mmc,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
In-Reply-To: <1563776607-8368-2-git-send-email-wahrenst@gmx.net>
On Mon, Jul 22, 2019 at 8:23 AM Stefan Wahren <wahrenst@gmx.net> wrote:
> Add a new compatible for the BCM2711.
>
> Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
(...)
> + "brcm,bcm2711-gpio" - BCM2711 compatible pinctrl
Completely uncontroversial so patch applied.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 00/18] ARM: Add minimal Raspberry Pi 4 support
From: Linus Walleij @ 2019-08-05 9:33 UTC (permalink / raw)
To: Stefan Wahren
Cc: Michael Turquette, Stephen Boyd, Eric Anholt, Florian Fainelli,
Ray Jui, Scott Branden, Nicolas Saenz Julienne, Matthias Brugger,
Rob Herring, Mark Rutland, Ulf Hansson, Adrian Hunter,
bcm-kernel-feedback-list, Linux ARM, linux-rpi-kernel,
open list:GPIO SUBSYSTEM, linux-mmc
In-Reply-To: <319549e0-23b5-4a49-49ae-723da754f984@gmx.net>
On Sun, Jul 28, 2019 at 1:22 PM Stefan Wahren <wahrenst@gmx.net> wrote:
> any comments on the clk / pinctrl parts or do you just wait for Rob's Ack?
I'm just gonna apply it.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 12/18] pinctrl: bcm2835: Add support for BCM2711 pull-up functionality
From: Linus Walleij @ 2019-08-05 9:38 UTC (permalink / raw)
To: Stefan Wahren
Cc: Eric Anholt, Florian Fainelli, Ray Jui, Scott Branden,
Nicolas Saenz Julienne, Matthias Brugger, Rob Herring,
Mark Rutland, Michael Turquette, Stephen Boyd, Ulf Hansson,
Adrian Hunter, bcm-kernel-feedback-list, Linux ARM,
linux-rpi-kernel, open list:GPIO SUBSYSTEM, linux-mmc
In-Reply-To: <1563776607-8368-3-git-send-email-wahrenst@gmx.net>
On Mon, Jul 22, 2019 at 8:24 AM Stefan Wahren <wahrenst@gmx.net> wrote:
> The BCM2711 has a new way of selecting the pull-up/pull-down setting
> for a GPIO pin. The registers used for the BCM2835, GP_PUD and
> GP_PUDCLKn0, are no longer connected. A new set of registers,
> GP_GPIO_PUP_PDN_CNTRL_REGx must be used. This commit will add
> a new compatible string "brcm,bcm2711-gpio" and the kernel
> driver will use it to select which method is used to select
> pull-up/pull-down.
>
> This patch based on a patch by Al Cooper which was intended for the
> BCM7211. This is a bugfixed and improved version.
>
> Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Patch applied.
I think I complained about some other version of this patch, this one
looks entirely acceptable.
Can we get rid of custom pull settings etc from the upstream device
trees so we don't set bad examples? I have a strong urge to
throw in a pr_warn() about any use of it.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 1/4] gpio: arizona: Use local copy of pdata
From: Linus Walleij @ 2019-08-05 9:42 UTC (permalink / raw)
To: Charles Keepax; +Cc: Bartosz Golaszewski, open list:GPIO SUBSYSTEM, patches
In-Reply-To: <20190722090748.20807-1-ckeepax@opensource.cirrus.com>
On Mon, Jul 22, 2019 at 11:07 AM Charles Keepax
<ckeepax@opensource.cirrus.com> wrote:
> A local copy of the pdata exists and it should be used rather than
> pulling a fresh copy.
>
> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Patch applied.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 2/4] gpio: madera: Use local copy of pdata
From: Linus Walleij @ 2019-08-05 9:43 UTC (permalink / raw)
To: Charles Keepax; +Cc: Bartosz Golaszewski, open list:GPIO SUBSYSTEM, patches
In-Reply-To: <20190722090748.20807-2-ckeepax@opensource.cirrus.com>
On Mon, Jul 22, 2019 at 11:07 AM Charles Keepax
<ckeepax@opensource.cirrus.com> wrote:
> A local copy of the pdata exists and it should be used rather than
> pulling a fresh copy.
>
> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Patch applied.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 3/4] gpio: madera: Add support for Cirrus Logic CS47L15
From: Linus Walleij @ 2019-08-05 9:45 UTC (permalink / raw)
To: Charles Keepax; +Cc: Bartosz Golaszewski, open list:GPIO SUBSYSTEM, patches
In-Reply-To: <20190722090748.20807-3-ckeepax@opensource.cirrus.com>
On Mon, Jul 22, 2019 at 11:07 AM Charles Keepax
<ckeepax@opensource.cirrus.com> wrote:
> From: Richard Fitzgerald <rf@opensource.cirrus.com>
>
> As the gpio is common to all madera codecs all that is needed
> is to setup the correct number of GPIO pins for the CS47L15.
>
> Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Patch applied.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 4/4] gpio: madera: Add support for Cirrus Logic CS47L92
From: Linus Walleij @ 2019-08-05 9:45 UTC (permalink / raw)
To: Charles Keepax; +Cc: Bartosz Golaszewski, open list:GPIO SUBSYSTEM, patches
In-Reply-To: <20190722090748.20807-4-ckeepax@opensource.cirrus.com>
On Mon, Jul 22, 2019 at 11:07 AM Charles Keepax
<ckeepax@opensource.cirrus.com> wrote:
> As the gpio is common to all madera codecs all that is needed
> is to setup the correct number of GPIO pins for the CS47L92.
>
> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Patch applied.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 1/3] pinctrl: madera: Use local copy of pdata
From: Linus Walleij @ 2019-08-05 9:46 UTC (permalink / raw)
To: Charles Keepax; +Cc: open list:GPIO SUBSYSTEM, patches
In-Reply-To: <20190722091015.20884-1-ckeepax@opensource.cirrus.com>
On Mon, Jul 22, 2019 at 11:10 AM Charles Keepax
<ckeepax@opensource.cirrus.com> wrote:
> A local copy of the pdata exists and it should be used rather than
> pulling a fresh copy.
>
> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Patch applied.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 2/3] pinctrl: madera: Add configuration for Cirrus Logic CS47L15
From: Linus Walleij @ 2019-08-05 9:47 UTC (permalink / raw)
To: Charles Keepax; +Cc: open list:GPIO SUBSYSTEM, patches
In-Reply-To: <20190722091015.20884-2-ckeepax@opensource.cirrus.com>
On Mon, Jul 22, 2019 at 11:10 AM Charles Keepax
<ckeepax@opensource.cirrus.com> wrote:
> From: Richard Fitzgerald <rf@opensource.cirrus.com>
>
> This adds the pinctrl configuration for the CS47L15 codec to
> the madera pinctrl driver.
>
> Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Patch applied.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 3/3] pinctrl: madera: Add configuration for Cirrus Logic CS47L92
From: Linus Walleij @ 2019-08-05 9:48 UTC (permalink / raw)
To: Charles Keepax; +Cc: open list:GPIO SUBSYSTEM, patches
In-Reply-To: <20190722091015.20884-3-ckeepax@opensource.cirrus.com>
On Mon, Jul 22, 2019 at 11:10 AM Charles Keepax
<ckeepax@opensource.cirrus.com> wrote:
> This adds the pinctrl configuration for the CS47L92 codec to
> the madera pinctrl driver.
>
> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Patch applied.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH v1] gpio: mpc8xxx: Add new platforms GPIO DT node description
From: Alexander Stein @ 2019-08-05 9:47 UTC (permalink / raw)
To: Hui Song
Cc: linux-devel, linux-arm-kernel, devicetree, linux-kernel,
linux-gpio
In-Reply-To: <20190805091432.9656-2-hui.song_1@nxp.com>
On Monday, August 5, 2019, 11:14:32 AM CEST Hui Song wrote:
> From: Song Hui <hui.song_1@nxp.com>
>
> Update the NXP GPIO node dt-binding file for QorIQ and
> Layerscape platforms, and add one more example with
> ls1028a GPIO node.
>
> Signed-off-by: Song Hui <hui.song_1@nxp.com>
> ---
> Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
> index 69d4616..fbe6d75 100644
> --- a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
> +++ b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
> @@ -28,7 +28,7 @@ gpio0: gpio@1100 {
> Example of gpio-controller node for a ls2080a SoC:
^^^^^^^ ^^^^^^^
This is an example for ls2080a...
> gpio0: gpio@2300000 {
> - compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
> + compatible = "fsl,ls1028a-gpio","fsl,ls2080a-gpio", "fsl,qoriq-gpio";
so I doubt there should be a ls1028a compatible here though.
> reg = <0x0 0x2300000 0x0 0x10000>;
> interrupts = <0 36 0x4>; /* Level high type */
> gpio-controller;
Best regards,
Alexander
^ permalink raw reply
* Re: [PATCH v1 1/2] pinctrl: msm: Switch to use device_property_count_uXX()
From: Linus Walleij @ 2019-08-05 10:01 UTC (permalink / raw)
To: Andy Shevchenko
Cc: Bjorn Andersson, Andy Gross, MSM, open list:GPIO SUBSYSTEM
In-Reply-To: <20190723192738.68486-1-andriy.shevchenko@linux.intel.com>
On Tue, Jul 23, 2019 at 9:27 PM Andy Shevchenko
<andriy.shevchenko@linux.intel.com> wrote:
> Use use device_property_count_uXX() directly, that makes code neater.
>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
(...)
> /* The number of GPIOs in the ACPI tables */
> - len = ret = device_property_read_u16_array(pctrl->dev, "gpios", NULL,
> - 0);
> + len = ret = device_property_count_u16(pctrl->dev, "gpios");
Patch applied (makes the kernel a better place) but:
Can't we just use: gpiod_count(pctrl->dev, NULL); ?
It's more to the point when counting gpios I think.
However this driver is not includeing <linux/gpio/consumer.h>
and is this "gpios" property really a consumer property? I think
so but...
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH v1 2/2] pinctrl: qdf2xxx: Switch to use device_property_count_uXX()
From: Linus Walleij @ 2019-08-05 10:02 UTC (permalink / raw)
To: Andy Shevchenko
Cc: Bjorn Andersson, Andy Gross, MSM, open list:GPIO SUBSYSTEM
In-Reply-To: <20190723192738.68486-2-andriy.shevchenko@linux.intel.com>
On Tue, Jul 23, 2019 at 9:27 PM Andy Shevchenko
<andriy.shevchenko@linux.intel.com> wrote:
> Use use device_property_count_uXX() directly, that makes code neater.
>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Patch applied. (Same comment.)
Yours,
Linus Walleij
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox