From: sashiko-bot@kernel.org
To: shao.mingyin@zte.com.cn
Cc: linux-gpio@vger.kernel.org
Subject: Re: [PATCH 3/5] pwm: adp5585: Clamp on/off counters to the 16 bit register range
Date: Fri, 06 Nov 2026 16:27:38 +0000 [thread overview]
Message-ID: <sashiko-outbox-201810@kernel.org> (raw)
In-Reply-To: <20261107000733118AdMi1NdZNf834PvT-O3bC@zte.com.cn>
Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] pwm: adp5585: clamp on before computing off in
pwm_adp5585_apply()
--
commit 636e863f3fd6ed7ec6fcc05f5eed5bd16bc080a9
Author: Shao Mingyin <shao.mingyin@zte.com.cn>
pwm: adp5585: Clamp on/off counters to the 16 bit register range
This commit clamps the on and off counter values in pwm_adp5585_apply() to
0xffff before writing them to the 16-bit hardware registers.
> diff --git a/drivers/pwm/pwm-adp5585.c b/drivers/pwm/pwm-adp5585.c
> index 9a1dbba75bc14..da83fcd35e1d7 100644
> --- a/drivers/pwm/pwm-adp5585.c
> +++ b/drivers/pwm/pwm-adp5585.c
> @@ -96,6 +96,13 @@ static int pwm_adp5585_apply(struct pwm_chip *chip,
> on = div_u64(duty_cycle, NSEC_PER_SEC / ADP5585_PWM_OSC_FREQ_HZ);
> off = div_u64(period, NSEC_PER_SEC / ADP5585_PWM_OSC_FREQ_HZ) - on;
>
> + /*
> + * The on/off registers are 16 bits wide, clamp the counter values so
> + * that cpu_to_le16() below can't silently truncate them.
> + */
> + on = min_t(u32, on, 0xffff);
> + off = min_t(u32, off, 0xffff);
> +
> val = cpu_to_le16(off);
> ret = regmap_bulk_write(regmap, info->pwm_offt_low, &val, 2);
> if (ret)
[Severity: Medium]
Should on be clamped to 0xffff before subtracting it to compute off?
The hardware PWM period is the sum of the on and off counters:
drivers/pwm/pwm-adp5585.c:pwm_adp5585_get_state() {
...
state->duty_cycle = on * (NSEC_PER_SEC / ADP5585_PWM_OSC_FREQ_HZ);
state->period = (on + off) * (NSEC_PER_SEC / ADP5585_PWM_OSC_FREQ_HZ);
...
}
When duty_cycle exceeds 0xffff oscillator ticks (65,535,000 ns), subtracting
the unclamped on value from the period ticks and then clamping on to 0xffff
drops (unclamped_on - 0xffff) ticks from the total programmed period (and
triggers a warning in pwm_apply_debug() under CONFIG_PWM_DEBUG if the same
period was previously configured with a smaller duty_cycle). Because period
is already clamped to 2 * 0xffff ticks, clamping on before computing off
preserves the requested period and guarantees off <= 0xffff whenever on is
saturated.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261107000724697MsR-XmE4V-ADPPMr3wGom@zte.com.cn?part=3
next prev parent reply other threads:[~2026-11-06 16:27 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-06 16:07 [PATCH 0/5] pwm: fix overflow, truncation and error-path reference leaks shao.mingyin
2026-11-06 16:07 ` [PATCH 1/5] pwm: dwc: Fix 32 bit overflow when computing duty/period in get_state shao.mingyin
2026-11-06 16:07 ` [PATCH 2/5] pwm: airoha: Fix 32 bit overflow when converting duty ticks to ns shao.mingyin
2026-11-06 16:07 ` [PATCH 3/5] pwm: adp5585: Clamp on/off counters to the 16 bit register range shao.mingyin
2026-11-06 16:27 ` sashiko-bot [this message]
2026-11-06 16:46 ` shao.mingyin
2026-11-06 16:07 ` [PATCH 4/5] pwm: dwc: Balance the runtime PM reference when configuring fails shao.mingyin
2026-11-06 16:31 ` sashiko-bot
2026-11-06 16:46 ` shao.mingyin
2026-11-06 16:07 ` [PATCH 5/5] pwm: rockchip: Fix pclk leak in get_state error path shao.mingyin
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