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From: sashiko-bot@kernel.org
To: "Long Zhao" <longzhao@ambarella.com>, linux-gpio@vger.kernel.org
Cc: devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v14 01/14] dt-bindings: gpio: pl061: add Ambarella CV75 variant
Date: Tue, 10 Nov 2026 04:48:32 +0000	[thread overview]
Message-ID: <sashiko-outbox-206240@kernel.org> (raw)
In-Reply-To: <20261110-cv75-gpio-v14-1-e586aad0467a@ambarella.com>

Thank you for your contribution! Sashiko AI review found 2 potential
issues to consider:
- [Medium] dt-bindings: gpio: pl061: split incompatible
  ambarella,cv75-gpio schema
- [Low] dt-bindings: gpio: pl061: undocumented ambarella vendor prefix
--

commit 1c2d672e664996e2a994481958b71e50ae2d14df
Author: Long Zhao <longzhao@ambarella.com>

dt-bindings: gpio: pl061: add Ambarella CV75 variant

This commit adds the ambarella,cv75-gpio compatible string and its
required arm,primecell-periphid and gpio-ranges constraints to the ARM
PL061 GPIO binding schema.

> diff --git a/Documentation/devicetree/bindings/gpio/pl061-gpio.yaml b/Documentation/devicetree/bindings/gpio/pl061-gpio.yaml
> index 4d970e55104bb..c22dd8a1d2c18 100644
> --- a/Documentation/devicetree/bindings/gpio/pl061-gpio.yaml
> +++ b/Documentation/devicetree/bindings/gpio/pl061-gpio.yaml
> @@ -15,7 +15,9 @@ select:
>    properties:
>      compatible:
>        contains:
> -        const: arm,pl061
> +        enum:
> +          - arm,pl061
> +          - ambarella,cv75-gpio
>    required:
>      - compatible
>  
> @@ -25,7 +27,9 @@ properties:
>  
>    compatible:
>      items:
> -      - const: arm,pl061
> +      - enum:
> +          - ambarella,cv75-gpio
> +          - arm,pl061
>        - const: arm,primecell

[Severity: Low]
As reported by Krzysztof Kozlowski on v1 [1], is the ambarella vendor
prefix documented in Documentation/devicetree/bindings/vendor-prefixes.yaml?
Using ambarella,cv75-gpio without a matching vendor-prefixes.yaml entry
triggers checkpatch (UNDOCUMENTED_DT_STRING) and dt_binding_check
warnings.

>  
>    reg:
> @@ -64,6 +68,21 @@ required:
>    - "#gpio-cells"
>    - gpio-controller
>  
> -additionalProperties: false
> +allOf:
> +  - $ref: /schemas/arm/primecell.yaml#
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: ambarella,cv75-gpio
> +    then:
> +      properties:
> +        arm,primecell-periphid:
> +          const: 0x000e8061
> +      required:
> +        - arm,primecell-periphid
> +        - gpio-ranges
> +
> +unevaluatedProperties: false

[Severity: Medium]
Should ambarella,cv75-gpio be split into its own binding schema instead of
adding variant conditionals to pl061-gpio.yaml?

The CV75 controller has 32 lines per bank, adds extra registers, is not
register-compatible with the 8-line ARM PL061, and does not implement the
PL061 PrimeCell ID in hardware. Keeping it in pl061-gpio.yaml subjects a
32-line bank (where gpio-ranges is required) to the 8-line PL061 limits of
maxItems: 8 on both gpio-ranges and interrupts, causing dtbs_check
failures if a bank needs more than 8 disjoint ranges or interrupts.

[1] https://lore.kernel.org/r/a8b0729c-d6ff-4fa0-955e-deb0af0e726b@kernel.org

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261110-cv75-gpio-v14-0-e586aad0467a@ambarella.com?part=1

  reply	other threads:[~2026-11-10  4:48 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-10  4:32 [PATCH v14 00/14] gpio: add Ambarella CV75 PL061 support Long Zhao via B4 Relay
2026-11-10  4:32 ` [PATCH v14 01/14] dt-bindings: gpio: pl061: add Ambarella CV75 variant Long Zhao via B4 Relay
2026-11-10  4:48   ` sashiko-bot [this message]
2026-11-10  4:32 ` [PATCH v14 02/14] gpio: regmap: add GPIO_REGMAP_QUIRK_SET_AFTER_DIR Long Zhao via B4 Relay
2026-11-10  5:00   ` sashiko-bot
2026-11-10  4:32 ` [PATCH v14 03/14] gpio: regmap: remove gpiochip before tearing down irqchip Long Zhao via B4 Relay
2026-11-10  4:32 ` [PATCH v14 04/14] gpio: pl061: drop redundant pending check in the IRQ handler Long Zhao via B4 Relay
2026-11-10  4:32 ` [PATCH v14 05/14] gpio: pl061: convert register access to regmap Long Zhao via B4 Relay
2026-11-10  4:32 ` [PATCH v14 06/14] gpio: pl061: use IRQ_TYPE_LEVEL_MASK and IRQ_TYPE_EDGE_BOTH Long Zhao via B4 Relay
2026-11-10  4:32 ` [PATCH v14 07/14] gpio: pl061: use cleanup helpers for locks Long Zhao via B4 Relay
2026-11-10  4:32 ` [PATCH v14 08/14] gpio: pl061: keep the parent device in a local Long Zhao via B4 Relay
2026-11-10  4:32 ` [PATCH v14 09/14] gpiolib: request ACPI GPIO events for external IRQ domains Long Zhao via B4 Relay
2026-11-10  4:32 ` [PATCH v14 10/14] gpio: pl061: switch data path to gpio-regmap Long Zhao via B4 Relay
2026-11-10  5:51   ` sashiko-bot
2026-11-10  4:32 ` [PATCH v14 11/14] gpio: pl061: add Ambarella register-layout variant Long Zhao via B4 Relay
2026-11-10  4:32 ` [PATCH v14 12/14] gpio: pl061: tidy up IRQ trigger logging Long Zhao via B4 Relay
2026-11-10  4:32 ` [PATCH v14 13/14] lib/string_choices: add str_rising_falling() Long Zhao via B4 Relay
2026-11-10 10:01   ` Andy Shevchenko
2026-11-10  4:32 ` [PATCH v14 14/14] gpio: pl061: use string_choices helpers for IRQ trigger logging Long Zhao via B4 Relay
2026-11-10 13:55   ` Andy Shevchenko

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