From: "Alim Akhtar" <alim.akhtar@samsung.com>
To: <aidenisik@member.fsf.org>,
"'Krzysztof Kozlowski'" <krzk@kernel.org>,
"'Sylwester Nawrocki'" <s.nawrocki@samsung.com>,
"'Chanwoo Choi'" <cw00.choi@samsung.com>,
"'Peter Griffin'" <peter.griffin@linaro.org>,
"'Michael Turquette'" <mturquette@baylibre.com>,
"'Stephen Boyd'" <sboyd@kernel.org>,
"'Brian Masney'" <bmasney@redhat.com>,
"'Rob Herring'" <robh@kernel.org>,
"'Conor Dooley'" <conor+dt@kernel.org>,
"'Kees Cook'" <kees@kernel.org>,
"'Gustavo A. R. Silva'" <gustavoars@kernel.org>
Cc: <linux-samsung-soc@vger.kernel.org>, <linux-clk@vger.kernel.org>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-hardening@vger.kernel.org>,
"'Aiden Isik'" <aidenisik+git@member.fsf.org>
Subject: RE: [PATCH 2/3] clk: samsung: clk-pll: Add support for pll_309
Date: Tue, 18 Aug 2026 09:29:42 +0530 [thread overview]
Message-ID: <025901dd2ec6$0245bcf0$06d136d0$@samsung.com> (raw)
In-Reply-To: <20260817-for-next-lucky7-clock-v1-2-032e4b229c76@member.fsf.org>
> -----Original Message-----
> From: Aiden Isik via B4 Relay
> <devnull+aidenisik.member.fsf.org@kernel.org>
> Sent: Monday, August 17, 2026 3:47 PM
> To: Krzysztof Kozlowski <krzk@kernel.org>; Sylwester Nawrocki
> <s.nawrocki@samsung.com>; Chanwoo Choi <cw00.choi@samsung.com>;
> Peter Griffin <peter.griffin@linaro.org>; Alim Akhtar
> <alim.akhtar@samsung.com>; Michael Turquette
> <mturquette@baylibre.com>; Stephen Boyd <sboyd@kernel.org>; Brian
> Masney <bmasney@redhat.com>; Rob Herring <robh@kernel.org>; Conor
> Dooley <conor+dt@kernel.org>; Kees Cook <kees@kernel.org>; Gustavo A.
> R. Silva <gustavoars@kernel.org>
> Cc: linux-samsung-soc@vger.kernel.org; linux-clk@vger.kernel.org;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> kernel@vger.kernel.org; linux-hardening@vger.kernel.org; Aiden Isik
> <aidenisik+git@member.fsf.org>
> Subject: [PATCH 2/3] clk: samsung: clk-pll: Add support for pll_309
>
> From: Aiden Isik <aidenisik@member.fsf.org>
>
> pll_309 (referred to in the downstream kernel sources as frd_309_rpll) is one
> of two PLLs used in the Exynos5515 SoC. It is an integer/fractional PLL with an
> FVCO of 600-2400MHz.
>
> It has the same locktime (500), and kdiv/mdiv/pdiv/sdiv masks and shifts as
> pll_531x, so it can be handled in exactly the same way.
>
> When defining a PLL, the "con" parameter should be set to the CON3 register,
> like this:
>
> PLL(pll_309, CLK_FOUT_AUD_PLL, "fout_aud_pll", "oscclk",
> PLL_LOCKTIME_PLL_AUD, PLL_CON3_PLL_AUD, NULL),
>
This patch does more then what is described above; please explain all changes in the commit.
If needed, split this into common and pll_309 specific changes. Thanks!
Regards,
Alim
next prev parent reply other threads:[~2026-08-18 3:59 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-17 10:17 [PATCH 0/3] clk: samsung: Introduce Exynos5515 clock driver support Aiden Isik via B4 Relay
2026-08-17 10:17 ` [PATCH 1/3] dt-bindings: clock: Add Exynos5515 SoC Aiden Isik via B4 Relay
2026-08-17 10:17 ` [PATCH 2/3] clk: samsung: clk-pll: Add support for pll_309 Aiden Isik via B4 Relay
2026-08-18 3:59 ` Alim Akhtar [this message]
2026-08-18 9:21 ` Aiden Isik
2026-08-17 10:17 ` [PATCH 3/3] clk: samsung: Introduce Exynos5515 clock driver Aiden Isik via B4 Relay
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